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qcom_dwc3: add initial Qualcomm SoC DWC3 controller glue
This adds some very simple DWC3 glue for the IPQ4018/IPQ4019. Other chipsets introduce reset line iteration, some further clock line iteration and some customisations; I'll look at adding those later. This is enough to finally bring up USB 3.0 on my IPQ4018 ASUS RT-58U router.
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@ -65,3 +65,10 @@ options ARM_FORCE_DBG_MONITOR_DISABLE
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# USB PHY support
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device qcom_ipq4018_hs_usbphy
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device qcom_ipq4018_ss_usbphy
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# USB support
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device usb
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device xhci
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device dwc3
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device qcom_dwc3
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options USB_HOST_ALIGN=64
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@ -6,6 +6,8 @@ arm/qualcomm/qcom_cpu_kpssv2.c optional smp
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arm/qualcomm/ipq4018_usb_hs_phy.c optional qcom_ipq4018_hs_usbphy
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arm/qualcomm/ipq4018_usb_ss_phy.c optional qcom_ipq4018_ss_usbphy
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dev/qcom_dwc3/qcom_dwc3.c optional qcom_dwc3
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dev/qcom_rnd/qcom_rnd.c optional qcom_rnd
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dev/qcom_qup/qcom_spi.c optional qcom_qup_spi
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180
sys/dev/qcom_dwc3/qcom_dwc3.c
Normal file
180
sys/dev/qcom_dwc3/qcom_dwc3.c
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@ -0,0 +1,180 @@
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/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.Org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Qualcomm DWC3 glue
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/gpio.h>
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#include <machine/bus.h>
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#include <dev/fdt/simplebus.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/ofw/ofw_subr.h>
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#include <dev/extres/clk/clk.h>
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#include <dev/extres/hwreset/hwreset.h>
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#include <dev/extres/phy/phy_usb.h>
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#include <dev/extres/syscon/syscon.h>
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static struct ofw_compat_data compat_data[] = {
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{ "qcom,dwc3", 1},
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{ NULL, 0 }
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};
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struct qcom_dwc3_softc {
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struct simplebus_softc sc;
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device_t dev;
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clk_t clk_master;
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clk_t clk_sleep;
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clk_t clk_mock_utmi;
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int type;
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};
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static int
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qcom_dwc3_probe(device_t dev)
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{
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phandle_t node;
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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/* Binding says that we need a child node for the actual dwc3 controller */
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node = ofw_bus_get_node(dev);
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if (OF_child(node) <= 0)
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return (ENXIO);
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device_set_desc(dev, "Qualcomm DWC3");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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qcom_dwc3_attach(device_t dev)
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{
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struct qcom_dwc3_softc *sc;
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device_t cdev;
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phandle_t node, child;
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int err;
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sc = device_get_softc(dev);
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sc->dev = dev;
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node = ofw_bus_get_node(dev);
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sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
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/* Mandatory clocks */
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if (clk_get_by_ofw_name(dev, 0, "master", &sc->clk_master) != 0) {
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device_printf(dev, "Cannot get master clock\n");
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return (ENXIO);
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}
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if (clk_get_by_ofw_name(dev, 0, "sleep", &sc->clk_sleep) != 0) {
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device_printf(dev, "Cannot get sleep clock\n");
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return (ENXIO);
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}
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if (clk_get_by_ofw_name(dev, 0, "mock_utmi", &sc->clk_mock_utmi) != 0) {
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device_printf(dev, "Cannot get mock_utmi clock\n");
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return (ENXIO);
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}
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/*
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* TODO: when we support optional reset blocks, take things
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* out of reset (well, put them into reset, then take out of reset.)
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*/
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/*
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* Now, iterate over the clocks and enable them.
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*/
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err = clk_enable(sc->clk_master);
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if (err != 0) {
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device_printf(dev, "Could not enable clock %s\n",
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clk_get_name(sc->clk_master));
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return (ENXIO);
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}
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err = clk_enable(sc->clk_sleep);
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if (err != 0) {
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device_printf(dev, "Could not enable clock %s\n",
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clk_get_name(sc->clk_sleep));
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return (ENXIO);
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}
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err = clk_enable(sc->clk_mock_utmi);
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if (err != 0) {
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device_printf(dev, "Could not enable clock %s\n",
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clk_get_name(sc->clk_mock_utmi));
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return (ENXIO);
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}
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/*
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* Rest is glue code.
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*/
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simplebus_init(dev, node);
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if (simplebus_fill_ranges(node, &sc->sc) < 0) {
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device_printf(dev, "could not get ranges\n");
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return (ENXIO);
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}
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for (child = OF_child(node); child > 0; child = OF_peer(child)) {
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cdev = simplebus_add_device(dev, child, 0, NULL, -1, NULL);
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if (cdev != NULL)
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device_probe_and_attach(cdev);
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}
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return (bus_generic_attach(dev));
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}
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static device_method_t qcom_dwc3_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, qcom_dwc3_probe),
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DEVMETHOD(device_attach, qcom_dwc3_attach),
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/* XXX TODO suspend */
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/* XXX TODO resume */
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DEVMETHOD_END
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};
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static devclass_t qcom_dwc3_devclass;
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DEFINE_CLASS_1(qcom_dwc3, qcom_dwc3_driver, qcom_dwc3_methods,
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sizeof(struct qcom_dwc3_softc), simplebus_driver);
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DRIVER_MODULE(qcom_dwc3, simplebus, qcom_dwc3_driver, qcom_dwc3_devclass,
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0, 0);
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