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mirror of https://git.FreeBSD.org/src.git synced 2024-12-25 11:37:56 +00:00

Move userland bits of i386 npx.h and amd64 fpu.h to x86 fpu.h.

Remove FPU types from compat/ia32/ia32_reg.h that are no longer needed.
Create machine/npx.h on amd64 to allow compiling i386 code that uses
this header.

The original npx.h and fpu.h define struct envxmm differently. Both
definitions have been included in the new x86 header as struct __envxmm32
and struct __envxmm64. During compilation either __envxmm32 or __envxmm64
is defined as envxmm depending on machine architecture. On amd64 the i386
struct is also available as struct envxmm32.

Reviewed by:	kib
This commit is contained in:
Tijl Coosemans 2012-03-16 20:24:30 +00:00
parent 545193ce59
commit 786645078b
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=233044
5 changed files with 224 additions and 232 deletions

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@ -41,64 +41,7 @@
#ifndef _MACHINE_FPU_H_
#define _MACHINE_FPU_H_
/* Contents of each x87 floating point accumulator */
struct fpacc87 {
uint8_t fp_bytes[10];
};
/* Contents of each SSE extended accumulator */
struct xmmacc {
uint8_t xmm_bytes[16];
};
/* Contents of the upper 16 bytes of each AVX extended accumulator */
struct ymmacc {
uint8_t ymm_bytes[16];
};
struct envxmm {
uint16_t en_cw; /* control word (16bits) */
uint16_t en_sw; /* status word (16bits) */
uint8_t en_tw; /* tag word (8bits) */
uint8_t en_zero;
uint16_t en_opcode; /* opcode last executed (11 bits ) */
uint64_t en_rip; /* floating point instruction pointer */
uint64_t en_rdp; /* floating operand pointer */
uint32_t en_mxcsr; /* SSE sontorol/status register */
uint32_t en_mxcsr_mask; /* valid bits in mxcsr */
};
struct savefpu {
struct envxmm sv_env;
struct {
struct fpacc87 fp_acc;
uint8_t fp_pad[6]; /* padding */
} sv_fp[8];
struct xmmacc sv_xmm[16];
uint8_t sv_pad[96];
} __aligned(16);
struct xstate_hdr {
uint64_t xstate_bv;
uint8_t xstate_rsrv0[16];
uint8_t xstate_rsrv[40];
};
struct savefpu_xstate {
struct xstate_hdr sx_hd;
struct ymmacc sx_ymm[16];
};
struct savefpu_ymm {
struct envxmm sv_env;
struct {
struct fpacc87 fp_acc;
int8_t fp_pad[6]; /* padding */
} sv_fp[8];
struct xmmacc sv_xmm[16];
uint8_t sv_pad[96];
struct savefpu_xstate sv_xstate;
} __aligned(64);
#include <x86/fpu.h>
#ifdef _KERNEL
@ -108,32 +51,6 @@ struct fpu_kern_ctx;
#define XSAVE_AREA_ALIGN 64
#endif
/*
* The hardware default control word for i387's and later coprocessors is
* 0x37F, giving:
*
* round to nearest
* 64-bit precision
* all exceptions masked.
*
* FreeBSD/i386 uses 53 bit precision for things like fadd/fsub/fsqrt etc
* because of the difference between memory and fpu register stack arguments.
* If its using an intermediate fpu register, it has 80/64 bits to work
* with. If it uses memory, it has 64/53 bits to work with. However,
* gcc is aware of this and goes to a fair bit of trouble to make the
* best use of it.
*
* This is mostly academic for AMD64, because the ABI prefers the use
* SSE2 based math. For FreeBSD/amd64, we go with the default settings.
*/
#define __INITIAL_FPUCW__ 0x037F
#define __INITIAL_FPUCW_I386__ 0x127F
#define __INITIAL_MXCSR__ 0x1F80
#define __INITIAL_MXCSR_MASK__ 0xFFBF
#ifdef _KERNEL
void fpudna(void);
void fpudrop(void);
void fpuexit(struct thread *td);

6
sys/amd64/include/npx.h Normal file
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@ -0,0 +1,6 @@
/*-
* This file is in the public domain.
*/
/* $FreeBSD$ */
#include <x86/fpu.h>

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@ -78,33 +78,6 @@ struct dbreg32 {
unsigned int dr[8]; /* debug registers */
};
/* Environment information of floating point unit */
struct env87 {
int en_cw; /* control word (16bits) */
int en_sw; /* status word (16bits) */
int en_tw; /* tag word (16bits) */
int en_fip; /* floating point instruction pointer */
u_short en_fcs; /* floating code segment selector */
u_short en_opcode; /* opcode last executed (11 bits ) */
int en_foo; /* floating operand offset */
int en_fos; /* floating operand segment selector */
};
#ifdef __ia64__
/* Layout of an x87 fpu register (amd64 gets this elsewhere) */
struct fpacc87 {
u_char fp_bytes[10];
};
#endif
/* Floating point context */
struct save87 {
struct env87 sv_env; /* floating point control/status */
struct fpacc87 sv_ac[8]; /* accumulator contents, 0-7 */
u_char sv_pad0[4]; /* padding for (now unused) saved status word */
u_char sv_pad[64]; /* padding; used by emulators */
};
/*
* Wrappers and converters.
*/

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@ -41,127 +41,7 @@
#ifndef _MACHINE_NPX_H_
#define _MACHINE_NPX_H_
/* Environment information of floating point unit */
struct env87 {
int32_t en_cw; /* control word (16bits) */
int32_t en_sw; /* status word (16bits) */
int32_t en_tw; /* tag word (16bits) */
int32_t en_fip; /* fp instruction pointer */
uint16_t en_fcs; /* fp code segment selector */
uint16_t en_opcode; /* opcode last executed (11 bits ) */
int32_t en_foo; /* fp operand offset */
int32_t en_fos; /* fp operand segment selector */
};
/* Contents of each floating point accumulator */
struct fpacc87 {
#ifdef dontdef /* too unportable */
u_long fp_mantlo; /* mantissa low (31:0) */
u_long fp_manthi; /* mantissa high (63:32) */
int fp_exp:15; /* exponent */
int fp_sgn:1; /* mantissa sign */
#else
u_char fp_bytes[10];
#endif
};
/* Floating point context */
struct save87 {
struct env87 sv_env; /* floating point control/status */
struct fpacc87 sv_ac[8]; /* accumulator contents, 0-7 */
u_char sv_pad0[4]; /* padding for (now unused) saved status word */
/*
* Bogus padding for emulators. Emulators should use their own
* struct and arrange to store into this struct (ending here)
* before it is inspected for ptracing or for core dumps. Some
* emulators overwrite the whole struct. We have no good way of
* knowing how much padding to leave. Leave just enough for the
* GPL emulator's i387_union (176 bytes total).
*/
u_char sv_pad[64]; /* padding; used by emulators */
};
struct envxmm {
u_int16_t en_cw; /* control word (16bits) */
u_int16_t en_sw; /* status word (16bits) */
u_int16_t en_tw; /* tag word (16bits) */
u_int16_t en_opcode; /* opcode last executed (11 bits ) */
u_int32_t en_fip; /* floating point instruction pointer */
u_int16_t en_fcs; /* floating code segment selector */
u_int16_t en_pad0; /* padding */
u_int32_t en_foo; /* floating operand offset */
u_int16_t en_fos; /* floating operand segment selector */
u_int16_t en_pad1; /* padding */
u_int32_t en_mxcsr; /* SSE control/status register */
u_int32_t en_mxcsr_mask; /* valid bits in mxcsr */
};
/* Contents of each SSE extended accumulator */
struct xmmacc {
u_char xmm_bytes[16];
};
/* Contents of the upper 16 bytes of each AVX extended accumulator */
struct ymmacc {
uint8_t ymm_bytes[16];
};
struct savexmm {
struct envxmm sv_env;
struct {
struct fpacc87 fp_acc;
u_char fp_pad[6]; /* padding */
} sv_fp[8];
struct xmmacc sv_xmm[8];
u_char sv_pad[224];
} __aligned(16);
union savefpu {
struct save87 sv_87;
struct savexmm sv_xmm;
};
struct xstate_hdr {
uint64_t xstate_bv;
uint8_t xstate_rsrv0[16];
uint8_t xstate_rsrv[40];
};
struct savexmm_xstate {
struct xstate_hdr sx_hd;
struct ymmacc sx_ymm[16];
};
struct savexmm_ymm {
struct envxmm sv_env;
struct {
struct fpacc87 fp_acc;
int8_t fp_pad[6]; /* padding */
} sv_fp[8];
struct xmmacc sv_xmm[16];
uint8_t sv_pad[96];
struct savexmm_xstate sv_xstate;
} __aligned(64);
/*
* The hardware default control word for i387's and later coprocessors is
* 0x37F, giving:
*
* round to nearest
* 64-bit precision
* all exceptions masked.
*
* We modify the affine mode bit and precision bits in this to give:
*
* affine mode for 287's (if they work at all) (1 in bitfield 1<<12)
* 53-bit precision (2 in bitfield 3<<8)
*
* 64-bit precision often gives bad results with high level languages
* because it makes the results of calculations depend on whether
* intermediate values are stored in memory or in FPU registers.
*/
#define __INITIAL_NPXCW__ 0x127F
#define __INITIAL_MXCSR__ 0x1F80
#include <x86/fpu.h>
#ifdef _KERNEL

216
sys/x86/include/fpu.h Normal file
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@ -0,0 +1,216 @@
/*-
* Copyright (c) 1990 The Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* William Jolitz.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)npx.h 5.3 (Berkeley) 1/18/91
* $FreeBSD$
*/
/*
* Floating Point Data Structures and Constants
* W. Jolitz 1/90
*/
#ifndef _X86_FPU_H_
#define _X86_FPU_H_
/* Environment information of floating point unit. */
struct env87 {
int32_t en_cw; /* control word (16bits) */
int32_t en_sw; /* status word (16bits) */
int32_t en_tw; /* tag word (16bits) */
int32_t en_fip; /* fp instruction pointer */
uint16_t en_fcs; /* fp code segment selector */
uint16_t en_opcode; /* opcode last executed (11 bits) */
int32_t en_foo; /* fp operand offset */
int32_t en_fos; /* fp operand segment selector */
};
/* Contents of each x87 floating point accumulator. */
struct fpacc87 {
uint8_t fp_bytes[10];
};
/* Floating point context. (i386 fnsave/frstor) */
struct save87 {
struct env87 sv_env; /* floating point control/status */
struct fpacc87 sv_ac[8]; /* accumulator contents, 0-7 */
uint8_t sv_pad0[4]; /* saved status word (now unused) */
/*
* Bogus padding for emulators. Emulators should use their own
* struct and arrange to store into this struct (ending here)
* before it is inspected for ptracing or for core dumps. Some
* emulators overwrite the whole struct. We have no good way of
* knowing how much padding to leave. Leave just enough for the
* GPL emulator's i387_union (176 bytes total).
*/
uint8_t sv_pad[64]; /* padding; used by emulators */
};
/* Contents of each SSE extended accumulator. */
struct xmmacc {
uint8_t xmm_bytes[16];
};
/* Contents of the upper 16 bytes of each AVX extended accumulator. */
struct ymmacc {
uint8_t ymm_bytes[16];
};
/* Rename structs below depending on machine architecture. */
#ifdef __i386__
#define __envxmm32 envxmm
#else
#define __envxmm32 envxmm32
#define __envxmm64 envxmm
#endif
struct __envxmm32 {
uint16_t en_cw; /* control word (16bits) */
uint16_t en_sw; /* status word (16bits) */
uint16_t en_tw; /* tag word (16bits) */
uint16_t en_opcode; /* opcode last executed (11 bits) */
uint32_t en_fip; /* fp instruction pointer */
uint16_t en_fcs; /* fp code segment selector */
uint16_t en_pad0; /* padding */
uint32_t en_foo; /* fp operand offset */
uint16_t en_fos; /* fp operand segment selector */
uint16_t en_pad1; /* padding */
uint32_t en_mxcsr; /* SSE control/status register */
uint32_t en_mxcsr_mask; /* valid bits in mxcsr */
};
struct __envxmm64 {
uint16_t en_cw; /* control word (16bits) */
uint16_t en_sw; /* status word (16bits) */
uint8_t en_tw; /* tag word (8bits) */
uint8_t en_zero;
uint16_t en_opcode; /* opcode last executed (11 bits ) */
uint64_t en_rip; /* fp instruction pointer */
uint64_t en_rdp; /* fp operand pointer */
uint32_t en_mxcsr; /* SSE control/status register */
uint32_t en_mxcsr_mask; /* valid bits in mxcsr */
};
/* Floating point context. (i386 fxsave/fxrstor) */
struct savexmm {
struct __envxmm32 sv_env;
struct {
struct fpacc87 fp_acc;
uint8_t fp_pad[6]; /* padding */
} sv_fp[8];
struct xmmacc sv_xmm[8];
uint8_t sv_pad[224];
} __aligned(16);
#ifdef __i386__
union savefpu {
struct save87 sv_87;
struct savexmm sv_xmm;
};
#else
/* Floating point context. (amd64 fxsave/fxrstor) */
struct savefpu {
struct __envxmm64 sv_env;
struct {
struct fpacc87 fp_acc;
uint8_t fp_pad[6]; /* padding */
} sv_fp[8];
struct xmmacc sv_xmm[16];
uint8_t sv_pad[96];
} __aligned(16);
#endif
struct xstate_hdr {
uint64_t xstate_bv;
uint8_t xstate_rsrv0[16];
uint8_t xstate_rsrv[40];
};
struct savexmm_xstate {
struct xstate_hdr sx_hd;
struct ymmacc sx_ymm[16];
};
struct savexmm_ymm {
struct __envxmm32 sv_env;
struct {
struct fpacc87 fp_acc;
int8_t fp_pad[6]; /* padding */
} sv_fp[8];
struct xmmacc sv_xmm[16];
uint8_t sv_pad[96];
struct savexmm_xstate sv_xstate;
} __aligned(64);
struct savefpu_xstate {
struct xstate_hdr sx_hd;
struct ymmacc sx_ymm[16];
};
struct savefpu_ymm {
struct __envxmm64 sv_env;
struct {
struct fpacc87 fp_acc;
int8_t fp_pad[6]; /* padding */
} sv_fp[8];
struct xmmacc sv_xmm[16];
uint8_t sv_pad[96];
struct savefpu_xstate sv_xstate;
} __aligned(64);
#undef __envxmm32
#undef __envxmm64
/*
* The hardware default control word for i387's and later coprocessors is
* 0x37F, giving:
*
* round to nearest
* 64-bit precision
* all exceptions masked.
*
* FreeBSD/i386 uses 53 bit precision for things like fadd/fsub/fsqrt etc
* because of the difference between memory and fpu register stack arguments.
* If its using an intermediate fpu register, it has 80/64 bits to work
* with. If it uses memory, it has 64/53 bits to work with. However,
* gcc is aware of this and goes to a fair bit of trouble to make the
* best use of it.
*
* This is mostly academic for AMD64, because the ABI prefers the use
* SSE2 based math. For FreeBSD/amd64, we go with the default settings.
*/
#define __INITIAL_FPUCW__ 0x037F
#define __INITIAL_FPUCW_I386__ 0x127F
#define __INITIAL_NPXCW__ __INITIAL_FPUCW_I386__
#define __INITIAL_MXCSR__ 0x1F80
#define __INITIAL_MXCSR_MASK__ 0xFFBF
#endif /* !_X86_FPU_H_ */