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Order PCIC_INT_GEN bits large to small, like all other registers.

This commit is contained in:
Warner Losh 2001-08-05 06:59:32 +00:00
parent f6c4dd3f48
commit 79c1672770
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=81152

View File

@ -134,10 +134,10 @@
#define PCIC_VPP_12V 0x02 /* 12 volts */
/* For the Interrupt and General Control register (PCIC_INT_GEN) */
#define PCIC_CARDRESET 0x40 /* Card reset 0 = Reset, 1 = Normal */
#define PCIC_CARDTYPE 0x20 /* Card Type 0 = memory, 1 = I/O */
#define PCIC_IOCARD 0x20
#define PCIC_MEMCARD 0x00
#define PCIC_CARDRESET 0x40 /* Card reset 0 = Reset, 1 = Normal */
#define PCIC_INTR_ENA 0x10 /* PCI CSC Interrupt enable */
/* For the Card Status Change register (PCIC_STAT_CHG) */