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Datasheet says vge(4) controllers support DAC but it seems that's

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not true on old PCI based controllers.  DAC configuration is read
from EEPROM in device reset phase and driver can override DAC
configuration.  However I guess there is an undocumented reason why
EEPROM configuration does not enable DAC so do not blindly override
DAC configuration.  Recent PCIe based controllers are supposed to
support 64bit DMA so allow 64bit DMA only on PCIe based controllers.

PR:		kern/157184
MFC after:	1 week
This commit is contained in:
Pyun YongHyeon 2011-05-20 18:27:13 +00:00
parent 81046d3cb3
commit 7ba75dc4e9
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=222142
1 changed files with 17 additions and 2 deletions
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19
sys/dev/vge/if_vge.c
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@ -685,7 +685,18 @@ vge_dma_alloc(struct vge_softc *sc)
bus_addr_t lowaddr, tx_ring_end, rx_ring_end;
int error, i;
lowaddr = BUS_SPACE_MAXADDR;
/*
* It seems old PCI controllers do not support DAC. DAC
* configuration can be enabled by accessing VGE_CHIPCFG3
* register but honor EEPROM configuration instead of
* blindly overriding DAC configuration. PCIe based
* controllers are supposed to support 64bit DMA so enable
* 64bit DMA on these controllers.
*/
if ((sc->vge_flags & VGE_FLAG_PCIE) != 0)
lowaddr = BUS_SPACE_MAXADDR;
else
lowaddr = BUS_SPACE_MAXADDR_32BIT;
again:
/* Create parent ring tag. */
@ -802,10 +813,14 @@ vge_dma_alloc(struct vge_softc *sc)
goto again;
}
if ((sc->vge_flags & VGE_FLAG_PCIE) != 0)
lowaddr = VGE_BUF_DMA_MAXADDR;
else
lowaddr = BUS_SPACE_MAXADDR_32BIT;
/* Create parent buffer tag. */
error = bus_dma_tag_create(bus_get_dma_tag(sc->vge_dev),/* parent */
1, 0, /* algnmnt, boundary */
VGE_BUF_DMA_MAXADDR, /* lowaddr */
lowaddr, /* lowaddr */
BUS_SPACE_MAXADDR, /* highaddr */
NULL, NULL, /* filter, filterarg */
BUS_SPACE_MAXSIZE_32BIT, /* maxsize */