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synced 2024-12-23 11:18:54 +00:00
Remove unnecessary assembly code.
The compiler should generate lw/sw corresponding to register operations.
This commit is contained in:
parent
50c603c4ec
commit
7fb26c47df
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=233657
@ -45,8 +45,8 @@
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#define UCORE_FR_FIFOEMPTY 0x802c
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#define UCORE_PKT_DISTR 0x8030
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#define PACKET_MEMORY (0xFFE00)
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#define PACKET_DATA_OFFSET (64)
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#define PACKET_MEMORY 0xFFE00
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#define PACKET_DATA_OFFSET 64
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#define SHARED_SCRATCH_MEM 0x18000
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/* Distribution mode */
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@ -57,8 +57,8 @@
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#define VAL_PDL(x) (((x) & 0xf) << 4)
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/*output buffer done*/
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#define VAL_FSV(x) (x<<19)
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#define VAL_FFS(x) (x<<14)
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#define VAL_FSV(x) (x << 19)
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#define VAL_FFS(x) (x << 14)
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#define FWD_DEST_ONLY 1
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#define FWD_ENQ_DIST_VEC 2
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@ -69,37 +69,33 @@
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#define USE_HASH_DST (1 << 20)
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static __inline unsigned int
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nlm_read_ucore_reg(int reg)
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{
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volatile unsigned int *addr = (volatile void *)reg;
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return (*addr);
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}
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static __inline void
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nlm_write_ucore_reg(int reg, unsigned int val)
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{
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volatile unsigned int *addr = (volatile void *)reg;
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*addr = val;
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}
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#define NLM_DEFINE_UCORE(name, reg) \
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static __inline__ unsigned int nlm_read_ucore_##name(void) \
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static __inline unsigned int \
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nlm_read_ucore_##name(void) \
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{ \
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unsigned int __rv; \
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__asm__ __volatile__ ( \
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".set push\n" \
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".set noreorder\n" \
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".set mips32\n" \
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"li $8, %1\n" \
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"lw %0, ($8)\n" \
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".set pop\n" \
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: "=r" (__rv) \
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: "i" (reg) \
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: "$8" \
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); \
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return __rv; \
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return nlm_read_ucore_reg(reg); \
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} \
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\
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static __inline__ void nlm_write_ucore_##name(unsigned int val) \
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static __inline void \
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nlm_write_ucore_##name(unsigned int v) \
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{ \
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__asm__ __volatile__( \
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".set push\n" \
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".set noreorder\n" \
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".set mips32\n" \
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"li $8, %1\n" \
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"sw %0, ($8)\n" \
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".set pop\n" \
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:: "r" (val), "i" (reg) \
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: "$8" \
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); \
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nlm_write_ucore_reg(reg, v); \
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} struct __hack
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@ -38,7 +38,7 @@ int main(void)
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int intf, hw_parser_error, context;
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#endif
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unsigned int pktrdy;
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int num_cachelines = 1518 >> 6; /* pktsize / L3 cacheline size */
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int num_cachelines = 1518 / 64 ; /* pktsize / L3 cacheline size */
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/* Spray packets to using distribution vector */
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