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Merge commit 4bb2416d42eb from llvm-project (by Jessica Clarke):
[builtins][AArch64] Implement _sync out-of-line atomics Whilst Clang does not use these, recent GCC does, and so on systems such as FreeBSD that wish to use compiler-rt as the system runtime library but also wish to support building programs with GCC these interfaces are needed. This is a light adaptation of the code committed to GCC by Sebastian Pop <spop@amazon.com>, relicensed with permission for use in compiler-rt. Fixes https://github.com/llvm/llvm-project/issues/63483 Reviewed By: sebpop, MaskRay Differential Revision: https://reviews.llvm.org/D158536 Reviewed by: dim MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D41716
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@ -7,7 +7,7 @@
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// Out-of-line LSE atomics helpers. Ported from libgcc library.
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// N = {1, 2, 4, 8}
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// M = {1, 2, 4, 8, 16}
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// ORDER = {'relax', 'acq', 'rel', 'acq_rel'}
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// ORDER = {'relax', 'acq', 'rel', 'acq_rel', 'sync'}
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// Routines implemented:
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//
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// iM __aarch64_casM_ORDER(iM expected, iM desired, iM *ptr)
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@ -35,8 +35,8 @@ HIDDEN(___aarch64_have_lse_atomics)
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#endif
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// Generate mnemonics for
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// L_cas: SIZE: 1,2,4,8,16 MODEL: 1,2,3,4
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// L_swp L_ldadd L_ldclr L_ldeor L_ldset: SIZE: 1,2,4,8 MODEL: 1,2,3,4
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// L_cas: SIZE: 1,2,4,8,16 MODEL: 1,2,3,4,5
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// L_swp L_ldadd L_ldclr L_ldeor L_ldset: SIZE: 1,2,4,8 MODEL: 1,2,3,4,5
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#if SIZE == 1
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#define S b
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@ -64,24 +64,44 @@ HIDDEN(___aarch64_have_lse_atomics)
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#define L
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#define M 0x000000
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#define N 0x000000
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#define BARRIER
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#elif MODEL == 2
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#define SUFF _acq
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#define A a
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#define L
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#define M 0x400000
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#define N 0x800000
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#define BARRIER
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#elif MODEL == 3
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#define SUFF _rel
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#define A
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#define L l
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#define M 0x008000
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#define N 0x400000
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#define BARRIER
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#elif MODEL == 4
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#define SUFF _acq_rel
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#define A a
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#define L l
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#define M 0x408000
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#define N 0xc00000
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#define BARRIER
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#elif MODEL == 5
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#define SUFF _sync
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#ifdef L_swp
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// swp has _acq semantics.
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#define A a
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#define L
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#define M 0x400000
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#define N 0x800000
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#else
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// All other _sync functions have _seq semantics.
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#define A a
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#define L l
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#define M 0x408000
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#define N 0xc00000
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#endif
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#define BARRIER dmb ish
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#else
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#error
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#endif // MODEL
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@ -96,7 +116,12 @@ HIDDEN(___aarch64_have_lse_atomics)
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#endif
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#define NAME(BASE) GLUE4(__aarch64_, BASE, SIZE, SUFF)
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#if MODEL == 5
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// Drop A for _sync functions.
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#define LDXR GLUE3(ld, xr, S)
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#else
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#define LDXR GLUE4(ld, A, xr, S)
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#endif
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#define STXR GLUE4(st, L, xr, S)
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// Define temporary registers.
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@ -136,9 +161,15 @@ DEFINE_COMPILERRT_OUTLINE_FUNCTION_UNMANGLED(NAME(cas))
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STXR w(tmp1), s(1), [x2]
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cbnz w(tmp1), 0b
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1:
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BARRIER
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ret
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#else
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#if MODEL == 5
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// Drop A for _sync functions.
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#define LDXP GLUE2(ld, xp)
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#else
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#define LDXP GLUE3(ld, A, xp)
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#endif
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#define STXP GLUE3(st, L, xp)
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#ifdef HAS_ASM_LSE
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#define CASP GLUE3(casp, A, L) x0, x1, x2, x3, [x4]
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@ -159,6 +190,7 @@ DEFINE_COMPILERRT_OUTLINE_FUNCTION_UNMANGLED(NAME(cas))
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STXP w(tmp2), x2, x3, [x4]
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cbnz w(tmp2), 0b
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1:
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BARRIER
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ret
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#endif
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END_COMPILERRT_OUTLINE_FUNCTION(NAME(cas))
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@ -180,6 +212,7 @@ DEFINE_COMPILERRT_OUTLINE_FUNCTION_UNMANGLED(NAME(swp))
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LDXR s(0), [x1]
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STXR w(tmp1), s(tmp0), [x1]
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cbnz w(tmp1), 0b
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BARRIER
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ret
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END_COMPILERRT_OUTLINE_FUNCTION(NAME(swp))
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#endif // L_swp
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@ -224,6 +257,7 @@ DEFINE_COMPILERRT_OUTLINE_FUNCTION_UNMANGLED(NAME(LDNM))
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OP s(tmp1), s(0), s(tmp0)
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STXR w(tmp2), s(tmp1), [x1]
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cbnz w(tmp2), 0b
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BARRIER
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ret
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END_COMPILERRT_OUTLINE_FUNCTION(NAME(LDNM))
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#endif // L_ldadd L_ldclr L_ldeor L_ldset
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@ -22,7 +22,7 @@ MK_WERROR.gcc= no
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.if ${MACHINE_CPUARCH} == "aarch64"
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. for pat in cas swp ldadd ldclr ldeor ldset
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. for size in 1 2 4 8 16
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. for model in 1 2 3 4
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. for model in 1 2 3 4 5
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. if ${pat} == "cas" || ${size} != "16"
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# Use .for to define lse_name, to get a special loop-local variable
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. for lse_name in outline_atomic_${pat}${size}_${model}.S
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