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Code Issues Releases Activity

Use a consistent style for messages emitted when the module is loaded.

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This commit is contained in:
Neel Natu 2014-10-11 03:09:34 +00:00
parent ed6aacb51f
commit 882a1f1942
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/projects/bhyve_svm/; revision=272926
2 changed files with 27 additions and 31 deletions
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52
sys/amd64/vmm/amd/svm.c
View File

@ -174,10 +174,10 @@ svm_cleanup(void)
}
/*
* Check for required BHyVe SVM features in a CPU.
* Verify that all the features required by bhyve are available.
*/
static int
svm_cpuid_features(void)
check_svm_features(void)
{
u_int regs[4];
@ -185,11 +185,13 @@ svm_cpuid_features(void)
do_cpuid(0x8000000A, regs);
svm_feature = regs[3];
printf("SVM rev: 0x%x NASID:0x%x\n", regs[0] & 0xFF, regs[1]);
printf("SVM: Revision %d\n", regs[0] & 0xFF);
printf("SVM: NumASID %u\n", regs[1]);
nasid = regs[1];
KASSERT(nasid > 1, ("Insufficient ASIDs for guests: %#x", nasid));
printf("SVM Features:0x%b\n", svm_feature,
printf("SVM: Features 0x%b\n", svm_feature,
"\020"
"\001NP" /* Nested paging */
"\002LbrVirt" /* LBR virtualization */
@ -199,32 +201,27 @@ svm_cpuid_features(void)
"\006VmcbClean" /* VMCB clean bits */
"\007FlushByAsid" /* Flush by ASID */
"\010DecodeAssist" /* Decode assist */
"\011<b20>"
"\012<b20>"
"\011<b8>"
"\012<b9>"
"\013PauseFilter"
"\014<b20>"
"\014<b11>"
"\015PauseFilterThreshold"
"\016AVIC"
);
/* SVM Lock */
if (!(svm_feature & AMD_CPUID_SVM_SVML)) {
printf("SVM is disabled by BIOS, please enable in BIOS.\n");
/* bhyve requires the Nested Paging feature */
if (!(svm_feature & AMD_CPUID_SVM_NP)) {
printf("SVM: Nested Paging feature not available.\n");
return (ENXIO);
}
/*
* bhyve need RVI to work.
*/
if (!(svm_feature & AMD_CPUID_SVM_NP)) {
printf("Missing Nested paging or RVI SVM support in processor.\n");
return (EIO);
/* bhyve requires the NRIP Save feature */
if (!(svm_feature & AMD_CPUID_SVM_NRIP_SAVE)) {
printf("SVM: NRIP Save feature not available.\n");
return (ENXIO);
}
if (svm_feature & AMD_CPUID_SVM_NRIP_SAVE)
return (0);
return (EIO);
return (0);
}
static __inline int
@ -260,27 +257,26 @@ svm_enable(void *arg __unused)
}
/*
* Check if a processor support SVM.
* Verify that SVM is enabled and the processor has all the required features.
*/
static int
is_svm_enabled(void)
{
uint64_t msr;
/* Section 15.4 Enabling SVM from APM2. */
/* Section 15.4 Enabling SVM from APM2. */
if ((amd_feature2 & AMDID2_SVM) == 0) {
printf("SVM is not supported on this processor.\n");
printf("SVM: not available.\n");
return (ENXIO);
}
msr = rdmsr(MSR_VM_CR);
/* Make sure SVM is not disabled by BIOS. */
if ((msr & VM_CR_SVMDIS) == 0) {
return svm_cpuid_features();
if ((msr & VM_CR_SVMDIS) != 0) {
printf("SVM: disabled by BIOS.\n");
return (ENXIO);
}
printf("SVM disabled by Key, consult TPM/BIOS manual.\n");
return (ENXIO);
return (check_svm_features());
}
/*

6
sys/x86/include/specialreg.h
View File

@ -786,10 +786,10 @@
#define MSR_TOP_MEM2 0xc001001d /* boundary for ram above 4G */
#define MSR_K8_UCODE_UPDATE 0xc0010020 /* update microcode */
#define MSR_MC0_CTL_MASK 0xc0010044
#define MSR_VM_CR 0xC0010114 /* SVM: feature control */
#define MSR_VM_HSAVE_PA 0xC0010117 /* SVM: host save area address */
#define MSR_VM_CR 0xc0010114 /* SVM: feature control */
#define MSR_VM_HSAVE_PA 0xc0010117 /* SVM: host save area address */
/* AMD VM_CR related */
/* MSR_VM_CR related */
#define VM_CR_SVMDIS 0x10 /* SVM: disabled by BIOS */
/* VIA ACE crypto featureset: for via_feature_rng */