mirror of
https://git.FreeBSD.org/src.git
synced 2024-12-16 10:20:30 +00:00
Updated cx driver commit part 1: bring in the new kernel driver.
This is the vastly updated cx drvier from Roman Kurakin <rik@cronyx.ru> who has been patiently waiting for this update for sometime. The driver is mostly a rewrite from the version we have in the tree. While some similarities remain, losing the little history that the old driver has is not a big loss, and the re@ felt it was easier this way (less error prone). The userland parts of this update will be committed shortly. The driver is not connected to the build yet. I want to make sure I don't break any platform at any time, so I want to test that with these files in the tree before I continue (on the off chance I'm forgetting a file). I changed the DEBUG macro to CX_DEBUG from the code that was submitted (to not break when we go to building with opt_global.h after the release), as well adding $FreeBSD$. Submitted by: Roman Kurakin Approved by: re@ <scottl>
This commit is contained in:
parent
3554ecf032
commit
88afb90f3c
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=123120
32
sys/dev/cx/cronyxfw.h
Normal file
32
sys/dev/cx/cronyxfw.h
Normal file
@ -0,0 +1,32 @@
|
||||
/*
|
||||
* Cronyx firmware definitions.
|
||||
*
|
||||
* Copyright (C) 1996 Cronyx Engineering.
|
||||
* Author: Serge Vakulenko, <vak@cronyx.ru>
|
||||
*
|
||||
* This software is distributed with NO WARRANTIES, not even the implied
|
||||
* warranties for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
||||
*
|
||||
* Authors grant any other persons or organisations permission to use
|
||||
* or modify this software as long as this message is kept with the software,
|
||||
* all derivative works or modified versions.
|
||||
*
|
||||
* Cronyx Id: cronyxfw.h,v 1.1.2.1 2003/11/12 17:09:49 rik Exp $
|
||||
* $FreeBSD$
|
||||
*/
|
||||
#define CRONYX_DAT_MAGIC 2001107011L /* firmware file magic */
|
||||
|
||||
typedef struct _cr_dat_tst {
|
||||
long start; /* verify start */
|
||||
long end; /* verify end */
|
||||
} cr_dat_tst_t;
|
||||
|
||||
typedef struct { /* firmware file header */
|
||||
unsigned long magic; /* firmware magic */
|
||||
long hdrsz; /* header size in bytes */
|
||||
long len; /* firmware data size in bits */
|
||||
long ntest; /* number of tests */
|
||||
unsigned long sum; /* header+tests+data checksum */
|
||||
char version[8]; /* firmware version number */
|
||||
char date[8]; /* date when compiled */
|
||||
} cr_dat_t;
|
1438
sys/dev/cx/csigma.c
Normal file
1438
sys/dev/cx/csigma.c
Normal file
File diff suppressed because it is too large
Load Diff
852
sys/dev/cx/csigmafw.h
Normal file
852
sys/dev/cx/csigmafw.h
Normal file
@ -0,0 +1,852 @@
|
||||
/*
|
||||
* DO NOT EDIT MANUALLY!
|
||||
* This code was generated by mkfw utility
|
||||
* from the file `csigma.dat'
|
||||
*
|
||||
* Cronyx Id: csigmafw.h,v 1.1 2002/06/03 10:19:39 rik Exp $
|
||||
* $FreeBSD$
|
||||
*/
|
||||
long csigma_fw_len = 131234;
|
||||
|
||||
const char *csigma_fw_version = "1.2";
|
||||
const char *csigma_fw_date = "06.06.00";
|
||||
const char *csigma_fw_copyright = "Copyright (C) 2000 Cronyx Engineering.";
|
||||
|
||||
const cr_dat_tst_t csigma_fw_tvec[] = {
|
||||
{ 65066, 66278}, { 66314, 67526}, { 67562, 68774}, { 68810, 70022},
|
||||
{ 70058, 71270}, { 71306, 72518}, { 72554, 73766}, { 73802, 75014},
|
||||
{ 75050, 76262}, { 76298, 77510}, { 77546, 78758}, { 78794, 80006},
|
||||
{ 80042, 81254}, { 81290, 82502}, { 82538, 83750}, { 83786, 84998},
|
||||
{ 85034, 86246}, { 86282, 87494}, { 87530, 88742}, { 88778, 89990},
|
||||
{ 90026, 91238}, { 91274, 92486}, { 92522, 93734}, { 93770, 94982},
|
||||
{ 95018, 96230}, { 96266, 97478}, { 97514, 98726}, { 98762, 99974},
|
||||
{100010,101222}, {101258,102470}, {102506,103718}, {103754,104966},
|
||||
{105002,106214}, {106250,107462}, {107498,108710}, {108746,109958},
|
||||
{109994,111206}, {111242,112454}, {112490,113702}, {113738,114950},
|
||||
{114986,116198}, {116234,117446}, {117482,118694}, {118730,119942},
|
||||
{119978,121190}, {121226,122438}, {122474,123686}, {123722,124934},
|
||||
{124970,126182}, {126218,127430}, {127466,128678}, {128714,129926},
|
||||
{129962,131174}, {131234,131234},
|
||||
};
|
||||
|
||||
const unsigned char csigma_fw_data[] = {
|
||||
155,153,97,92,102,96,32,100,100,36,112,112,112,112,48,49,48,52,52,
|
||||
52,100,100,100,116,117,36,100,100,52,52,52,52,116,100,49,49,36,37,
|
||||
37,49,49,49,117,53,33,49,49,37,37,37,37,37,36,52,97,97,97,97,100,100,
|
||||
100,97,101,96,100,36,53,96,97,97,36,97,97,112,112,96,101,100,100,100,
|
||||
36,49,48,49,49,97,101,116,37,96,101,49,52,112,33,100,100,100,112,101,
|
||||
116,49,97,36,37,52,100,101,116,36,49,100,52,33,49,49,49,100,53,100,
|
||||
100,100,32,37,37,37,37,116,112,96,97,97,97,100,100,100,97,101,96,100,
|
||||
100,97,97,113,36,33,97,97,112,112,112,48,49,49,113,53,59,57,49,100,
|
||||
96,100,100,97,97,97,97,33,48,101,112,112,112,48,49,49,113,32,101,101,
|
||||
100,36,112,112,112,112,97,96,100,48,52,52,100,100,100,52,96,113,49,
|
||||
49,33,52,52,52,52,112,113,36,37,37,37,49,49,49,37,116,117,100,100,
|
||||
117,32,37,37,49,116,37,97,97,33,53,49,49,49,113,37,97,100,100,33,53,
|
||||
113,53,32,53,101,112,48,97,101,100,100,116,37,49,48,113,49,52,112,
|
||||
48,53,49,48,100,48,113,36,100,100,100,112,97,36,100,100,52,52,52,52,
|
||||
52,52,116,33,37,37,37,49,49,49,37,52,48,49,49,37,37,101,49,36,36,117,
|
||||
97,97,97,97,100,100,100,49,76,68,100,48,33,49,49,49,37,37,37,37,96,
|
||||
52,97,97,97,97,100,100,100,97,101,96,100,100,97,97,97,97,37,33,49,
|
||||
97,112,112,48,49,49,113,112,49,48,49,113,112,112,112,112,96,96,49,
|
||||
52,52,52,100,100,100,52,37,32,49,49,117,33,52,52,100,96,52,36,37,37,
|
||||
116,100,100,100,100,48,33,49,49,49,116,100,117,32,116,52,97,97,36,
|
||||
53,49,49,113,37,33,48,49,100,112,96,97,116,100,101,48,97,100,49,48,
|
||||
49,49,97,116,113,101,100,100,36,112,112,112,96,37,37,52,52,52,100,
|
||||
100,100,52,116,36,100,100,100,100,52,101,48,48,52,36,37,37,37,49,49,
|
||||
49,53,16,177,177,112,116,100,100,52,52,52,100,52,32,113,36,37,37,37,
|
||||
49,49,49,101,100,48,49,49,37,37,37,37,53,113,100,36,97,97,97,100,100,
|
||||
100,49,49,100,100,100,97,97,97,97,33,53,101,112,112,112,48,49,49,113,
|
||||
112,49,48,49,97,37,112,112,48,97,112,48,52,52,112,49,49,49,49,36,97,
|
||||
100,100,52,112,49,117,33,112,113,36,37,116,32,49,49,49,116,48,33,49,
|
||||
53,97,33,37,113,49,33,97,36,49,101,96,100,100,36,53,100,96,100,100,
|
||||
97,97,97,97,33,53,52,112,112,112,48,49,49,113,116,112,101,100,36,112,
|
||||
112,52,97,96,112,48,52,52,52,100,100,100,52,32,179,51,37,48,100,100,
|
||||
100,36,112,112,112,32,100,49,52,52,52,100,100,100,52,96,37,100,100,
|
||||
52,52,52,52,52,113,49,36,37,37,37,49,49,49,101,100,36,49,49,37,37,
|
||||
37,37,37,116,52,97,97,97,97,100,100,100,97,101,96,100,36,53,96,97,
|
||||
97,36,97,97,112,112,96,101,100,100,100,112,32,48,49,49,97,101,116,
|
||||
37,96,101,49,52,100,52,100,100,100,48,36,49,49,97,36,37,52,100,48,
|
||||
113,113,101,37,52,33,49,49,49,52,32,32,49,49,37,37,37,37,37,116,52,
|
||||
97,97,97,97,100,100,100,97,101,96,100,100,100,100,113,36,33,97,97,
|
||||
112,112,112,48,49,49,113,37,110,108,100,101,96,100,100,97,97,97,97,
|
||||
33,48,101,112,112,112,48,49,49,113,112,49,48,49,113,112,112,112,112,
|
||||
49,101,100,48,52,52,100,100,100,52,116,36,100,100,52,52,52,52,52,48,
|
||||
112,36,37,37,37,49,49,49,37,96,100,100,100,117,32,37,37,49,36,112,
|
||||
96,97,33,53,49,49,49,49,100,96,100,100,33,53,113,53,32,53,101,112,
|
||||
96,117,101,100,100,116,37,49,48,49,100,49,112,48,53,49,48,100,48,113,
|
||||
36,100,100,100,112,97,36,100,100,52,52,52,52,52,112,97,33,37,37,37,
|
||||
49,49,49,101,101,101,100,100,32,37,101,49,36,36,37,97,97,97,97,100,
|
||||
100,100,113,77,68,116,96,32,49,49,37,37,37,37,37,96,100,97,97,97,97,
|
||||
100,100,100,113,49,48,49,49,49,96,97,97,101,52,49,97,112,112,48,49,
|
||||
49,113,112,49,48,49,113,112,112,112,112,96,96,49,52,52,52,100,100,
|
||||
100,52,116,36,100,100,112,33,52,52,100,48,52,36,37,37,116,100,100,
|
||||
100,100,48,33,49,49,37,37,49,116,32,116,52,97,33,117,53,49,49,113,
|
||||
101,97,48,49,53,101,96,97,116,100,96,112,116,96,49,48,49,49,97,113,
|
||||
101,48,49,113,112,112,112,112,96,37,37,52,52,52,100,100,100,52,49,
|
||||
49,100,100,52,52,100,96,37,112,97,33,37,37,37,49,49,49,53,21,177,177,
|
||||
97,36,100,100,52,52,52,52,52,32,113,36,37,37,37,49,49,49,37,53,33,
|
||||
49,49,37,37,37,37,53,113,100,36,100,97,97,100,100,100,113,48,97,100,
|
||||
100,97,97,97,97,33,36,101,112,112,112,48,49,49,113,96,97,48,49,49,
|
||||
113,112,112,48,97,112,48,52,52,112,49,49,49,49,32,37,100,100,52,112,
|
||||
49,117,33,112,113,36,37,116,117,100,100,100,117,48,33,49,101,33,116,
|
||||
32,113,101,116,52,37,49,101,96,100,100,36,53,100,96,100,100,97,97,
|
||||
97,97,33,53,113,112,112,112,48,49,49,113,112,49,48,49,113,112,112,
|
||||
52,97,96,112,48,52,52,52,100,100,100,52,52,230,102,53,96,101,100,36,
|
||||
112,112,112,112,32,100,52,52,52,52,100,100,100,52,33,33,49,49,33,100,
|
||||
52,52,116,100,49,49,36,37,37,49,49,49,101,116,116,100,100,32,37,37,
|
||||
37,37,36,52,97,97,97,97,100,100,100,97,101,96,100,100,100,97,97,97,
|
||||
36,97,97,112,112,96,101,100,100,100,37,117,100,100,36,112,48,113,112,
|
||||
96,101,49,52,112,117,49,49,49,53,52,116,49,97,36,37,52,100,32,117,
|
||||
113,49,112,52,33,49,49,49,116,48,33,49,49,37,37,37,37,37,116,112,96,
|
||||
97,97,97,100,100,100,33,112,48,49,49,96,97,97,37,33,97,97,112,112,
|
||||
112,48,49,49,113,117,58,57,49,100,96,100,100,97,97,97,97,33,48,101,
|
||||
112,112,112,48,49,49,113,112,49,48,49,113,112,112,112,112,49,101,100,
|
||||
96,52,52,100,100,100,52,116,36,100,100,100,52,52,52,52,48,112,36,37,
|
||||
37,37,49,49,49,101,97,48,49,49,116,32,37,37,49,36,37,97,97,33,53,49,
|
||||
49,49,49,100,96,100,100,33,48,113,48,32,53,101,112,96,117,101,100,
|
||||
100,116,37,49,48,49,37,37,113,48,53,49,48,32,32,113,36,100,100,100,
|
||||
112,117,96,100,100,52,52,52,52,52,32,97,33,37,37,37,49,49,49,37,53,
|
||||
33,49,49,37,37,101,49,36,36,37,97,97,97,97,100,100,100,49,73,68,116,
|
||||
37,53,49,49,37,37,37,37,37,96,52,97,97,97,97,100,100,100,33,36,49,
|
||||
49,49,96,97,100,97,101,52,49,97,112,112,48,49,49,113,113,116,100,100,
|
||||
36,112,112,112,112,96,96,49,52,52,52,100,100,100,52,116,36,100,100,
|
||||
100,52,52,52,100,48,52,36,37,37,116,100,100,100,100,48,33,49,49,37,
|
||||
96,100,117,32,116,52,97,33,117,53,49,49,113,49,97,48,49,52,37,97,97,
|
||||
100,48,53,53,36,101,49,48,49,49,97,49,32,100,100,36,112,112,112,112,
|
||||
96,37,37,52,52,52,100,100,100,52,53,36,49,49,33,52,52,96,37,48,52,
|
||||
36,37,37,37,49,49,49,53,4,177,177,97,36,100,100,52,52,52,52,52,32,
|
||||
49,37,37,37,37,49,49,49,37,53,33,49,49,37,37,37,37,53,113,100,36,100,
|
||||
97,97,100,100,100,97,101,96,100,100,100,97,100,97,36,33,101,112,112,
|
||||
48,49,49,49,113,36,112,101,100,116,37,112,112,48,97,112,48,52,52,112,
|
||||
49,49,49,49,48,32,49,49,33,112,49,117,33,112,113,36,37,116,117,100,
|
||||
100,100,117,48,33,49,113,97,33,37,113,49,33,33,32,48,101,96,100,100,
|
||||
36,53,100,96,100,100,97,97,97,97,33,48,52,112,112,112,48,49,49,113,
|
||||
112,49,48,49,113,112,112,52,97,96,112,48,52,52,52,100,100,100,52,112,
|
||||
179,51,116,113,101,100,36,48,113,112,112,32,100,49,52,52,52,100,100,
|
||||
100,116,97,32,100,100,52,52,52,100,116,100,49,49,36,37,37,49,49,49,
|
||||
101,49,48,49,49,37,37,37,37,37,36,52,97,97,97,97,100,100,100,113,33,
|
||||
96,100,100,100,97,97,97,36,97,97,48,113,96,101,100,100,100,36,49,48,
|
||||
49,113,96,101,36,112,96,101,49,52,112,117,49,49,49,53,52,48,49,49,
|
||||
116,32,33,100,101,36,36,96,97,52,33,49,49,49,36,48,33,49,49,37,37,
|
||||
37,37,37,116,112,96,97,97,97,100,100,100,33,116,96,100,100,97,97,49,
|
||||
97,33,97,97,112,112,112,48,49,49,113,101,111,108,100,101,96,100,100,
|
||||
97,97,97,97,33,48,101,112,112,112,48,49,49,113,112,49,48,49,113,112,
|
||||
112,112,112,49,101,32,37,52,52,100,100,100,52,116,36,100,100,52,100,
|
||||
52,52,52,48,112,36,37,37,37,49,49,49,37,53,33,49,49,116,32,37,37,49,
|
||||
36,37,97,97,33,53,49,49,49,97,113,96,100,100,33,53,113,53,32,53,101,
|
||||
112,96,117,101,100,100,116,37,49,48,113,97,52,112,48,101,101,101,37,
|
||||
49,113,36,100,100,100,112,37,96,100,100,52,100,52,52,52,112,97,33,
|
||||
37,37,37,49,49,49,37,53,33,49,49,37,37,101,49,36,36,37,97,97,97,97,
|
||||
100,100,100,113,72,68,100,48,33,49,49,37,37,37,37,37,96,52,97,97,97,
|
||||
97,100,100,100,101,113,49,49,49,96,97,97,97,48,97,49,97,112,112,48,
|
||||
49,49,113,37,33,48,49,113,112,112,112,112,96,96,49,52,52,52,100,100,
|
||||
100,52,96,37,100,100,52,52,52,52,100,48,52,36,37,37,116,100,100,100,
|
||||
100,48,33,49,49,37,116,100,97,32,116,52,97,33,117,53,49,49,113,97,
|
||||
53,96,100,101,112,96,97,116,100,96,96,97,100,49,48,49,49,97,37,49,
|
||||
48,49,113,112,112,112,112,96,37,37,52,52,52,100,100,100,52,116,36,
|
||||
100,100,52,52,52,117,49,48,52,36,37,37,37,49,49,49,53,1,177,177,53,
|
||||
48,49,49,33,52,100,52,52,32,113,36,37,37,37,49,49,49,37,53,33,49,49,
|
||||
37,37,37,37,37,36,101,36,97,97,97,100,100,100,97,101,96,100,100,97,
|
||||
100,97,100,33,33,101,48,49,113,48,49,49,113,112,49,48,49,97,37,112,
|
||||
112,48,97,48,49,52,52,112,49,49,49,49,36,32,49,49,33,112,49,117,33,
|
||||
112,113,36,37,116,117,100,100,100,117,48,33,49,101,97,33,37,113,49,
|
||||
33,97,36,49,101,96,100,100,36,37,49,100,100,100,97,97,100,97,33,53,
|
||||
52,112,112,112,48,49,49,113,32,48,48,49,113,112,112,52,97,96,112,48,
|
||||
52,52,52,100,100,100,52,36,178,51,113,49,48,49,113,112,112,112,112,
|
||||
32,100,49,52,52,52,100,100,100,52,116,36,100,100,52,52,52,52,116,100,
|
||||
117,116,32,37,37,49,49,49,37,36,97,100,100,32,37,37,37,37,36,52,97,
|
||||
97,97,97,100,100,100,101,113,49,49,113,53,96,97,97,36,97,97,112,112,
|
||||
96,101,100,100,100,52,53,48,49,113,96,101,116,37,96,101,49,52,52,52,
|
||||
100,100,100,48,101,116,100,116,48,112,33,100,101,36,36,97,112,52,33,
|
||||
49,49,49,116,48,33,49,49,37,37,37,37,37,116,112,96,97,97,97,100,100,
|
||||
100,97,101,96,100,100,97,97,113,116,33,33,52,112,112,112,48,49,49,
|
||||
113,53,106,108,36,97,53,49,49,96,97,97,97,36,48,101,112,112,112,48,
|
||||
49,49,113,96,97,48,49,113,112,112,112,112,96,112,32,37,52,52,100,100,
|
||||
100,52,116,36,100,100,52,52,100,52,52,48,112,36,37,37,37,49,49,49,
|
||||
37,53,33,49,49,49,37,37,37,49,36,37,97,97,33,53,49,49,49,49,100,96,
|
||||
100,100,33,53,113,53,32,48,101,112,96,117,101,100,100,116,37,49,48,
|
||||
113,37,96,112,48,101,52,48,100,53,113,36,100,100,100,112,117,37,49,
|
||||
49,33,52,52,100,52,112,97,33,37,37,37,49,49,49,37,52,36,49,49,37,37,
|
||||
101,49,36,36,37,97,97,97,97,100,100,100,49,8,17,49,53,33,49,49,37,
|
||||
37,37,37,37,96,52,97,97,97,97,100,100,100,97,101,96,100,100,97,97,
|
||||
97,97,33,97,33,52,112,112,48,49,49,113,96,52,48,49,113,112,112,112,
|
||||
112,96,96,49,52,52,52,100,100,100,52,49,49,100,100,32,33,52,52,100,
|
||||
48,52,36,37,37,116,100,100,100,36,48,96,100,100,32,116,100,117,32,
|
||||
116,52,97,33,117,48,49,49,113,113,49,96,100,101,112,96,97,116,36,97,
|
||||
48,97,36,100,101,100,100,116,37,49,48,49,113,112,112,112,112,96,37,
|
||||
37,52,52,52,100,100,100,52,116,36,100,100,52,52,52,101,48,48,52,36,
|
||||
37,37,37,49,49,49,53,0,228,228,113,53,100,100,52,52,52,52,52,32,113,
|
||||
48,37,37,37,49,49,49,101,97,48,49,49,37,37,37,37,53,113,53,53,96,97,
|
||||
97,100,100,100,97,101,96,100,100,97,97,97,100,33,33,101,112,112,112,
|
||||
48,49,49,113,112,49,48,49,97,37,112,112,48,97,112,48,52,52,112,49,
|
||||
49,49,49,97,36,100,100,52,112,49,117,49,117,113,36,37,116,117,100,
|
||||
100,100,117,48,33,49,53,97,33,37,113,49,33,97,36,49,33,53,49,49,113,
|
||||
101,32,53,49,49,96,97,97,97,36,53,52,112,112,112,48,49,49,113,52,36,
|
||||
49,49,113,112,112,52,117,96,32,37,52,52,52,100,100,100,52,96,178,51,
|
||||
113,49,48,49,113,112,112,112,112,32,100,49,52,52,52,100,100,100,52,
|
||||
116,36,100,100,52,52,52,52,52,48,52,49,36,37,37,49,49,49,101,52,48,
|
||||
49,49,37,37,37,37,37,36,52,97,97,97,97,100,100,100,49,33,48,49,113,
|
||||
53,96,97,97,36,97,117,112,112,96,101,100,100,100,37,36,48,49,113,96,
|
||||
101,116,37,96,101,49,52,112,117,49,49,49,53,36,117,49,97,36,37,52,
|
||||
100,101,36,36,49,100,100,33,49,49,49,52,113,49,49,49,37,37,37,37,37,
|
||||
116,112,96,97,97,97,100,100,100,113,33,96,100,100,97,97,113,116,33,
|
||||
33,52,112,112,112,48,49,49,113,37,107,108,116,116,97,100,100,97,97,
|
||||
97,97,33,48,101,48,113,112,48,49,49,113,36,112,101,100,36,112,112,
|
||||
112,112,49,101,32,37,52,52,100,100,100,52,116,36,100,100,52,52,52,
|
||||
52,100,48,112,36,37,37,37,49,49,49,37,53,33,49,49,116,32,37,37,49,
|
||||
36,37,97,97,33,53,49,49,49,49,100,96,100,100,33,53,113,53,96,97,96,
|
||||
112,96,117,101,100,100,116,37,49,48,113,49,52,112,48,53,97,48,100,
|
||||
48,33,116,49,49,49,117,97,36,100,100,52,52,52,52,52,112,97,101,32,
|
||||
37,37,49,49,49,37,53,33,49,49,37,37,101,49,36,36,37,97,97,97,97,100,
|
||||
100,100,113,9,17,49,53,33,49,49,37,37,37,37,37,96,52,97,97,97,97,100,
|
||||
100,100,113,33,96,100,100,97,97,97,97,33,33,116,36,112,112,48,49,49,
|
||||
113,113,113,48,49,113,112,112,112,112,112,53,48,52,52,52,100,100,100,
|
||||
116,49,116,49,49,117,49,33,52,100,48,52,36,37,37,116,100,100,100,116,
|
||||
33,116,100,100,32,116,100,117,32,37,33,97,33,117,53,49,49,113,33,100,
|
||||
96,100,101,112,96,100,116,100,96,48,97,100,49,48,49,49,97,37,49,48,
|
||||
49,113,112,112,112,112,96,37,37,52,52,52,100,100,100,116,117,36,100,
|
||||
100,52,52,52,101,48,48,52,36,37,37,37,49,49,49,53,5,228,228,113,33,
|
||||
49,49,33,52,52,52,52,32,113,36,37,49,37,49,49,49,37,53,33,49,49,37,
|
||||
37,37,37,53,113,100,36,97,97,97,100,100,100,97,101,96,100,100,97,97,
|
||||
97,97,33,33,113,112,112,112,48,49,49,113,112,49,48,49,97,37,112,112,
|
||||
48,97,112,48,52,100,32,49,49,49,49,97,36,100,100,52,112,49,117,33,
|
||||
112,113,36,37,116,117,100,100,100,117,49,117,100,48,97,33,37,113,49,
|
||||
33,97,36,49,101,96,100,100,36,117,36,96,100,100,97,97,97,97,33,53,
|
||||
52,48,113,112,48,49,49,113,32,101,101,100,36,112,112,52,97,96,117,
|
||||
48,52,52,52,100,100,100,52,116,231,102,36,49,48,49,113,112,112,112,
|
||||
112,32,100,49,52,52,52,100,100,100,52,117,112,49,49,33,52,52,52,116,
|
||||
100,49,49,36,37,37,49,49,49,53,36,116,100,100,32,37,37,37,37,36,100,
|
||||
97,97,97,97,100,100,100,37,101,101,100,36,53,96,97,97,36,97,97,112,
|
||||
112,96,101,100,100,100,117,112,49,49,113,96,101,116,37,96,101,49,52,
|
||||
112,117,49,49,49,117,100,113,49,97,36,37,52,100,101,36,36,49,100,52,
|
||||
33,49,49,49,116,48,33,49,49,37,37,37,37,37,116,112,96,97,97,97,100,
|
||||
100,100,97,101,96,100,100,97,97,113,36,33,117,97,112,112,112,48,49,
|
||||
49,113,117,63,57,97,52,48,49,49,96,97,97,97,33,48,101,112,112,48,49,
|
||||
49,49,113,112,49,48,49,113,112,112,112,112,96,112,96,52,52,52,100,
|
||||
100,100,52,116,36,100,100,52,52,52,52,52,116,37,36,37,37,37,49,49,
|
||||
49,37,53,33,49,49,116,100,32,37,49,36,37,97,97,97,97,100,100,100,100,
|
||||
101,96,100,100,33,53,113,53,96,97,96,112,96,117,101,100,100,116,37,
|
||||
49,48,113,49,52,112,48,101,49,48,100,48,113,36,100,100,100,112,52,
|
||||
48,49,49,33,52,52,52,52,112,97,33,37,49,37,49,49,49,101,100,48,49,
|
||||
49,37,37,101,49,36,36,37,97,97,97,97,100,100,100,49,93,68,100,48,33,
|
||||
49,49,37,37,37,37,37,96,52,97,97,97,97,100,100,100,97,101,96,100,100,
|
||||
97,97,97,97,101,52,49,97,112,112,48,49,49,113,33,117,49,49,113,112,
|
||||
112,112,112,112,53,33,52,52,52,100,100,100,116,49,48,49,49,117,33,
|
||||
52,52,100,48,52,36,37,37,116,100,100,100,116,53,117,100,100,32,116,
|
||||
100,117,32,116,52,100,33,117,53,49,49,113,101,53,97,100,101,112,96,
|
||||
97,116,100,96,48,97,112,49,48,49,49,97,37,49,48,49,113,112,112,112,
|
||||
112,96,37,37,52,52,52,100,100,100,52,116,36,100,100,52,52,52,101,48,
|
||||
96,52,36,37,37,37,49,49,49,53,84,177,177,53,53,49,49,33,52,52,52,52,
|
||||
32,113,36,37,37,37,49,49,49,49,52,48,49,49,37,37,37,37,37,36,37,100,
|
||||
97,97,97,100,100,100,97,101,96,100,100,97,97,97,97,33,33,101,112,112,
|
||||
112,48,49,49,113,112,49,48,49,97,101,36,112,48,97,112,48,52,52,52,
|
||||
100,100,100,100,116,36,100,100,52,112,49,117,33,112,113,36,37,116,
|
||||
117,100,100,100,117,48,33,49,53,97,33,37,113,49,33,97,36,49,101,96,
|
||||
100,100,36,117,100,48,49,49,96,97,97,97,33,53,52,112,112,48,49,49,
|
||||
49,113,52,100,48,49,113,112,112,52,97,96,48,49,52,52,52,100,100,100,
|
||||
52,48,178,51,113,49,48,49,113,112,112,112,112,32,100,49,52,52,52,100,
|
||||
100,100,52,49,49,100,100,52,52,52,52,116,113,97,112,33,37,37,49,49,
|
||||
49,53,32,117,100,100,32,37,37,37,37,36,52,100,97,97,97,100,100,100,
|
||||
48,48,96,100,36,53,96,97,97,36,97,97,112,112,96,101,100,100,100,117,
|
||||
36,48,49,113,96,101,116,37,96,101,49,52,112,117,49,49,49,117,97,36,
|
||||
100,116,36,37,52,100,101,36,36,49,36,53,33,49,49,49,116,48,33,49,49,
|
||||
37,37,37,37,37,116,112,96,97,97,97,100,100,100,33,117,53,49,49,96,
|
||||
97,113,36,33,97,97,112,112,112,48,49,49,113,101,106,108,100,101,96,
|
||||
100,100,97,97,97,97,33,48,101,112,112,112,48,49,49,113,112,49,48,49,
|
||||
113,112,112,112,112,49,101,100,48,52,52,100,100,100,52,116,36,100,
|
||||
100,52,52,52,52,52,48,112,36,37,37,37,49,49,49,37,53,33,49,49,116,
|
||||
32,49,37,49,117,36,97,97,33,53,49,49,49,49,100,96,100,100,33,53,113,
|
||||
53,32,53,113,112,96,117,101,100,100,116,117,33,49,113,49,52,112,48,
|
||||
53,49,48,100,48,113,36,100,100,100,112,52,116,49,49,33,52,52,52,52,
|
||||
112,97,33,37,37,37,49,49,49,49,53,33,49,49,37,37,101,49,36,48,37,97,
|
||||
97,97,97,100,100,100,113,92,68,100,48,33,49,49,37,37,37,37,37,96,52,
|
||||
97,97,97,97,100,100,100,101,33,49,49,49,96,97,97,97,101,52,49,97,112,
|
||||
112,48,49,49,113,36,100,101,100,36,112,112,112,112,96,96,49,52,52,
|
||||
52,100,100,100,116,48,112,49,49,117,33,52,52,100,48,52,36,37,37,116,
|
||||
100,100,100,52,97,117,100,100,32,116,100,117,32,116,100,97,33,117,
|
||||
53,49,49,113,117,117,53,49,100,112,96,97,116,100,96,48,97,100,49,48,
|
||||
49,49,97,37,49,48,49,113,112,112,112,112,96,37,37,52,52,52,100,100,
|
||||
100,52,113,113,49,49,33,52,52,101,48,48,52,36,37,37,37,49,49,49,53,
|
||||
81,177,177,97,36,100,100,52,52,52,52,52,32,113,36,37,37,37,49,49,49,
|
||||
37,53,33,49,49,37,37,37,37,53,113,100,48,97,97,97,100,100,100,97,101,
|
||||
96,100,100,97,97,97,97,33,33,101,48,113,112,48,49,49,113,112,49,48,
|
||||
49,97,37,48,113,48,113,101,48,52,52,112,49,49,49,49,97,36,100,100,
|
||||
52,112,49,117,33,112,113,36,37,116,117,100,100,100,117,48,33,49,53,
|
||||
97,33,37,113,49,33,113,113,96,101,96,100,100,36,53,100,96,100,100,
|
||||
97,97,97,97,33,53,52,112,112,112,48,49,49,113,112,49,48,49,113,112,
|
||||
112,52,33,97,112,96,52,52,52,100,100,100,52,100,227,102,36,49,48,49,
|
||||
113,112,112,112,112,32,100,49,52,52,52,100,100,100,52,112,117,49,49,
|
||||
33,52,52,52,116,100,49,113,37,37,37,49,49,49,101,100,48,49,49,37,37,
|
||||
37,37,37,36,52,97,97,97,97,100,100,100,37,116,101,100,36,53,96,97,
|
||||
97,100,53,97,112,112,96,101,100,100,100,33,49,48,49,113,96,101,116,
|
||||
37,96,101,49,100,112,117,49,49,49,117,36,52,100,116,36,37,52,100,101,
|
||||
36,36,49,100,96,116,100,100,100,117,48,33,49,49,37,37,37,37,37,116,
|
||||
112,96,97,97,97,100,100,100,49,37,100,100,100,97,97,113,36,33,97,97,
|
||||
112,112,112,48,49,49,113,53,47,57,49,100,96,100,100,97,97,97,97,33,
|
||||
48,101,112,112,112,48,49,49,113,112,49,48,49,113,112,112,112,112,113,
|
||||
112,36,49,52,52,100,100,100,52,116,36,100,100,52,52,52,52,52,48,112,
|
||||
36,37,49,37,49,49,49,37,53,33,49,49,116,32,49,37,49,36,37,97,97,33,
|
||||
53,49,49,49,113,32,100,100,100,33,53,113,53,32,53,101,112,96,117,101,
|
||||
100,100,36,112,49,48,113,49,52,112,48,53,49,48,100,48,113,36,100,100,
|
||||
100,112,97,36,100,100,52,52,52,52,52,112,97,33,37,37,37,49,49,49,37,
|
||||
53,33,49,49,37,37,101,49,36,36,37,97,100,97,97,100,100,100,49,28,68,
|
||||
100,48,33,49,49,37,37,37,37,37,96,52,97,97,97,97,100,100,100,49,36,
|
||||
48,49,49,96,97,97,97,101,52,49,117,112,112,48,49,49,113,52,36,49,49,
|
||||
113,112,112,112,112,96,96,49,52,52,52,100,100,100,116,117,36,100,100,
|
||||
112,33,52,52,100,48,52,36,37,37,116,100,100,100,100,48,33,49,49,37,
|
||||
116,100,117,32,116,52,97,33,117,53,49,49,113,37,113,101,100,101,112,
|
||||
96,97,116,100,96,48,97,100,52,48,49,49,97,37,49,48,49,113,112,112,
|
||||
112,112,96,37,37,52,52,52,100,100,100,52,48,37,100,100,52,52,52,101,
|
||||
48,48,52,36,37,37,37,49,49,49,53,80,176,177,97,36,100,100,52,52,52,
|
||||
52,52,32,113,36,37,37,37,49,49,49,37,53,33,49,49,37,37,37,37,53,113,
|
||||
100,36,97,97,97,100,100,100,97,101,96,100,100,97,97,97,97,33,33,101,
|
||||
112,112,48,49,49,49,113,116,32,48,49,97,37,112,48,49,97,112,48,52,
|
||||
52,112,49,49,49,49,117,96,100,100,52,112,49,117,33,112,113,36,49,116,
|
||||
117,100,100,100,32,53,33,49,53,97,33,37,113,49,33,97,36,49,101,96,
|
||||
100,100,36,53,100,96,100,100,97,97,97,97,33,53,52,112,112,112,48,49,
|
||||
49,113,112,49,48,49,113,112,112,52,97,96,112,48,52,100,52,100,100,
|
||||
100,52,32,226,102,36,49,48,49,113,112,112,112,112,32,100,49,52,52,
|
||||
52,100,100,100,116,116,52,100,100,52,52,52,52,116,100,113,100,33,37,
|
||||
37,49,49,49,37,53,33,49,49,37,37,37,37,37,36,52,97,97,97,97,100,100,
|
||||
100,33,36,49,49,113,53,96,97,97,36,97,97,112,112,96,101,100,100,100,
|
||||
36,49,48,49,113,96,101,116,37,96,101,49,52,112,117,49,49,49,117,117,
|
||||
36,100,116,36,37,52,100,101,36,36,49,100,116,116,100,100,100,117,48,
|
||||
33,49,49,37,37,37,37,37,116,112,96,97,97,97,100,100,100,113,36,100,
|
||||
100,100,97,97,113,36,33,97,97,112,112,112,48,49,49,113,37,42,57,49,
|
||||
100,96,100,100,97,97,97,97,33,48,101,112,112,112,48,49,49,113,112,
|
||||
49,48,49,113,112,112,112,112,49,101,100,48,52,52,100,100,100,52,116,
|
||||
36,100,100,52,52,52,52,52,48,112,36,37,37,37,49,49,49,37,53,33,49,
|
||||
49,116,32,37,37,49,36,37,100,97,33,53,49,49,49,33,96,53,49,49,32,53,
|
||||
113,53,32,53,101,112,48,97,101,100,100,116,37,49,48,113,49,52,112,
|
||||
48,53,49,48,100,48,113,36,100,100,100,112,97,36,100,100,52,52,52,52,
|
||||
52,112,97,33,37,37,37,49,49,49,37,53,33,49,49,37,37,101,49,36,36,37,
|
||||
97,97,97,100,100,100,100,113,29,68,100,48,33,49,49,37,37,37,37,37,
|
||||
96,52,97,97,97,97,100,100,100,37,33,53,49,49,96,97,97,97,101,52,49,
|
||||
97,112,112,48,49,49,113,112,49,48,49,113,112,112,112,112,96,96,49,
|
||||
52,52,52,100,100,100,52,33,33,49,49,117,33,52,52,100,48,52,36,37,37,
|
||||
116,100,100,100,52,49,32,49,49,37,116,100,117,32,116,52,97,33,117,
|
||||
53,49,49,113,53,100,96,100,101,112,96,97,116,100,96,48,97,100,97,48,
|
||||
49,49,97,37,49,48,49,113,112,112,112,112,96,37,37,52,52,52,100,100,
|
||||
100,116,96,52,100,100,52,52,52,101,48,48,52,36,37,37,37,49,49,49,53,
|
||||
85,176,177,97,36,100,100,52,52,52,52,52,32,113,36,37,37,37,49,49,49,
|
||||
37,53,33,49,49,37,37,37,37,53,113,52,113,96,97,97,100,100,100,97,101,
|
||||
96,100,100,97,97,97,97,33,33,101,112,112,112,48,49,49,113,112,49,48,
|
||||
49,97,37,112,112,48,97,112,96,52,52,112,49,49,49,49,97,36,100,100,
|
||||
52,112,49,117,33,112,113,36,37,49,116,100,100,100,53,33,96,100,48,
|
||||
97,33,37,113,49,33,97,36,49,101,96,100,100,36,53,100,96,100,100,97,
|
||||
97,97,97,33,53,52,112,112,112,48,49,49,113,112,49,48,49,113,112,112,
|
||||
52,97,112,101,48,52,52,52,100,100,100,52,52,227,102,36,49,48,49,113,
|
||||
112,112,112,112,32,100,49,52,52,52,100,100,100,116,96,117,100,100,
|
||||
52,52,52,52,116,100,49,49,36,37,37,49,49,49,37,53,33,49,49,37,37,37,
|
||||
37,37,36,52,97,97,97,97,100,100,100,113,49,48,49,113,53,96,97,97,36,
|
||||
97,97,112,112,96,101,100,100,100,96,100,48,49,113,96,101,116,37,96,
|
||||
101,49,52,32,117,49,49,49,53,100,32,100,116,36,37,52,100,101,36,36,
|
||||
49,100,52,36,49,49,49,37,53,33,49,49,37,37,37,37,37,116,112,96,97,
|
||||
97,97,100,100,100,53,112,53,49,49,96,97,113,36,33,97,97,112,112,112,
|
||||
48,49,49,113,117,46,57,49,100,96,100,100,97,97,97,97,33,48,101,112,
|
||||
112,112,48,49,49,113,112,49,48,49,113,112,112,112,112,49,101,49,37,
|
||||
52,52,100,100,100,52,116,36,100,100,52,52,52,52,52,48,112,36,37,37,
|
||||
37,49,49,49,37,53,33,49,49,116,32,37,37,49,36,37,100,97,33,53,49,49,
|
||||
49,49,100,96,100,100,33,53,113,53,32,53,101,112,96,117,101,100,100,
|
||||
116,37,49,48,113,49,52,112,48,53,49,48,100,48,113,116,100,100,100,
|
||||
32,97,36,100,100,52,52,52,52,52,112,97,33,37,37,37,49,49,49,37,53,
|
||||
33,49,49,37,37,101,49,36,117,36,97,97,97,97,100,100,100,49,25,68,100,
|
||||
48,33,49,49,37,37,37,37,37,96,52,97,97,97,97,100,100,100,37,96,53,
|
||||
49,49,96,97,97,97,101,52,49,97,48,113,48,49,49,113,112,49,48,49,113,
|
||||
112,112,112,112,96,96,49,52,52,52,100,100,100,52,116,36,100,100,112,
|
||||
33,52,52,100,48,52,36,37,37,116,100,100,100,100,117,117,100,100,32,
|
||||
116,100,117,32,116,52,97,33,117,48,49,49,113,48,100,96,100,101,112,
|
||||
96,97,116,100,96,48,97,100,113,49,49,49,97,37,49,48,49,113,112,112,
|
||||
112,112,96,37,37,52,52,52,100,100,100,116,117,36,100,100,52,52,52,
|
||||
101,48,48,52,36,37,37,37,49,49,49,97,65,176,177,97,36,100,100,52,52,
|
||||
52,52,52,32,113,36,37,37,37,49,49,49,37,53,33,49,49,37,37,37,37,53,
|
||||
113,100,36,97,97,97,100,100,100,97,101,96,100,100,97,97,97,97,33,33,
|
||||
101,112,112,112,48,49,49,113,96,33,49,49,97,37,112,112,48,97,112,48,
|
||||
100,52,112,49,49,49,49,97,36,100,100,52,112,49,117,33,112,113,36,37,
|
||||
116,32,49,49,49,101,48,37,49,53,97,33,37,113,49,33,97,36,49,101,96,
|
||||
100,100,36,53,100,96,100,100,97,97,97,97,33,53,52,112,112,112,48,49,
|
||||
49,113,32,113,101,100,36,112,112,52,97,96,112,48,52,52,52,100,100,
|
||||
100,52,112,226,102,36,49,48,49,113,112,112,112,112,32,100,49,52,52,
|
||||
52,100,100,100,52,116,36,100,100,52,52,52,52,116,52,52,49,36,37,37,
|
||||
49,49,49,37,53,33,49,49,37,37,37,37,37,36,52,97,97,97,97,100,100,100,
|
||||
113,97,48,49,113,53,96,97,97,36,97,97,112,48,97,101,100,100,100,112,
|
||||
101,48,49,113,96,101,116,37,96,101,49,52,112,117,49,49,49,33,116,36,
|
||||
100,116,36,37,52,100,101,36,36,49,100,52,33,49,49,49,37,53,33,49,49,
|
||||
37,37,37,37,37,116,112,96,97,97,97,100,100,100,97,101,96,100,100,97,
|
||||
97,113,36,33,97,97,112,112,112,48,49,49,113,101,43,57,49,100,96,100,
|
||||
100,97,97,97,97,33,48,101,112,112,112,48,49,49,113,52,100,48,49,113,
|
||||
112,112,112,112,49,37,101,48,52,52,100,100,100,52,116,36,100,100,52,
|
||||
52,52,52,52,48,112,36,37,37,37,49,49,49,37,53,33,49,49,116,32,37,37,
|
||||
49,36,37,97,97,97,100,100,100,100,100,101,96,100,100,33,53,113,53,
|
||||
32,53,101,112,96,117,101,100,100,116,97,32,100,36,49,52,112,48,53,
|
||||
49,48,100,48,113,36,100,100,100,112,97,36,100,100,52,52,52,52,52,112,
|
||||
97,33,37,37,37,49,49,49,37,53,33,49,49,37,37,101,49,36,36,37,97,97,
|
||||
97,97,100,100,100,113,24,68,100,48,33,49,49,37,37,37,37,37,96,52,97,
|
||||
97,97,97,100,100,100,33,97,48,49,49,96,97,97,97,101,52,49,97,112,112,
|
||||
48,49,49,113,112,49,48,49,113,112,112,112,112,96,96,49,52,52,52,100,
|
||||
100,100,52,116,36,100,100,112,33,52,52,100,48,52,36,37,37,116,100,
|
||||
100,100,100,33,48,49,49,37,116,100,117,32,116,52,97,33,117,53,49,49,
|
||||
113,48,100,96,100,101,112,96,97,116,100,96,48,97,100,49,48,49,49,33,
|
||||
36,49,48,49,113,112,112,112,112,96,37,37,52,52,52,100,100,100,52,116,
|
||||
36,100,100,52,52,52,101,48,48,52,36,37,37,37,49,49,49,53,65,176,177,
|
||||
97,36,100,100,52,52,52,52,52,32,113,36,37,37,37,49,49,49,37,53,33,
|
||||
49,49,37,37,37,37,53,113,100,36,97,97,100,100,100,100,100,101,96,100,
|
||||
100,97,97,97,97,33,33,101,112,112,112,48,49,49,113,112,49,48,49,97,
|
||||
37,112,112,48,97,112,48,52,52,112,49,49,49,49,97,36,100,100,52,112,
|
||||
49,117,33,112,113,36,37,116,117,100,100,100,53,53,96,100,48,97,33,
|
||||
37,113,49,33,97,36,49,101,96,100,100,36,53,100,96,100,100,97,97,97,
|
||||
97,33,53,52,112,112,112,48,49,49,113,112,49,48,49,113,112,112,52,97,
|
||||
96,112,48,52,52,52,100,100,100,52,36,183,51,49,49,49,49,113,112,112,
|
||||
112,112,48,49,33,52,52,52,36,48,49,49,49,49,49,49,33,52,52,52,52,49,
|
||||
100,112,37,37,37,33,100,100,100,100,100,100,100,32,37,37,37,37,49,
|
||||
49,96,97,97,97,32,49,49,49,49,49,49,49,96,97,97,97,100,100,36,112,
|
||||
112,112,48,49,49,49,49,49,49,49,113,112,48,113,112,48,49,33,52,52,
|
||||
52,36,48,49,49,49,49,49,49,33,49,52,100,113,53,100,112,48,112,37,33,
|
||||
100,100,100,100,100,100,100,32,37,37,37,37,37,49,96,97,97,97,32,49,
|
||||
49,49,49,49,49,49,96,97,49,117,97,97,36,112,112,112,48,96,100,100,
|
||||
97,127,108,100,100,100,100,100,117,32,116,117,117,100,36,117,117,117,
|
||||
117,53,49,49,49,49,49,49,113,117,117,117,117,53,49,33,116,37,48,49,
|
||||
49,49,49,49,49,49,49,33,52,52,52,52,100,100,52,32,37,37,117,49,49,
|
||||
49,49,49,49,49,37,33,100,100,100,32,49,116,97,32,37,49,49,49,49,49,
|
||||
49,49,49,49,96,100,97,100,97,36,53,32,112,112,48,49,49,49,49,49,49,
|
||||
49,49,113,53,49,113,48,49,33,36,112,112,48,49,49,49,49,49,49,97,101,
|
||||
36,112,112,48,49,33,52,52,52,52,100,100,100,100,100,100,100,52,52,
|
||||
52,52,100,100,100,100,100,100,100,117,100,100,52,88,17,49,49,49,49,
|
||||
49,49,49,49,49,49,49,49,49,49,49,49,49,49,49,49,49,49,49,49,49,49,
|
||||
49,49,49,49,33,100,100,36,117,53,49,49,49,49,49,49,113,112,112,112,
|
||||
112,48,49,49,33,52,52,100,100,100,100,100,100,100,100,100,100,100,
|
||||
113,117,101,100,36,53,49,49,117,49,49,49,49,49,49,49,113,48,116,100,
|
||||
112,49,49,49,33,100,100,100,100,100,100,100,100,100,100,117,117,36,
|
||||
53,116,100,36,37,100,100,100,100,100,100,100,100,100,100,100,36,53,
|
||||
49,49,49,49,49,49,49,49,49,49,49,49,49,49,49,49,49,49,49,49,97,101,
|
||||
100,112,117,117,117,49,49,49,97,85,229,228,100,100,100,100,100,100,
|
||||
100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,
|
||||
100,100,100,100,100,100,100,52,100,36,33,116,100,100,100,100,100,100,
|
||||
100,37,37,37,37,37,100,100,36,97,97,33,49,49,49,49,49,49,49,49,37,
|
||||
37,49,97,33,49,49,96,97,97,49,97,100,100,100,100,100,100,100,100,49,
|
||||
100,97,100,100,100,36,112,112,112,48,49,49,49,49,49,49,49,49,49,37,
|
||||
113,48,49,49,33,52,52,52,100,100,100,100,100,100,100,100,97,100,100,
|
||||
100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,32,49,
|
||||
37,101,53,49,53,96,117,117,101,100,100,100,96,183,51,49,49,49,49,97,
|
||||
117,117,117,117,101,100,112,117,117,117,117,49,49,49,49,49,49,49,117,
|
||||
117,117,117,117,49,49,116,117,117,112,37,49,49,49,49,49,49,49,48,49,
|
||||
49,49,49,100,36,117,100,100,100,53,49,49,49,49,49,49,113,117,117,117,
|
||||
48,96,100,116,117,117,117,37,48,49,49,49,49,49,49,97,117,101,116,53,
|
||||
97,100,112,117,117,117,117,49,49,49,49,49,49,49,33,52,112,49,33,100,
|
||||
100,32,116,117,117,117,100,100,100,100,100,100,100,117,100,117,117,
|
||||
117,100,36,117,117,117,117,53,49,49,49,49,49,49,113,117,117,117,53,
|
||||
96,100,36,117,112,112,96,101,100,100,49,127,76,100,28,102,97,110,108,
|
||||
52,33,48,49,49,96,97,97,97,97,100,96,112,112,112,48,49,49,113,117,
|
||||
49,48,49,113,112,112,112,112,49,101,100,48,52,52,100,100,100,116,117,
|
||||
36,100,100,52,52,52,52,52,48,112,36,37,37,37,49,49,49,37,53,33,49,
|
||||
49,116,32,37,37,49,36,37,97,97,33,53,49,49,49,49,100,96,100,100,36,
|
||||
53,113,53,32,53,101,112,96,37,48,49,49,97,53,113,101,36,49,52,112,
|
||||
48,53,113,49,100,48,113,36,100,100,100,48,117,48,49,49,33,52,52,52,
|
||||
52,112,97,33,37,37,37,49,49,49,37,53,33,49,49,37,37,101,49,36,36,37,
|
||||
97,97,97,97,100,100,100,117,76,102,32,59,57,49,100,96,100,100,97,97,
|
||||
97,97,33,48,101,112,112,112,48,49,49,113,32,101,101,100,36,112,112,
|
||||
112,112,97,96,100,48,52,52,100,100,100,52,96,113,49,49,33,52,52,52,
|
||||
52,112,113,36,37,37,37,49,49,49,37,116,117,100,100,117,32,37,37,49,
|
||||
116,37,97,97,33,53,49,49,49,113,37,97,100,100,33,53,113,53,32,53,101,
|
||||
112,48,97,101,100,100,116,37,49,48,113,49,52,112,48,53,49,48,100,48,
|
||||
113,36,100,100,100,112,97,36,100,100,52,52,52,52,52,52,116,33,37,37,
|
||||
37,49,49,49,37,52,48,49,49,37,37,101,49,36,36,117,97,97,97,97,100,
|
||||
100,100,49,76,102,117,110,108,100,101,96,100,100,100,97,97,97,33,48,
|
||||
101,112,112,112,48,49,49,113,112,49,48,49,113,112,112,112,112,97,96,
|
||||
100,48,52,52,100,100,100,52,116,36,100,100,52,52,52,52,52,48,112,36,
|
||||
37,37,37,49,49,49,101,33,96,100,100,117,32,37,37,49,48,37,97,97,33,
|
||||
53,49,49,49,49,100,96,100,100,36,53,113,53,32,53,101,112,48,97,101,
|
||||
100,100,116,97,32,100,36,49,52,112,48,53,113,49,100,48,113,36,100,
|
||||
100,100,48,117,116,49,49,49,33,52,52,52,112,97,33,37,37,37,49,49,49,
|
||||
37,53,33,49,49,49,49,101,49,36,36,37,97,97,97,97,100,100,100,37,76,
|
||||
102,52,110,108,52,101,101,100,100,97,97,97,100,33,48,101,112,112,112,
|
||||
48,49,49,113,100,36,49,49,113,112,112,112,112,49,101,100,48,52,52,
|
||||
100,100,100,52,49,97,100,100,52,52,52,52,52,112,113,36,37,37,37,49,
|
||||
49,49,37,53,33,49,49,116,32,37,37,49,36,37,97,97,33,53,49,49,49,97,
|
||||
48,100,100,100,33,53,113,53,32,53,101,112,96,37,48,49,49,97,37,49,
|
||||
48,113,49,52,112,48,53,49,48,100,48,113,36,100,100,100,112,97,36,100,
|
||||
100,52,52,52,52,52,112,97,33,37,37,37,49,49,49,101,37,117,100,100,
|
||||
32,37,101,49,36,36,37,97,97,97,97,100,100,100,33,24,51,48,110,108,
|
||||
52,96,48,49,49,49,96,97,97,33,48,101,112,112,112,48,49,49,113,32,53,
|
||||
48,49,113,112,112,112,112,100,101,48,52,52,52,100,100,100,52,49,49,
|
||||
100,100,52,52,52,52,52,112,113,36,37,37,37,49,49,49,37,53,33,49,49,
|
||||
116,32,37,37,49,36,37,97,97,33,53,49,49,49,97,33,96,100,100,36,53,
|
||||
113,53,32,53,101,112,48,113,48,49,49,97,48,100,100,36,49,52,112,48,
|
||||
97,100,101,53,53,112,36,100,100,100,112,32,32,100,100,52,52,52,52,
|
||||
52,112,113,36,37,37,37,49,49,49,37,53,33,49,49,49,49,101,49,36,36,
|
||||
37,97,97,97,97,100,100,100,53,24,51,117,59,57,49,100,96,100,100,97,
|
||||
97,97,97,33,48,101,112,112,112,48,49,49,113,112,49,48,49,113,112,112,
|
||||
112,112,49,101,100,48,52,52,100,100,100,52,116,36,100,100,52,52,52,
|
||||
52,52,48,112,36,37,37,37,49,49,49,37,96,100,100,100,117,32,37,37,49,
|
||||
36,112,96,97,33,53,49,49,49,49,100,96,100,100,33,53,113,53,32,53,101,
|
||||
112,96,117,101,100,100,116,37,49,48,49,100,49,112,48,53,49,48,100,
|
||||
48,113,36,100,100,100,112,97,36,100,100,52,52,52,52,52,112,97,33,37,
|
||||
37,37,49,49,49,101,101,101,100,100,32,37,101,49,36,36,37,97,97,97,
|
||||
97,100,100,100,113,77,102,37,110,108,48,48,96,100,100,97,97,97,97,
|
||||
33,48,113,112,112,112,48,49,49,113,116,36,100,100,100,36,112,112,112,
|
||||
49,101,100,48,52,52,100,100,100,52,116,36,100,100,52,52,52,52,52,48,
|
||||
112,36,37,37,37,49,49,49,37,53,33,49,49,116,32,37,37,49,36,37,97,97,
|
||||
33,53,49,49,49,49,100,96,100,100,97,97,36,53,32,53,101,112,96,117,
|
||||
101,100,100,116,113,48,100,100,101,49,112,48,53,49,48,52,53,112,36,
|
||||
100,100,100,112,116,49,100,100,52,52,52,52,52,112,97,33,37,37,37,49,
|
||||
49,49,101,100,36,49,49,37,37,49,112,33,116,112,96,97,97,97,100,100,
|
||||
100,101,77,102,36,58,57,49,100,96,100,100,97,97,97,97,33,48,101,112,
|
||||
112,112,48,49,49,113,112,49,48,49,113,112,112,112,112,49,101,100,96,
|
||||
52,52,100,100,100,52,37,49,100,100,52,52,52,52,52,96,112,36,37,37,
|
||||
37,49,49,49,37,52,36,49,49,49,37,37,37,49,36,37,97,97,33,53,49,49,
|
||||
49,33,112,96,100,100,33,53,113,53,32,53,101,112,96,117,101,100,100,
|
||||
116,37,49,48,113,52,96,37,48,117,100,101,113,48,113,36,100,100,100,
|
||||
112,97,36,100,100,52,52,52,52,52,112,49,37,37,37,37,49,49,49,37,53,
|
||||
33,49,49,37,37,101,49,36,36,37,97,97,97,97,100,100,100,97,73,102,33,
|
||||
58,57,117,32,53,49,49,96,97,97,97,33,48,113,112,112,112,48,49,49,113,
|
||||
36,36,100,100,36,48,113,112,112,49,101,100,48,52,52,100,100,100,52,
|
||||
113,113,49,49,33,52,52,52,52,48,112,36,37,37,37,49,49,49,37,53,33,
|
||||
49,49,49,37,37,37,49,36,37,97,97,33,53,49,49,49,53,116,49,49,49,96,
|
||||
97,100,97,33,53,101,112,96,117,101,100,100,116,112,112,101,36,49,52,
|
||||
112,48,33,116,101,101,96,113,36,100,100,100,112,97,36,100,100,52,52,
|
||||
52,52,52,112,97,33,37,37,37,49,49,49,37,96,97,100,100,32,37,37,53,
|
||||
36,36,37,97,97,97,97,100,100,100,117,73,102,96,58,57,49,100,96,100,
|
||||
100,97,97,97,97,33,48,101,112,112,112,48,49,49,113,112,49,48,49,113,
|
||||
112,112,112,112,49,101,100,96,52,52,100,100,100,52,116,36,100,100,
|
||||
100,52,52,52,52,48,112,36,37,37,37,49,49,49,101,97,48,49,49,116,32,
|
||||
37,37,49,36,37,97,97,33,53,49,49,49,49,100,96,100,100,33,48,113,48,
|
||||
32,53,101,112,96,117,101,100,100,116,37,49,48,49,37,37,113,48,53,49,
|
||||
48,32,32,113,36,100,100,100,112,117,96,100,100,52,52,52,52,52,32,97,
|
||||
33,37,37,37,49,49,49,37,53,33,49,49,37,37,101,49,36,36,37,97,97,97,
|
||||
97,100,100,100,49,73,102,53,58,57,117,97,101,100,100,97,97,97,97,33,
|
||||
48,101,112,112,112,48,49,49,113,32,97,100,100,36,112,48,113,112,49,
|
||||
101,100,48,52,52,100,100,100,116,52,53,49,49,33,52,52,52,52,48,112,
|
||||
36,37,37,37,49,49,49,37,53,33,49,49,49,37,37,37,49,36,37,97,97,33,
|
||||
53,49,49,49,49,100,96,100,100,33,48,113,53,32,53,101,112,96,117,101,
|
||||
100,100,116,100,48,100,36,101,97,112,48,49,100,101,37,97,113,36,100,
|
||||
100,100,112,36,32,49,49,33,52,52,52,52,112,97,33,37,37,37,49,49,49,
|
||||
101,37,97,100,100,32,37,37,112,33,36,37,97,97,97,97,100,100,100,37,
|
||||
73,102,116,111,108,100,101,96,100,100,97,97,97,97,33,48,113,112,112,
|
||||
112,48,49,49,113,112,49,48,49,113,112,112,112,112,49,101,100,96,52,
|
||||
52,100,100,100,52,116,36,100,100,100,52,100,52,100,48,112,36,37,37,
|
||||
49,49,49,49,101,32,117,100,100,117,32,37,37,49,36,37,97,97,33,53,49,
|
||||
49,49,33,33,48,49,49,32,53,113,53,32,53,101,112,96,117,101,100,100,
|
||||
116,37,49,48,49,53,52,112,48,53,49,48,32,32,113,36,100,100,100,112,
|
||||
97,36,100,100,52,52,52,52,52,32,97,33,37,37,37,49,49,49,37,53,33,49,
|
||||
49,37,37,101,49,36,36,37,97,97,97,97,100,100,100,33,29,51,112,111,
|
||||
108,112,101,53,49,49,96,100,97,97,33,48,101,112,112,112,48,49,49,113,
|
||||
37,33,48,49,113,112,112,48,113,49,101,100,48,52,52,100,100,100,52,
|
||||
101,96,100,100,52,52,52,52,52,48,112,36,37,37,37,49,49,49,101,37,32,
|
||||
49,49,49,37,37,37,49,36,37,97,100,33,53,49,49,49,49,100,96,100,100,
|
||||
33,53,49,96,33,53,101,112,96,117,101,100,100,116,112,96,100,100,112,
|
||||
33,36,48,53,49,48,32,37,113,36,100,100,100,48,96,36,100,100,52,52,
|
||||
52,52,52,112,97,33,37,37,37,49,49,49,37,112,33,49,49,37,37,101,36,
|
||||
37,36,37,97,97,97,97,100,100,100,53,29,51,53,58,57,49,100,96,100,100,
|
||||
97,97,97,97,33,48,101,112,112,112,48,49,49,113,112,49,48,49,113,112,
|
||||
112,112,112,49,101,32,37,52,52,100,100,100,52,116,36,100,100,52,100,
|
||||
52,52,52,48,112,36,37,37,37,49,49,49,37,53,33,49,49,116,32,37,37,49,
|
||||
36,37,97,97,33,53,49,49,49,97,113,96,100,100,33,53,113,53,32,53,101,
|
||||
112,96,117,101,100,100,116,37,49,48,113,97,52,112,48,101,101,101,37,
|
||||
49,113,36,100,100,100,112,37,96,100,100,52,100,52,52,52,112,97,33,
|
||||
37,37,37,49,49,49,37,53,33,49,49,37,37,101,49,36,36,37,97,97,97,97,
|
||||
100,100,100,113,72,102,101,111,108,100,101,96,100,100,97,97,97,97,
|
||||
33,48,101,112,112,112,48,49,49,113,113,116,100,100,36,112,112,112,
|
||||
48,100,112,100,48,52,52,100,100,100,116,97,32,100,100,52,52,52,52,
|
||||
52,48,112,36,37,37,37,49,49,49,37,112,33,49,49,37,37,37,37,49,36,37,
|
||||
97,97,33,53,49,49,49,49,100,96,100,100,33,53,113,48,32,53,101,112,
|
||||
96,117,101,100,100,116,112,37,48,113,49,52,112,48,53,49,48,112,48,
|
||||
113,36,100,100,100,112,97,36,100,100,52,52,52,52,52,112,97,33,37,37,
|
||||
37,49,49,49,37,53,33,49,49,37,37,101,117,36,36,37,97,97,97,97,100,
|
||||
100,100,101,72,102,100,107,108,36,33,49,49,49,96,97,100,97,33,48,101,
|
||||
112,112,112,48,49,49,113,112,49,48,49,113,112,112,112,112,96,112,100,
|
||||
48,52,52,100,100,100,52,116,36,100,100,52,100,52,100,52,48,112,36,
|
||||
49,49,37,49,49,49,37,53,33,49,49,116,32,37,37,49,36,49,97,97,33,53,
|
||||
49,49,49,97,32,48,49,49,32,53,113,53,32,53,101,112,96,117,101,100,
|
||||
100,116,37,49,48,113,52,52,112,48,53,49,48,100,48,113,36,100,100,100,
|
||||
112,48,97,100,100,52,52,100,52,52,112,97,33,37,37,37,49,49,49,37,32,
|
||||
33,49,49,37,37,101,49,36,36,37,97,97,97,97,100,100,100,97,8,51,96,
|
||||
107,108,100,101,96,100,100,97,97,97,97,33,48,101,112,112,112,48,49,
|
||||
49,113,112,49,48,49,113,112,112,112,112,49,117,113,33,52,52,100,100,
|
||||
100,52,48,36,49,49,33,52,52,52,52,48,112,36,37,37,37,49,49,49,53,101,
|
||||
101,100,100,117,32,37,37,49,36,37,97,97,33,53,49,49,49,113,116,96,
|
||||
100,100,33,53,113,53,32,53,101,112,112,112,48,49,49,97,52,113,49,113,
|
||||
97,96,37,48,53,49,48,36,97,113,36,100,100,100,112,97,36,100,100,52,
|
||||
52,52,52,52,112,97,33,37,37,37,49,49,49,37,53,33,49,49,37,37,101,113,
|
||||
37,36,112,96,97,97,97,100,100,100,117,8,51,37,106,108,36,97,53,49,
|
||||
49,96,97,97,97,36,48,101,112,112,112,48,49,49,113,96,97,48,49,113,
|
||||
112,112,112,112,96,112,32,37,52,52,100,100,100,52,116,36,100,100,52,
|
||||
52,100,52,52,48,112,36,37,37,37,49,49,49,37,53,33,49,49,49,37,37,37,
|
||||
49,36,37,97,97,33,53,49,49,49,49,100,96,100,100,33,53,113,53,32,48,
|
||||
101,112,96,117,101,100,100,116,37,49,48,113,37,96,112,48,101,52,48,
|
||||
100,53,113,36,100,100,100,112,117,37,49,49,33,52,52,100,52,112,97,
|
||||
33,37,37,37,49,49,49,37,52,36,49,49,37,37,101,49,36,36,37,97,97,97,
|
||||
97,100,100,100,49,8,51,116,107,108,100,101,96,100,100,97,97,97,97,
|
||||
33,48,101,112,112,112,48,49,49,113,112,49,48,49,113,112,112,112,112,
|
||||
96,112,32,37,52,52,100,100,100,52,48,37,100,100,52,52,52,52,52,48,
|
||||
112,36,37,37,37,49,49,49,101,100,36,49,49,96,32,37,37,49,36,37,97,
|
||||
97,33,53,49,49,49,33,36,48,49,49,32,53,113,53,32,53,101,112,96,53,
|
||||
100,100,100,116,116,36,48,113,49,52,112,48,53,97,48,100,48,33,113,
|
||||
49,49,49,117,97,36,100,100,52,52,52,52,52,112,97,33,37,37,37,49,49,
|
||||
49,37,53,33,49,49,37,37,101,49,36,36,37,97,97,97,97,100,100,100,37,
|
||||
8,51,33,107,108,52,117,97,100,100,97,97,97,97,33,48,37,113,112,112,
|
||||
48,49,49,113,52,36,49,49,113,112,112,112,112,49,117,113,33,52,52,100,
|
||||
100,100,52,116,36,100,100,52,52,52,100,52,48,112,36,37,37,37,49,49,
|
||||
49,37,53,33,49,49,116,32,37,37,49,36,37,97,97,33,53,49,49,49,49,100,
|
||||
96,100,100,33,53,113,53,113,53,101,112,96,117,101,100,100,116,37,49,
|
||||
48,113,49,52,112,48,53,49,48,100,48,49,112,49,49,49,117,36,112,49,
|
||||
49,33,52,52,52,100,112,97,33,37,37,37,49,49,49,101,97,48,49,49,37,
|
||||
37,101,113,37,36,112,96,97,97,97,100,100,100,33,12,51,48,107,108,100,
|
||||
101,96,100,100,97,97,97,97,33,48,101,112,112,112,48,49,49,113,112,
|
||||
49,48,49,113,112,112,112,112,96,112,100,48,52,52,100,100,100,52,113,
|
||||
96,100,100,52,52,52,52,52,48,112,36,37,37,37,49,49,49,101,36,96,100,
|
||||
100,117,32,37,37,49,36,117,97,97,33,53,49,49,49,53,48,96,100,100,33,
|
||||
53,113,53,32,53,101,112,96,117,101,100,100,116,48,116,101,36,49,52,
|
||||
112,48,53,49,48,100,48,49,37,100,100,100,112,100,101,100,100,52,52,
|
||||
52,52,52,112,97,33,37,37,37,49,49,49,101,37,32,49,49,37,37,101,113,
|
||||
37,36,112,96,97,97,97,100,100,100,53,12,51,117,106,108,116,116,97,
|
||||
100,100,97,97,97,97,33,48,101,48,113,112,48,49,49,113,36,112,101,100,
|
||||
36,112,112,112,112,49,101,32,37,52,52,100,100,100,52,116,36,100,100,
|
||||
52,52,52,52,100,48,112,36,37,37,37,49,49,49,37,53,33,49,49,116,32,
|
||||
37,37,49,36,37,97,97,33,53,49,49,49,49,100,96,100,100,33,53,113,53,
|
||||
96,97,96,112,96,117,101,100,100,116,37,49,48,113,49,52,112,48,53,97,
|
||||
48,100,48,33,116,49,49,49,117,97,36,100,100,52,52,52,52,52,112,97,
|
||||
101,32,37,37,49,49,49,37,53,33,49,49,37,37,101,49,36,36,37,97,97,97,
|
||||
97,100,100,100,113,9,51,36,107,108,100,101,96,100,100,97,97,97,97,
|
||||
33,48,101,112,112,112,48,49,49,113,116,32,48,49,113,112,112,112,112,
|
||||
96,32,53,33,52,52,100,100,100,116,116,52,100,100,52,52,52,52,52,116,
|
||||
37,36,37,37,37,49,49,49,117,36,117,100,100,117,100,32,37,49,36,37,
|
||||
97,97,33,53,49,49,49,117,32,53,49,49,32,53,113,53,96,97,96,112,96,
|
||||
117,101,100,100,116,32,49,48,113,49,52,48,49,53,49,48,100,48,113,36,
|
||||
100,100,100,112,97,36,100,100,52,52,52,52,52,112,97,33,37,37,37,49,
|
||||
49,49,117,53,33,49,49,37,37,101,49,36,36,37,97,97,97,97,100,100,100,
|
||||
101,9,51,113,63,57,33,53,48,49,49,96,97,97,97,33,48,101,112,48,113,
|
||||
48,49,49,113,112,49,48,49,113,112,112,112,112,49,101,100,48,52,52,
|
||||
100,100,100,52,116,36,100,100,52,52,52,52,52,48,48,37,37,37,37,49,
|
||||
49,49,37,53,33,49,49,116,32,37,37,49,36,37,97,97,36,48,49,49,49,49,
|
||||
100,96,100,100,33,53,113,53,32,53,101,112,96,117,101,100,100,116,53,
|
||||
113,101,36,49,52,112,48,53,49,48,100,48,113,36,100,100,100,112,101,
|
||||
32,100,100,52,52,52,52,52,112,97,33,49,37,37,49,49,49,37,112,116,100,
|
||||
100,32,37,101,49,36,116,37,97,97,97,97,100,100,100,97,93,102,33,63,
|
||||
57,49,100,96,100,100,97,97,97,97,33,48,101,112,112,112,48,49,49,113,
|
||||
116,97,101,100,36,112,112,112,112,49,101,100,48,52,52,100,100,100,
|
||||
116,48,112,49,49,33,52,52,52,52,48,48,37,37,37,37,49,49,49,53,52,53,
|
||||
49,49,116,32,37,37,49,36,37,97,97,33,53,49,49,49,117,97,101,100,100,
|
||||
33,53,113,53,32,53,101,112,96,117,101,100,100,116,49,101,101,36,49,
|
||||
52,112,48,53,49,48,100,48,113,36,100,100,100,112,97,36,100,100,52,
|
||||
52,52,52,52,112,97,33,37,37,37,49,49,49,37,53,33,49,49,37,37,101,49,
|
||||
36,116,37,97,97,97,97,100,100,100,117,93,102,96,63,57,97,52,48,49,
|
||||
49,96,97,97,97,33,48,101,112,112,48,49,49,49,113,112,49,48,49,113,
|
||||
112,112,112,112,96,112,96,52,52,52,100,100,100,52,116,36,100,100,52,
|
||||
52,52,52,52,116,37,36,37,37,37,49,49,49,37,53,33,49,49,116,100,32,
|
||||
37,49,36,37,97,97,97,97,100,100,100,100,101,96,100,100,33,53,113,53,
|
||||
96,97,96,112,96,117,101,100,100,116,37,49,48,113,49,52,112,48,101,
|
||||
49,48,100,48,113,36,100,100,100,112,52,48,49,49,33,52,52,52,52,112,
|
||||
97,33,37,49,37,49,49,49,101,100,48,49,49,37,37,101,49,36,36,37,97,
|
||||
97,97,97,100,100,100,49,93,102,53,63,57,49,100,96,100,100,97,97,97,
|
||||
97,33,48,101,112,112,112,48,49,49,113,112,49,48,49,113,112,112,112,
|
||||
112,49,101,100,48,52,52,100,100,100,116,96,117,100,100,52,52,52,52,
|
||||
52,116,101,32,37,37,37,49,49,49,117,36,100,100,100,117,32,37,37,49,
|
||||
36,37,97,97,33,53,49,49,49,117,101,53,49,49,32,53,113,53,32,53,37,
|
||||
113,96,117,101,100,100,116,113,101,48,113,49,52,112,48,53,49,48,100,
|
||||
48,116,36,100,100,100,112,97,36,100,100,52,52,52,52,52,112,97,33,37,
|
||||
37,37,49,49,49,37,53,33,49,49,37,37,101,49,36,48,37,97,97,97,97,100,
|
||||
100,100,37,93,102,116,106,108,36,113,49,49,49,96,97,97,97,33,48,101,
|
||||
112,112,112,48,49,49,49,97,33,49,49,113,112,112,112,112,96,112,96,
|
||||
52,52,52,100,100,100,52,116,36,100,100,52,52,52,52,52,48,112,36,37,
|
||||
37,37,49,49,49,37,53,33,49,49,116,100,32,37,49,36,37,97,97,97,97,100,
|
||||
100,100,100,101,96,100,100,33,53,113,53,32,53,101,112,96,117,101,100,
|
||||
100,116,37,49,48,113,49,52,112,48,53,49,48,100,48,113,36,100,100,100,
|
||||
112,101,36,49,49,33,52,52,52,52,112,97,33,37,37,49,49,49,49,101,97,
|
||||
36,49,49,37,37,101,49,36,36,49,97,97,97,97,100,100,100,33,9,51,112,
|
||||
106,108,100,101,96,100,100,97,97,97,97,33,48,101,112,112,112,48,49,
|
||||
49,113,100,100,48,49,113,112,112,112,112,101,37,97,37,52,52,100,100,
|
||||
100,116,32,116,49,49,33,52,52,52,52,48,112,48,37,37,37,49,49,49,97,
|
||||
96,32,49,49,116,32,37,37,49,36,37,97,97,33,53,49,49,49,117,49,96,100,
|
||||
100,33,53,113,53,32,53,101,112,96,117,101,100,100,116,37,49,48,113,
|
||||
49,52,112,48,53,49,48,100,48,116,36,100,100,100,112,97,36,100,100,
|
||||
52,52,52,52,52,112,97,33,37,37,37,49,49,49,37,116,117,100,100,32,37,
|
||||
101,49,36,36,37,97,97,97,97,100,100,100,53,9,51,53,63,57,49,100,96,
|
||||
100,100,97,97,97,97,33,48,101,112,112,112,48,49,49,113,112,49,48,49,
|
||||
113,112,112,112,112,49,101,100,48,52,52,100,100,100,52,116,36,100,
|
||||
100,52,52,52,52,52,48,112,36,37,37,37,49,49,49,37,53,33,49,49,116,
|
||||
32,49,37,49,117,36,97,97,33,53,49,49,49,49,100,96,100,100,33,53,113,
|
||||
53,32,53,113,112,96,117,101,100,100,116,117,33,49,113,49,52,112,48,
|
||||
53,49,48,100,48,113,36,100,100,100,112,52,116,49,49,33,52,52,52,52,
|
||||
112,97,33,37,37,37,49,49,49,49,53,33,49,49,37,37,101,49,36,48,37,97,
|
||||
97,97,97,100,100,100,113,92,102,101,106,108,100,101,96,100,100,97,
|
||||
97,97,97,33,48,101,112,112,112,48,49,49,113,113,96,100,100,36,112,
|
||||
112,112,112,49,101,100,48,52,52,100,100,100,52,33,113,49,49,33,52,
|
||||
52,52,52,48,112,36,37,37,37,49,49,49,53,36,116,100,100,117,32,37,37,
|
||||
49,36,37,97,97,33,53,49,49,49,101,112,53,49,49,32,53,113,53,32,53,
|
||||
113,112,96,117,101,100,100,116,117,117,101,36,49,52,112,48,53,49,48,
|
||||
100,48,113,36,100,100,100,112,97,36,100,100,52,52,52,52,52,112,97,
|
||||
33,37,37,37,49,49,49,101,116,116,100,100,32,37,101,49,36,36,37,97,
|
||||
97,97,97,100,100,100,101,92,102,100,42,57,49,100,96,100,100,97,97,
|
||||
97,97,33,48,101,112,112,112,48,49,49,113,112,49,48,49,113,112,112,
|
||||
112,112,49,101,36,49,52,52,100,100,100,52,116,36,100,100,52,52,52,
|
||||
52,52,48,112,36,49,37,37,49,49,49,37,53,33,49,49,116,32,49,37,49,117,
|
||||
36,97,97,33,53,49,49,49,49,100,96,100,100,33,53,113,53,32,53,101,112,
|
||||
96,117,101,100,100,116,37,49,48,113,49,52,112,48,53,49,48,53,37,116,
|
||||
36,100,100,100,112,97,36,100,100,52,52,52,52,52,112,97,33,37,37,37,
|
||||
49,49,49,37,53,33,49,49,37,37,101,49,48,36,37,100,97,97,97,100,100,
|
||||
100,97,28,102,97,42,57,49,100,96,100,100,97,97,97,97,33,48,101,112,
|
||||
112,112,48,49,49,113,96,117,101,100,36,112,112,112,112,49,101,100,
|
||||
53,52,52,100,100,100,52,49,97,100,100,52,52,52,52,52,48,112,36,37,
|
||||
37,37,49,49,49,53,112,53,49,49,116,32,37,37,49,117,36,97,97,33,53,
|
||||
49,49,49,37,100,96,100,100,33,53,113,53,32,53,101,48,97,117,101,100,
|
||||
100,116,49,112,48,113,49,52,112,48,53,49,48,100,48,33,113,49,49,49,
|
||||
117,97,36,100,100,52,52,52,52,52,112,97,33,37,37,37,49,49,49,101,52,
|
||||
48,49,49,37,37,101,49,36,36,37,97,97,97,97,100,100,100,117,28,102,
|
||||
32,47,57,49,100,96,100,100,97,97,97,97,33,48,101,112,112,112,48,49,
|
||||
49,113,112,49,48,49,113,112,112,112,112,113,112,36,49,52,52,100,100,
|
||||
100,52,116,36,100,100,52,52,52,52,52,48,112,36,37,49,37,49,49,49,37,
|
||||
53,33,49,49,116,32,49,37,49,36,37,97,97,33,53,49,49,49,113,32,100,
|
||||
100,100,33,53,113,53,32,53,101,112,96,117,101,100,100,36,112,49,48,
|
||||
113,49,52,112,48,53,49,48,100,48,113,36,100,100,100,112,97,36,100,
|
||||
100,52,52,52,52,52,112,97,33,37,37,37,49,49,49,37,53,33,49,49,37,37,
|
||||
101,49,36,36,37,97,100,97,97,100,100,100,49,28,102,117,42,57,49,100,
|
||||
96,100,100,97,97,97,97,33,48,101,112,112,112,48,49,49,113,36,33,100,
|
||||
100,36,112,112,112,112,49,101,100,53,52,52,100,100,100,52,37,97,100,
|
||||
100,52,52,52,52,52,48,112,36,37,37,37,49,49,49,117,53,33,49,49,116,
|
||||
32,37,37,49,36,37,97,97,33,53,49,49,49,49,100,96,100,100,33,53,113,
|
||||
53,32,53,101,112,96,117,101,100,100,116,97,116,49,113,49,52,112,48,
|
||||
53,49,48,100,48,49,37,100,100,100,112,97,36,100,100,52,52,52,52,52,
|
||||
112,97,33,37,37,37,49,49,49,37,100,33,49,49,37,37,101,49,36,36,37,
|
||||
97,97,97,97,100,100,100,37,28,102,52,42,57,49,100,96,100,100,97,97,
|
||||
97,97,33,48,101,112,112,112,48,49,49,113,112,49,48,49,113,112,112,
|
||||
112,112,49,101,100,48,52,52,100,100,100,52,116,36,100,100,52,52,52,
|
||||
52,52,48,112,36,37,37,49,49,49,49,101,37,32,49,49,116,32,37,49,49,
|
||||
36,37,97,97,33,53,49,49,49,113,37,100,100,100,33,53,113,53,32,53,101,
|
||||
48,97,117,101,100,100,36,112,49,48,113,49,52,112,48,53,49,48,100,48,
|
||||
113,36,100,100,100,112,97,36,100,100,52,52,52,52,52,112,97,33,37,37,
|
||||
37,49,49,49,37,53,33,49,49,37,37,101,49,36,36,37,97,97,100,97,100,
|
||||
100,100,33,8,102,49,42,57,49,100,96,100,100,97,97,97,97,33,48,101,
|
||||
112,112,112,48,49,49,113,113,113,48,49,113,112,112,112,112,49,101,
|
||||
49,37,52,52,100,100,100,52,116,36,100,100,52,52,52,52,52,48,112,36,
|
||||
37,37,37,49,49,49,37,48,100,100,100,117,32,37,37,49,36,37,97,97,33,
|
||||
53,49,49,49,49,100,96,100,100,33,53,113,53,32,53,101,112,96,117,101,
|
||||
100,100,116,117,49,48,113,49,52,112,48,53,49,48,100,48,113,113,49,
|
||||
49,49,117,97,36,100,100,52,52,52,52,52,112,97,33,37,37,37,49,49,49,
|
||||
101,49,48,49,49,37,37,101,49,36,36,37,97,97,97,97,100,100,100,53,8,
|
||||
102,112,47,57,49,100,96,100,100,97,97,97,97,33,48,101,112,112,112,
|
||||
48,49,49,113,112,49,48,49,113,112,112,112,112,49,101,100,48,52,52,
|
||||
100,100,100,52,116,36,100,100,52,52,52,52,52,48,112,36,37,37,37,49,
|
||||
49,49,37,53,33,49,49,116,32,37,37,49,36,37,100,97,33,53,49,49,49,33,
|
||||
96,53,49,49,32,53,113,53,32,53,101,112,48,97,101,100,100,116,37,49,
|
||||
48,113,49,52,112,48,53,49,48,100,48,113,36,100,100,100,112,97,36,100,
|
||||
100,52,52,52,52,52,112,97,33,37,37,37,49,49,49,37,53,33,49,49,37,37,
|
||||
101,49,36,36,37,97,97,97,100,100,100,100,113,29,102,37,42,57,49,100,
|
||||
96,100,100,97,97,97,97,33,48,101,112,112,112,48,49,49,113,97,96,101,
|
||||
100,36,112,112,112,112,49,101,100,48,52,52,100,100,100,52,116,36,100,
|
||||
100,52,52,52,52,52,48,112,36,37,37,37,49,49,49,101,96,96,100,100,117,
|
||||
32,37,37,49,36,37,97,97,33,53,49,49,49,101,36,96,100,100,33,53,113,
|
||||
53,32,53,101,112,96,117,101,100,100,116,37,49,48,113,49,52,112,48,
|
||||
53,49,48,100,48,113,48,100,100,100,112,97,36,100,100,52,52,52,52,52,
|
||||
112,97,33,37,37,37,49,49,49,53,48,37,49,49,37,37,101,49,36,36,37,97,
|
||||
97,97,97,100,100,100,101,29,102,36,46,57,49,100,96,100,100,97,97,97,
|
||||
97,33,48,101,112,112,112,48,49,49,113,112,49,48,49,113,112,112,112,
|
||||
112,49,101,49,37,52,52,100,100,100,52,116,36,100,100,52,52,52,52,52,
|
||||
48,112,36,37,37,37,49,49,49,37,53,33,49,49,116,32,37,37,49,36,37,100,
|
||||
97,33,53,49,49,49,49,100,96,100,100,33,53,113,53,32,53,101,112,48,
|
||||
97,101,100,100,116,49,32,100,36,49,52,112,48,53,49,48,100,48,113,36,
|
||||
100,100,100,112,97,36,100,100,52,52,52,52,52,112,97,33,37,37,37,49,
|
||||
49,49,37,53,33,49,49,37,37,101,49,36,117,36,97,97,97,97,100,100,100,
|
||||
97,25,102,33,46,57,49,100,96,100,100,97,97,97,97,33,48,101,112,112,
|
||||
112,48,49,49,113,33,117,49,49,113,112,112,112,112,49,101,100,48,52,
|
||||
52,100,100,100,52,116,36,100,100,52,52,52,52,52,48,112,36,37,37,37,
|
||||
49,49,49,101,101,96,100,100,117,32,37,37,49,36,37,97,97,33,53,49,49,
|
||||
49,33,49,97,100,100,33,53,113,53,32,53,101,112,32,116,101,100,100,
|
||||
116,48,33,48,113,49,52,112,48,53,49,48,100,48,113,48,100,100,100,52,
|
||||
116,36,100,100,52,52,52,52,52,112,97,33,37,37,37,49,49,49,117,96,117,
|
||||
100,100,32,37,101,49,36,36,37,97,97,97,97,100,100,100,117,25,102,96,
|
||||
46,57,49,100,96,100,100,97,97,97,97,33,48,101,112,112,112,48,49,49,
|
||||
113,112,49,48,49,113,112,112,112,112,49,101,49,37,52,52,100,100,100,
|
||||
52,116,36,100,100,52,52,52,52,52,48,112,36,37,37,37,49,49,49,37,53,
|
||||
33,49,49,116,32,37,37,49,36,37,100,97,33,53,49,49,49,49,100,96,100,
|
||||
100,33,53,113,53,32,53,101,112,96,117,101,100,100,116,37,49,48,113,
|
||||
49,52,112,48,53,49,48,100,48,113,116,100,100,100,32,97,36,100,100,
|
||||
52,52,52,52,52,112,97,33,37,37,37,49,49,49,37,53,33,49,49,37,37,101,
|
||||
49,36,117,36,97,97,97,97,100,100,100,49,25,102,53,46,57,49,100,96,
|
||||
100,100,97,97,97,97,33,48,101,112,112,112,48,49,49,113,33,112,101,
|
||||
100,36,112,112,112,112,49,101,100,48,100,52,100,100,100,52,116,36,
|
||||
100,100,52,52,52,52,52,48,112,36,37,37,37,49,49,49,37,53,33,49,49,
|
||||
116,32,37,37,49,36,37,97,97,33,53,49,49,49,113,117,53,49,49,32,53,
|
||||
113,53,32,53,101,112,96,53,100,100,100,52,36,49,48,113,49,52,112,48,
|
||||
53,49,48,100,48,113,116,100,100,100,112,97,36,100,100,52,52,52,52,
|
||||
52,112,97,33,37,37,37,49,49,49,117,53,33,49,49,37,37,101,49,36,36,
|
||||
37,97,97,97,97,100,100,100,112,24,102,116,43,57,49,100,96,100,100,
|
||||
97,97,97,97,33,48,101,112,112,112,48,49,49,113,112,49,48,49,113,112,
|
||||
112,112,112,49,101,100,48,52,52,100,100,100,52,116,36,100,100,52,52,
|
||||
52,52,52,48,112,36,37,37,37,49,49,49,37,52,48,49,49,116,32,37,37,49,
|
||||
36,37,97,100,33,53,49,49,49,49,100,96,100,100,33,53,113,53,32,53,101,
|
||||
112,96,37,48,49,49,113,36,113,48,113,49,52,112,48,53,49,48,100,48,
|
||||
113,36,100,100,100,112,97,36,100,100,52,52,52,52,52,112,97,33,37,37,
|
||||
37,49,49,49,37,48,117,100,100,32,37,101,49,36,36,37,97,97,97,97,100,
|
||||
100,100,33,13,102,113,43,57,49,100,96,100,100,97,97,97,97,33,48,101,
|
||||
112,112,112,48,49,49,113,112,49,48,49,113,112,112,112,112,113,112,
|
||||
100,48,52,52,100,100,100,52,116,36,100,100,52,52,52,52,52,48,112,36,
|
||||
37,37,37,49,49,49,101,37,97,100,100,117,32,37,37,49,36,37,97,97,36,
|
||||
53,49,49,49,97,53,97,100,100,33,53,113,53,32,53,101,112,96,117,101,
|
||||
100,100,36,112,49,48,113,49,52,112,48,53,49,48,100,48,113,36,100,100,
|
||||
100,52,116,36,100,100,52,52,52,52,52,112,97,33,37,37,37,49,49,49,37,
|
||||
53,33,49,49,37,37,101,49,36,36,37,97,97,97,97,100,100,100,53,13,102,
|
||||
48,46,57,49,100,96,100,100,97,97,97,97,33,48,101,112,112,112,48,49,
|
||||
49,113,52,100,48,49,113,112,112,112,112,49,37,101,48,52,52,100,100,
|
||||
100,52,116,36,100,100,52,52,52,52,52,48,112,36,37,37,37,49,49,49,37,
|
||||
53,33,49,49,116,32,37,37,49,36,37,97,97,97,100,100,100,100,100,101,
|
||||
96,100,100,33,53,113,53,32,53,101,112,96,117,101,100,100,116,97,32,
|
||||
100,36,49,52,112,48,53,49,48,100,48,113,36,100,100,100,112,97,36,100,
|
||||
100,52,52,52,52,52,112,97,33,37,37,37,49,49,49,37,53,33,49,49,37,37,
|
||||
101,49,36,36,37,97,97,97,97,100,100,100,113,24,102,101,43,57,49,100,
|
||||
96,100,100,97,97,97,97,33,48,101,112,112,112,48,49,49,113,96,48,100,
|
||||
100,36,112,112,112,112,49,101,100,48,52,52,100,100,100,52,116,36,100,
|
||||
100,52,52,52,52,52,48,112,36,37,37,37,49,49,49,37,53,33,49,49,116,
|
||||
32,37,37,49,36,37,97,97,33,53,49,49,49,113,32,100,100,100,33,53,113,
|
||||
53,32,53,101,112,96,117,101,100,100,52,36,49,48,113,49,52,112,48,53,
|
||||
49,48,100,48,113,36,100,100,100,32,97,36,100,100,52,52,52,52,52,112,
|
||||
97,33,37,37,37,49,49,49,37,53,33,49,49,37,37,101,49,36,36,37,97,97,
|
||||
97,97,100,100,100,101,24,102,100,127,108,100,101,96,100,100,97,97,
|
||||
97,97,33,48,101,112,112,112,48,49,49,113,112,49,48,49,113,112,112,
|
||||
112,112,49,101,100,48,52,100,100,100,100,100,116,36,100,100,52,52,
|
||||
52,52,52,48,112,36,37,37,37,49,49,49,37,53,33,49,49,116,32,37,37,49,
|
||||
36,37,97,97,33,53,49,49,49,49,100,96,100,100,33,53,113,53,32,53,101,
|
||||
112,96,117,101,100,100,116,113,33,100,36,49,52,112,48,53,49,48,100,
|
||||
48,113,36,100,100,100,112,97,36,100,100,52,52,52,52,52,112,97,33,37,
|
||||
37,37,49,49,49,37,53,33,49,49,37,37,101,49,36,36,37,97,97,97,97,100,
|
||||
100,100,97,88,51,96,127,108,100,100,100,100,100,97,97,97,97,97,100,
|
||||
36,112,112,112,48,96,100,100,100,100,100,100,36,112,112,112,112,100,
|
||||
48,97,53,52,52,36,48,49,49,49,49,49,49,33,52,52,52,52,100,100,32,37,
|
||||
37,37,33,100,100,100,100,100,100,100,32,37,37,37,49,49,49,96,97,97,
|
||||
97,100,100,100,100,100,100,100,100,97,97,100,97,97,100,36,112,112,
|
||||
112,48,96,100,100,100,100,100,100,36,100,112,48,101,117,48,97,97,96,
|
||||
53,36,48,49,49,49,49,49,49,33,52,52,52,52,52,100,32,37,37,37,33,100,
|
||||
100,100,100,100,100,100,32,37,101,116,37,37,49,96,97,97,97,32,49,49,
|
||||
37,93,51,37,126,108,100,100,100,100,100,117,32,116,117,117,100,36,
|
||||
117,117,117,117,53,49,49,49,49,49,49,113,117,117,117,117,53,49,33,
|
||||
116,37,48,49,49,49,49,49,49,49,49,33,52,52,52,52,100,100,52,32,37,
|
||||
37,117,49,49,49,49,49,49,49,37,33,100,100,100,32,49,116,97,32,37,49,
|
||||
49,49,49,49,49,49,49,49,96,100,97,100,97,36,53,32,112,112,48,49,49,
|
||||
49,49,49,49,49,49,113,53,49,113,48,49,33,36,112,112,48,49,49,49,49,
|
||||
49,49,97,101,36,112,112,48,49,33,52,52,52,52,100,100,100,100,100,100,
|
||||
100,52,52,52,52,100,100,100,100,100,100,100,117,100,100,52,88,51,116,
|
||||
127,108,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,
|
||||
100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,32,49,
|
||||
49,97,117,101,100,100,100,100,100,100,52,52,52,52,52,100,100,100,32,
|
||||
37,37,49,49,49,49,49,49,49,49,49,49,113,116,117,49,49,97,101,100,100,
|
||||
117,100,100,100,100,100,100,100,52,36,53,49,116,100,100,100,32,49,
|
||||
49,49,49,49,49,49,49,49,113,117,53,97,37,53,49,97,33,49,49,49,49,49,
|
||||
49,49,49,49,49,49,97,101,100,100,100,100,100,100,100,100,100,100,100,
|
||||
100,100,100,100,100,100,100,100,100,112,49,49,116,117,117,117,100,
|
||||
100,100,112,93,51,33,127,108,100,100,100,100,100,100,100,100,100,100,
|
||||
100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,
|
||||
100,100,100,100,97,100,48,96,101,100,100,100,100,100,100,116,112,112,
|
||||
112,112,96,100,100,48,52,52,48,49,49,49,49,49,49,49,113,112,48,49,
|
||||
52,48,49,33,52,52,52,49,100,100,100,100,100,100,100,100,52,97,52,100,
|
||||
100,100,100,32,37,37,37,49,49,49,49,49,49,49,49,49,113,48,37,49,49,
|
||||
49,96,97,97,97,100,100,100,100,100,100,100,52,100,100,100,100,100,
|
||||
100,100,100,100,100,100,100,100,100,100,100,100,36,48,113,112,116,
|
||||
49,113,33,116,117,117,100,100,100,36,92,51,48,127,108,100,100,100,
|
||||
100,36,117,117,117,117,53,49,97,117,117,117,117,101,100,100,100,100,
|
||||
100,100,116,117,117,117,117,101,100,112,117,117,97,53,100,100,100,
|
||||
100,100,100,100,96,100,100,100,100,48,49,116,49,49,49,117,100,100,
|
||||
100,100,100,100,100,117,117,117,97,32,49,113,117,117,117,53,96,100,
|
||||
100,100,100,100,100,36,117,53,113,117,36,49,97,117,117,117,117,101,
|
||||
100,100,100,100,100,100,36,112,96,101,36,48,49,33,112,117,117,117,
|
||||
49,49,49,49,49,49,49,117,49,117,117,117,49,49,116,117,117,117,117,
|
||||
100,100,100,100,100,100,100,117,117,117,117,32,49,49,116,97,97,33,
|
||||
53,49,49,101,92,59,101,43,179,100,194,206,100,};
|
905
sys/dev/cx/cxddk.c
Normal file
905
sys/dev/cx/cxddk.c
Normal file
@ -0,0 +1,905 @@
|
||||
/*
|
||||
* Cronyx-Sigma Driver Development Kit.
|
||||
*
|
||||
* Copyright (C) 1998 Cronyx Engineering.
|
||||
* Author: Pavel Novikov, <pavel@inr.net.kiae.su>
|
||||
*
|
||||
* Copyright (C) 1998-2003 Cronyx Engineering.
|
||||
* Author: Roman Kurakin, <rik@cronyx.ru>
|
||||
*
|
||||
* This software is distributed with NO WARRANTIES, not even the implied
|
||||
* warranties for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
||||
*
|
||||
* Authors grant any other persons or organisations permission to use
|
||||
* or modify this software as long as this message is kept with the software,
|
||||
* all derivative works or modified versions.
|
||||
*
|
||||
* Cronyx Id: cxddk.c,v 1.1.2.2 2003/11/27 14:24:50 rik Exp $
|
||||
*/
|
||||
#include <sys/cdefs.h>
|
||||
__FBSDID("$FreeBSD$");
|
||||
|
||||
#include <dev/cx/machdep.h>
|
||||
#include <dev/cx/cxddk.h>
|
||||
#include <dev/cx/cxreg.h>
|
||||
#include <dev/cx/cronyxfw.h>
|
||||
#include <dev/cx/csigmafw.h>
|
||||
|
||||
#define BYTE *(unsigned char*)&
|
||||
|
||||
/* standard base port set */
|
||||
static short porttab [] = {
|
||||
0x200, 0x220, 0x240, 0x260, 0x280, 0x2a0, 0x2c0, 0x2e0,
|
||||
0x300, 0x320, 0x340, 0x360, 0x380, 0x3a0, 0x3c0, 0x3e0, 0
|
||||
};
|
||||
|
||||
/*
|
||||
* Compute the optimal size of the receive buffer.
|
||||
*/
|
||||
static int cx_compute_buf_len (cx_chan_t *c)
|
||||
{
|
||||
int rbsz;
|
||||
if (c->mode == M_ASYNC) {
|
||||
rbsz = (c->rxbaud + 800 - 1) / 800 * 2;
|
||||
if (rbsz < 4)
|
||||
rbsz = 4;
|
||||
else if (rbsz > DMABUFSZ)
|
||||
rbsz = DMABUFSZ;
|
||||
}
|
||||
else
|
||||
rbsz = DMABUFSZ;
|
||||
|
||||
return rbsz;
|
||||
}
|
||||
|
||||
/*
|
||||
* Auto-detect the installed adapters.
|
||||
*/
|
||||
int cx_find (port_t *board_ports)
|
||||
{
|
||||
int i, n;
|
||||
|
||||
for (i=0, n=0; porttab[i] && n<NBRD; i++)
|
||||
if (cx_probe_board (porttab[i], -1, -1))
|
||||
board_ports[n++] = porttab[i];
|
||||
return n;
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialize the adapter.
|
||||
*/
|
||||
int cx_open_board (cx_board_t *b, int num, port_t port, int irq, int dma)
|
||||
{
|
||||
cx_chan_t *c;
|
||||
|
||||
if (num >= NBRD || ! cx_probe_board (port, irq, dma))
|
||||
return 0;
|
||||
|
||||
/* init callback pointers */
|
||||
for (c=b->chan; c<b->chan+NCHAN; ++c) {
|
||||
c->call_on_tx = 0;
|
||||
c->call_on_rx = 0;
|
||||
c->call_on_msig = 0;
|
||||
c->call_on_err = 0;
|
||||
}
|
||||
|
||||
cx_init (b, num, port, irq, dma);
|
||||
|
||||
/* Loading firmware */
|
||||
if (! cx_setup_board (b, csigma_fw_data, csigma_fw_len, csigma_fw_tvec))
|
||||
return 0;
|
||||
return 1;
|
||||
}
|
||||
|
||||
/*
|
||||
* Shutdown the adapter.
|
||||
*/
|
||||
void cx_close_board (cx_board_t *b)
|
||||
{
|
||||
cx_setup_board (b, 0, 0, 0);
|
||||
|
||||
/* Reset the controller. */
|
||||
outb (BCR0(b->port), 0);
|
||||
if (b->chan[8].type || b->chan[12].type)
|
||||
outb (BCR0(b->port+0x10), 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* Start the channel.
|
||||
*/
|
||||
void cx_start_chan (cx_chan_t *c, cx_buf_t *cb, unsigned long phys)
|
||||
{
|
||||
int command = 0;
|
||||
int mode = 0;
|
||||
int ier = 0;
|
||||
int rbsz;
|
||||
|
||||
c->overflow = 0;
|
||||
|
||||
/* Setting up buffers */
|
||||
if (cb) {
|
||||
c->arbuf = cb->rbuffer[0];
|
||||
c->brbuf = cb->rbuffer[1];
|
||||
c->atbuf = cb->tbuffer[0];
|
||||
c->btbuf = cb->tbuffer[1];
|
||||
c->arphys = phys + ((char*)c->arbuf - (char*)cb);
|
||||
c->brphys = phys + ((char*)c->brbuf - (char*)cb);
|
||||
c->atphys = phys + ((char*)c->atbuf - (char*)cb);
|
||||
c->btphys = phys + ((char*)c->btbuf - (char*)cb);
|
||||
}
|
||||
|
||||
/* Set current channel number */
|
||||
outb (CAR(c->port), c->num & 3);
|
||||
|
||||
/* set receiver A buffer physical address */
|
||||
outw (ARBADRU(c->port), (unsigned short) (c->arphys>>16));
|
||||
outw (ARBADRL(c->port), (unsigned short) c->arphys);
|
||||
|
||||
/* set receiver B buffer physical address */
|
||||
outw (BRBADRU(c->port), (unsigned short) (c->brphys>>16));
|
||||
outw (BRBADRL(c->port), (unsigned short) c->brphys);
|
||||
|
||||
/* set transmitter A buffer physical address */
|
||||
outw (ATBADRU(c->port), (unsigned short) (c->atphys>>16));
|
||||
outw (ATBADRL(c->port), (unsigned short) c->atphys);
|
||||
|
||||
/* set transmitter B buffer physical address */
|
||||
outw (BTBADRU(c->port), (unsigned short) (c->btphys>>16));
|
||||
outw (BTBADRL(c->port), (unsigned short) c->btphys);
|
||||
|
||||
/* rx */
|
||||
command |= CCR_ENRX;
|
||||
ier |= IER_RXD;
|
||||
if (c->board->dma) {
|
||||
mode |= CMR_RXDMA;
|
||||
if (c->mode == M_ASYNC)
|
||||
ier |= IER_RET;
|
||||
}
|
||||
|
||||
/* tx */
|
||||
command |= CCR_ENTX;
|
||||
ier |= (c->mode == M_ASYNC) ? IER_TXD : (IER_TXD | IER_TXMPTY);
|
||||
if (c->board->dma)
|
||||
mode |= CMR_TXDMA;
|
||||
|
||||
/* Set mode */
|
||||
outb (CMR(c->port), mode | (c->mode == M_ASYNC ? CMR_ASYNC : CMR_HDLC));
|
||||
|
||||
/* Clear and initialize channel */
|
||||
cx_cmd (c->port, CCR_CLRCH);
|
||||
cx_cmd (c->port, CCR_INITCH | command);
|
||||
if (c->mode == M_ASYNC)
|
||||
cx_cmd (c->port, CCR_ENTX);
|
||||
|
||||
/* Start receiver */
|
||||
rbsz = cx_compute_buf_len(c);
|
||||
outw (ARBCNT(c->port), rbsz);
|
||||
outw (BRBCNT(c->port), rbsz);
|
||||
outw (ARBSTS(c->port), BSTS_OWN24);
|
||||
outw (BRBSTS(c->port), BSTS_OWN24);
|
||||
|
||||
if (c->mode == M_ASYNC)
|
||||
ier |= IER_MDM;
|
||||
|
||||
/* Enable interrupts */
|
||||
outb (IER(c->port), ier);
|
||||
|
||||
/* Clear DTR and RTS */
|
||||
cx_set_dtr (c, 0);
|
||||
cx_set_rts (c, 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* Turn the receiver on/off.
|
||||
*/
|
||||
void cx_enable_receive (cx_chan_t *c, int on)
|
||||
{
|
||||
unsigned char ier;
|
||||
|
||||
if (cx_receive_enabled(c) && ! on) {
|
||||
outb (CAR(c->port), c->num & 3);
|
||||
if (c->mode == M_ASYNC) {
|
||||
ier = inb (IER(c->port));
|
||||
outb (IER(c->port), ier & ~ (IER_RXD | IER_RET));
|
||||
}
|
||||
cx_cmd (c->port, CCR_DISRX);
|
||||
} else if (! cx_receive_enabled(c) && on) {
|
||||
outb (CAR(c->port), c->num & 3);
|
||||
ier = inb (IER(c->port));
|
||||
if (c->mode == M_ASYNC)
|
||||
outb (IER(c->port), ier | (IER_RXD | IER_RET));
|
||||
else
|
||||
outb (IER(c->port), ier | IER_RXD);
|
||||
cx_cmd (c->port, CCR_ENRX);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Turn the transmiter on/off.
|
||||
*/
|
||||
void cx_enable_transmit (cx_chan_t *c, int on)
|
||||
{
|
||||
if (cx_transmit_enabled(c) && ! on) {
|
||||
outb (CAR(c->port), c->num & 3);
|
||||
if (c->mode != M_ASYNC)
|
||||
outb (STCR(c->port), STC_ABORTTX | STC_SNDSPC);
|
||||
cx_cmd (c->port, CCR_DISTX);
|
||||
} else if (! cx_transmit_enabled(c) && on) {
|
||||
outb (CAR(c->port), c->num & 3);
|
||||
cx_cmd (c->port, CCR_ENTX);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Get channel status.
|
||||
*/
|
||||
int cx_receive_enabled (cx_chan_t *c)
|
||||
{
|
||||
outb (CAR(c->port), c->num & 3);
|
||||
return (inb (CSR(c->port)) & CSRA_RXEN) != 0;
|
||||
}
|
||||
|
||||
int cx_transmit_enabled (cx_chan_t *c)
|
||||
{
|
||||
outb (CAR(c->port), c->num & 3);
|
||||
return (inb (CSR(c->port)) & CSRA_TXEN) != 0;
|
||||
}
|
||||
|
||||
unsigned long cx_get_baud (cx_chan_t *c)
|
||||
{
|
||||
return (c->opt.tcor.clk == CLK_EXT) ? 0 : c->txbaud;
|
||||
}
|
||||
|
||||
int cx_get_loop (cx_chan_t *c)
|
||||
{
|
||||
return c->opt.tcor.llm ? 1 : 0;
|
||||
}
|
||||
|
||||
int cx_get_nrzi (cx_chan_t *c)
|
||||
{
|
||||
return c->opt.rcor.encod == ENCOD_NRZI;
|
||||
}
|
||||
|
||||
int cx_get_dpll (cx_chan_t *c)
|
||||
{
|
||||
return c->opt.rcor.dpll ? 1 : 0;
|
||||
}
|
||||
|
||||
void cx_set_baud (cx_chan_t *c, unsigned long bps)
|
||||
{
|
||||
int clock, period;
|
||||
|
||||
c->txbaud = c->rxbaud = bps;
|
||||
|
||||
/* Set current channel number */
|
||||
outb (CAR(c->port), c->num & 3);
|
||||
if (bps) {
|
||||
if (c->mode == M_ASYNC || c->opt.rcor.dpll || c->opt.tcor.llm) {
|
||||
/* Receive baud - internal */
|
||||
cx_clock (c->oscfreq, c->rxbaud, &clock, &period);
|
||||
c->opt.rcor.clk = clock;
|
||||
outb (RCOR(c->port), BYTE c->opt.rcor);
|
||||
outb (RBPR(c->port), period);
|
||||
} else {
|
||||
/* Receive baud - external */
|
||||
c->opt.rcor.clk = CLK_EXT;
|
||||
outb (RCOR(c->port), BYTE c->opt.rcor);
|
||||
outb (RBPR(c->port), 1);
|
||||
}
|
||||
|
||||
/* Transmit baud - internal */
|
||||
cx_clock (c->oscfreq, c->txbaud, &clock, &period);
|
||||
c->opt.tcor.clk = clock;
|
||||
c->opt.tcor.ext1x = 0;
|
||||
outb (TBPR(c->port), period);
|
||||
} else if (c->mode != M_ASYNC) {
|
||||
/* External clock - disable local loopback and DPLL */
|
||||
c->opt.tcor.llm = 0;
|
||||
c->opt.rcor.dpll = 0;
|
||||
|
||||
/* Transmit baud - external */
|
||||
c->opt.tcor.ext1x = 1;
|
||||
c->opt.tcor.clk = CLK_EXT;
|
||||
outb (TBPR(c->port), 1);
|
||||
|
||||
/* Receive baud - external */
|
||||
c->opt.rcor.clk = CLK_EXT;
|
||||
outb (RCOR(c->port), BYTE c->opt.rcor);
|
||||
outb (RBPR(c->port), 1);
|
||||
}
|
||||
if (c->opt.tcor.llm)
|
||||
outb (COR2(c->port), (BYTE c->hopt.cor2) & ~3);
|
||||
else
|
||||
outb (COR2(c->port), BYTE c->hopt.cor2);
|
||||
outb (TCOR(c->port), BYTE c->opt.tcor);
|
||||
}
|
||||
|
||||
void cx_set_loop (cx_chan_t *c, int on)
|
||||
{
|
||||
if (! c->txbaud)
|
||||
return;
|
||||
|
||||
c->opt.tcor.llm = on ? 1 : 0;
|
||||
cx_set_baud (c, c->txbaud);
|
||||
}
|
||||
|
||||
void cx_set_dpll (cx_chan_t *c, int on)
|
||||
{
|
||||
if (! c->txbaud)
|
||||
return;
|
||||
|
||||
c->opt.rcor.dpll = on ? 1 : 0;
|
||||
cx_set_baud (c, c->txbaud);
|
||||
}
|
||||
|
||||
void cx_set_nrzi (cx_chan_t *c, int nrzi)
|
||||
{
|
||||
c->opt.rcor.encod = (nrzi ? ENCOD_NRZI : ENCOD_NRZ);
|
||||
outb (CAR(c->port), c->num & 3);
|
||||
outb (RCOR(c->port), BYTE c->opt.rcor);
|
||||
}
|
||||
|
||||
static int cx_send (cx_chan_t *c, char *data, int len,
|
||||
void *attachment)
|
||||
{
|
||||
unsigned char *buf;
|
||||
port_t cnt_port, sts_port;
|
||||
void **attp;
|
||||
|
||||
/* Set the current channel number. */
|
||||
outb (CAR(c->port), c->num & 3);
|
||||
|
||||
/* Determine the buffer order. */
|
||||
if (inb (DMABSTS(c->port)) & DMABSTS_NTBUF) {
|
||||
if (inb (BTBSTS(c->port)) & BSTS_OWN24) {
|
||||
buf = c->atbuf;
|
||||
cnt_port = ATBCNT(c->port);
|
||||
sts_port = ATBSTS(c->port);
|
||||
attp = &c->attach[0];
|
||||
} else {
|
||||
buf = c->btbuf;
|
||||
cnt_port = BTBCNT(c->port);
|
||||
sts_port = BTBSTS(c->port);
|
||||
attp = &c->attach[1];
|
||||
}
|
||||
} else {
|
||||
if (inb (ATBSTS(c->port)) & BSTS_OWN24) {
|
||||
buf = c->btbuf;
|
||||
cnt_port = BTBCNT(c->port);
|
||||
sts_port = BTBSTS(c->port);
|
||||
attp = &c->attach[1];
|
||||
} else {
|
||||
buf = c->atbuf;
|
||||
cnt_port = ATBCNT(c->port);
|
||||
sts_port = ATBSTS(c->port);
|
||||
attp = &c->attach[0];
|
||||
}
|
||||
}
|
||||
/* Is it busy? */
|
||||
if (inb (sts_port) & BSTS_OWN24)
|
||||
return -1;
|
||||
|
||||
memcpy (buf, data, len);
|
||||
*attp = attachment;
|
||||
|
||||
/* Start transmitter. */
|
||||
outw (cnt_port, len);
|
||||
outb (sts_port, BSTS_EOFR | BSTS_INTR | BSTS_OWN24);
|
||||
|
||||
/* Enable TXMPTY interrupt,
|
||||
* to catch the case when the second buffer is empty. */
|
||||
if (c->mode != M_ASYNC) {
|
||||
if ((inb(ATBSTS(c->port)) & BSTS_OWN24) &&
|
||||
(inb(BTBSTS(c->port)) & BSTS_OWN24)) {
|
||||
outb (IER(c->port), IER_RXD | IER_TXD | IER_TXMPTY);
|
||||
} else
|
||||
outb (IER(c->port), IER_RXD | IER_TXD);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Number of free buffs
|
||||
*/
|
||||
int cx_buf_free (cx_chan_t *c)
|
||||
{
|
||||
return ! (inb (ATBSTS(c->port)) & BSTS_OWN24) +
|
||||
! (inb (BTBSTS(c->port)) & BSTS_OWN24);
|
||||
}
|
||||
|
||||
/*
|
||||
* Send the data packet.
|
||||
*/
|
||||
int cx_send_packet (cx_chan_t *c, char *data, int len, void *attachment)
|
||||
{
|
||||
if (len >= DMABUFSZ)
|
||||
return -2;
|
||||
if (c->mode == M_ASYNC) {
|
||||
static char buf [DMABUFSZ];
|
||||
char *p, *t = buf;
|
||||
|
||||
/* Async -- double all nulls. */
|
||||
for (p=data; p < data+len && t < buf+DMABUFSZ-1; ++p)
|
||||
if ((*t++ = *p) == 0)
|
||||
*t++ = 0;
|
||||
return cx_send (c, buf, t-buf, attachment);
|
||||
}
|
||||
return cx_send (c, data, len, attachment);
|
||||
}
|
||||
|
||||
static int cx_receive_interrupt (cx_chan_t *c)
|
||||
{
|
||||
unsigned short risr;
|
||||
int len = 0, rbsz;
|
||||
|
||||
++c->rintr;
|
||||
risr = inw (RISR(c->port));
|
||||
|
||||
/* Compute optimal receiver buffer length */
|
||||
rbsz = cx_compute_buf_len(c);
|
||||
if (c->mode == M_ASYNC && (risr & RISA_TIMEOUT)) {
|
||||
unsigned long rcbadr = (unsigned short) inw (RCBADRL(c->port)) |
|
||||
(long) inw (RCBADRU(c->port)) << 16;
|
||||
unsigned char *buf = 0;
|
||||
port_t cnt_port = 0, sts_port = 0;
|
||||
|
||||
if (rcbadr >= c->brphys && rcbadr < c->brphys+DMABUFSZ) {
|
||||
buf = c->brbuf;
|
||||
len = rcbadr - c->brphys;
|
||||
cnt_port = BRBCNT(c->port);
|
||||
sts_port = BRBSTS(c->port);
|
||||
} else if (rcbadr >= c->arphys && rcbadr < c->arphys+DMABUFSZ) {
|
||||
buf = c->arbuf;
|
||||
len = rcbadr - c->arphys;
|
||||
cnt_port = ARBCNT(c->port);
|
||||
sts_port = ARBSTS(c->port);
|
||||
}
|
||||
|
||||
if (len) {
|
||||
c->ibytes += len;
|
||||
c->received_data = buf;
|
||||
c->received_len = len;
|
||||
|
||||
/* Restart receiver. */
|
||||
outw (cnt_port, rbsz);
|
||||
outb (sts_port, BSTS_OWN24);
|
||||
}
|
||||
return (REOI_TERMBUFF);
|
||||
}
|
||||
|
||||
/* Receive errors. */
|
||||
if (risr & RIS_OVERRUN) {
|
||||
++c->ierrs;
|
||||
if (c->call_on_err)
|
||||
c->call_on_err (c, CX_OVERRUN);
|
||||
} else if (c->mode != M_ASYNC && (risr & RISH_CRCERR)) {
|
||||
++c->ierrs;
|
||||
if (c->call_on_err)
|
||||
c->call_on_err (c, CX_CRC);
|
||||
} else if (c->mode != M_ASYNC && (risr & (RISH_RXABORT | RISH_RESIND))) {
|
||||
++c->ierrs;
|
||||
if (c->call_on_err)
|
||||
c->call_on_err (c, CX_FRAME);
|
||||
} else if (c->mode == M_ASYNC && (risr & RISA_PARERR)) {
|
||||
++c->ierrs;
|
||||
if (c->call_on_err)
|
||||
c->call_on_err (c, CX_CRC);
|
||||
} else if (c->mode == M_ASYNC && (risr & RISA_FRERR)) {
|
||||
++c->ierrs;
|
||||
if (c->call_on_err)
|
||||
c->call_on_err (c, CX_FRAME);
|
||||
} else if (c->mode == M_ASYNC && (risr & RISA_BREAK)) {
|
||||
if (c->call_on_err)
|
||||
c->call_on_err (c, CX_BREAK);
|
||||
} else if (! (risr & RIS_EOBUF)) {
|
||||
++c->ierrs;
|
||||
} else {
|
||||
/* Handle received data. */
|
||||
len = (risr & RIS_BB) ? inw(BRBCNT(c->port)) : inw(ARBCNT(c->port));
|
||||
|
||||
if (len > DMABUFSZ) {
|
||||
/* Fatal error: actual DMA transfer size
|
||||
* exceeds our buffer size. It could be caused
|
||||
* by incorrectly programmed DMA register or
|
||||
* hardware fault. Possibly, should panic here. */
|
||||
len = DMABUFSZ;
|
||||
} else if (c->mode != M_ASYNC && ! (risr & RIS_EOFR)) {
|
||||
/* The received frame does not fit in the DMA buffer.
|
||||
* It could be caused by serial lie noise,
|
||||
* or if the peer has too big MTU. */
|
||||
if (! c->overflow) {
|
||||
if (c->call_on_err)
|
||||
c->call_on_err (c, CX_OVERFLOW);
|
||||
c->overflow = 1;
|
||||
++c->ierrs;
|
||||
}
|
||||
} else if (! c->overflow) {
|
||||
if (risr & RIS_BB) {
|
||||
c->received_data = c->brbuf;
|
||||
c->received_len = len;
|
||||
} else {
|
||||
c->received_data = c->arbuf;
|
||||
c->received_len = len;
|
||||
}
|
||||
if (c->mode != M_ASYNC)
|
||||
++c->ipkts;
|
||||
c->ibytes += len;
|
||||
} else
|
||||
c->overflow = 0;
|
||||
}
|
||||
|
||||
/* Restart receiver. */
|
||||
if (! (inb (ARBSTS(c->port)) & BSTS_OWN24)) {
|
||||
outw (ARBCNT(c->port), rbsz);
|
||||
outb (ARBSTS(c->port), BSTS_OWN24);
|
||||
}
|
||||
if (! (inb (BRBSTS(c->port)) & BSTS_OWN24)) {
|
||||
outw (BRBCNT(c->port), rbsz);
|
||||
outb (BRBSTS(c->port), BSTS_OWN24);
|
||||
}
|
||||
|
||||
/* Discard exception characters. */
|
||||
if ((risr & RISA_SCMASK) && c->aopt.cor2.ixon)
|
||||
return (REOI_DISCEXC);
|
||||
else
|
||||
return (0);
|
||||
}
|
||||
|
||||
static void cx_transmit_interrupt (cx_chan_t *c)
|
||||
{
|
||||
unsigned char tisr;
|
||||
int len = 0;
|
||||
|
||||
++c->tintr;
|
||||
tisr = inb (TISR(c->port));
|
||||
if (tisr & TIS_UNDERRUN) { /* Transmit underrun error */
|
||||
if (c->call_on_err)
|
||||
c->call_on_err (c, CX_UNDERRUN);
|
||||
++c->oerrs;
|
||||
} else if (tisr & (TIS_EOBUF | TIS_TXEMPTY | TIS_TXDATA)) {
|
||||
/* Call processing function */
|
||||
if (tisr & TIS_BB) {
|
||||
len = inw(BTBCNT(c->port));
|
||||
if (c->call_on_tx)
|
||||
c->call_on_tx (c, c->attach[1], len);
|
||||
} else {
|
||||
len = inw(ATBCNT(c->port));
|
||||
if (c->call_on_tx)
|
||||
c->call_on_tx (c, c->attach[0], len);
|
||||
}
|
||||
if (c->mode != M_ASYNC && len != 0)
|
||||
++c->opkts;
|
||||
c->obytes += len;
|
||||
}
|
||||
|
||||
/* Enable TXMPTY interrupt,
|
||||
* to catch the case when the second buffer is empty. */
|
||||
if (c->mode != M_ASYNC) {
|
||||
if ((inb (ATBSTS(c->port)) & BSTS_OWN24) &&
|
||||
(inb (BTBSTS(c->port)) & BSTS_OWN24)) {
|
||||
outb (IER(c->port), IER_RXD | IER_TXD | IER_TXMPTY);
|
||||
} else
|
||||
outb (IER(c->port), IER_RXD | IER_TXD);
|
||||
}
|
||||
}
|
||||
|
||||
void cx_int_handler (cx_board_t *b)
|
||||
{
|
||||
unsigned char livr;
|
||||
cx_chan_t *c;
|
||||
|
||||
while (! (inw (BSR(b->port)) & BSR_NOINTR)) {
|
||||
/* Enter the interrupt context, using IACK bus cycle.
|
||||
Read the local interrupt vector register. */
|
||||
livr = inb (IACK(b->port, BRD_INTR_LEVEL));
|
||||
c = b->chan + (livr>>2 & 0xf);
|
||||
if (c->type == T_NONE)
|
||||
continue;
|
||||
switch (livr & 3) {
|
||||
case LIV_MODEM: /* modem interrupt */
|
||||
++c->mintr;
|
||||
if (c->call_on_msig)
|
||||
c->call_on_msig (c);
|
||||
outb (MEOIR(c->port), 0);
|
||||
break;
|
||||
case LIV_EXCEP: /* receive exception */
|
||||
case LIV_RXDATA: /* receive interrupt */
|
||||
outb (REOIR(c->port), cx_receive_interrupt (c));
|
||||
if (c->call_on_rx && c->received_data) {
|
||||
c->call_on_rx (c, c->received_data,
|
||||
c->received_len);
|
||||
c->received_data = 0;
|
||||
}
|
||||
break;
|
||||
case LIV_TXDATA: /* transmit interrupt */
|
||||
cx_transmit_interrupt (c);
|
||||
outb (TEOIR(c->port), 0);
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Register event processing functions
|
||||
*/
|
||||
void cx_register_transmit (cx_chan_t *c,
|
||||
void (*func) (cx_chan_t *c, void *attachment, int len))
|
||||
{
|
||||
c->call_on_tx = func;
|
||||
}
|
||||
|
||||
void cx_register_receive (cx_chan_t *c,
|
||||
void (*func) (cx_chan_t *c, char *data, int len))
|
||||
{
|
||||
c->call_on_rx = func;
|
||||
}
|
||||
|
||||
void cx_register_modem (cx_chan_t *c, void (*func) (cx_chan_t *c))
|
||||
{
|
||||
c->call_on_msig = func;
|
||||
}
|
||||
|
||||
void cx_register_error (cx_chan_t *c, void (*func) (cx_chan_t *c, int data))
|
||||
{
|
||||
c->call_on_err = func;
|
||||
}
|
||||
|
||||
/*
|
||||
* Async protocol functions.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Enable/disable transmitter.
|
||||
*/
|
||||
void cx_transmitter_ctl (cx_chan_t *c,int start)
|
||||
{
|
||||
outb (CAR(c->port), c->num & 3);
|
||||
cx_cmd (c->port, start ? CCR_ENTX : CCR_DISTX);
|
||||
}
|
||||
|
||||
/*
|
||||
* Discard all data queued in transmitter.
|
||||
*/
|
||||
void cx_flush_transmit (cx_chan_t *c)
|
||||
{
|
||||
outb (CAR(c->port), c->num & 3);
|
||||
cx_cmd (c->port, CCR_CLRTX);
|
||||
}
|
||||
|
||||
/*
|
||||
* Send the XON/XOFF flow control symbol.
|
||||
*/
|
||||
void cx_xflow_ctl (cx_chan_t *c, int on)
|
||||
{
|
||||
outb (CAR(c->port), c->num & 3);
|
||||
outb (STCR(c->port), STC_SNDSPC | (on ? STC_SSPC_1 : STC_SSPC_2));
|
||||
}
|
||||
|
||||
/*
|
||||
* Send the break signal for a given number of milliseconds.
|
||||
*/
|
||||
void cx_send_break (cx_chan_t *c, int msec)
|
||||
{
|
||||
static unsigned char buf [128];
|
||||
unsigned char *p;
|
||||
|
||||
p = buf;
|
||||
*p++ = 0; /* extended transmit command */
|
||||
*p++ = 0x81; /* send break */
|
||||
|
||||
if (msec > 10000) /* max 10 seconds */
|
||||
msec = 10000;
|
||||
if (msec < 10) /* min 10 msec */
|
||||
msec = 10;
|
||||
while (msec > 0) {
|
||||
int ms = 250; /* 250 msec */
|
||||
if (ms > msec)
|
||||
ms = msec;
|
||||
msec -= ms;
|
||||
*p++ = 0; /* extended transmit command */
|
||||
*p++ = 0x82; /* insert delay */
|
||||
*p++ = ms;
|
||||
}
|
||||
*p++ = 0; /* extended transmit command */
|
||||
*p++ = 0x83; /* stop break */
|
||||
|
||||
cx_send (c, buf, p-buf, 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* Set async parameters.
|
||||
*/
|
||||
void cx_set_async_param (cx_chan_t *c, int baud, int bits, int parity,
|
||||
int stop2, int ignpar, int rtscts,
|
||||
int ixon, int ixany, int symstart, int symstop)
|
||||
{
|
||||
int clock, period;
|
||||
cx_cor1_async_t cor1;
|
||||
|
||||
/* Set character length and parity mode. */
|
||||
BYTE cor1 = 0;
|
||||
cor1.charlen = bits - 1;
|
||||
cor1.parmode = parity ? PARM_NORMAL : PARM_NOPAR;
|
||||
cor1.parity = parity==1 ? PAR_ODD : PAR_EVEN;
|
||||
cor1.ignpar = ignpar ? 1 : 0;
|
||||
|
||||
/* Enable/disable hardware CTS. */
|
||||
c->aopt.cor2.ctsae = rtscts ? 1 : 0;
|
||||
|
||||
/* Enable extended transmit command mode.
|
||||
* Unfortunately, there is no other method for sending break. */
|
||||
c->aopt.cor2.etc = 1;
|
||||
|
||||
/* Enable/disable hardware XON/XOFF. */
|
||||
c->aopt.cor2.ixon = ixon ? 1 : 0;
|
||||
c->aopt.cor2.ixany = ixany ? 1 : 0;
|
||||
|
||||
/* Set the number of stop bits. */
|
||||
if (stop2)
|
||||
c->aopt.cor3.stopb = STOPB_2;
|
||||
else
|
||||
c->aopt.cor3.stopb = STOPB_1;
|
||||
|
||||
/* Disable/enable passing XON/XOFF chars to the host. */
|
||||
c->aopt.cor3.scde = ixon ? 1 : 0;
|
||||
c->aopt.cor3.flowct = ixon ? FLOWCC_NOTPASS : FLOWCC_PASS;
|
||||
|
||||
c->aopt.schr1 = symstart; /* XON */
|
||||
c->aopt.schr2 = symstop; /* XOFF */
|
||||
|
||||
/* Set current channel number. */
|
||||
outb (CAR(c->port), c->num & 3);
|
||||
|
||||
/* Set up clock values. */
|
||||
if (baud) {
|
||||
c->rxbaud = c->txbaud = baud;
|
||||
|
||||
/* Receiver. */
|
||||
cx_clock (c->oscfreq, c->rxbaud, &clock, &period);
|
||||
c->opt.rcor.clk = clock;
|
||||
outb (RCOR(c->port), BYTE c->opt.rcor);
|
||||
outb (RBPR(c->port), period);
|
||||
|
||||
/* Transmitter. */
|
||||
cx_clock (c->oscfreq, c->txbaud, &clock, &period);
|
||||
c->opt.tcor.clk = clock;
|
||||
c->opt.tcor.ext1x = 0;
|
||||
outb (TCOR(c->port), BYTE c->opt.tcor);
|
||||
outb (TBPR(c->port), period);
|
||||
}
|
||||
outb (COR2(c->port), BYTE c->aopt.cor2);
|
||||
outb (COR3(c->port), BYTE c->aopt.cor3);
|
||||
outb (SCHR1(c->port), c->aopt.schr1);
|
||||
outb (SCHR2(c->port), c->aopt.schr2);
|
||||
|
||||
if (BYTE c->aopt.cor1 != BYTE cor1) {
|
||||
BYTE c->aopt.cor1 = BYTE cor1;
|
||||
outb (COR1(c->port), BYTE c->aopt.cor1);
|
||||
/* Any change to COR1 require reinitialization. */
|
||||
/* Unfortunately, it may cause transmitter glitches... */
|
||||
cx_cmd (c->port, CCR_INITCH);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Set mode: M_ASYNC or M_HDLC.
|
||||
* Both receiver and transmitter are disabled.
|
||||
*/
|
||||
int cx_set_mode (cx_chan_t *c, int mode)
|
||||
{
|
||||
if (mode == M_HDLC) {
|
||||
if (c->type == T_ASYNC)
|
||||
return -1;
|
||||
|
||||
if (c->mode == M_HDLC)
|
||||
return 0;
|
||||
|
||||
c->mode = M_HDLC;
|
||||
} else if (mode == M_ASYNC) {
|
||||
if (c->type == T_SYNC_RS232 ||
|
||||
c->type == T_SYNC_V35 ||
|
||||
c->type == T_SYNC_RS449)
|
||||
return -1;
|
||||
|
||||
if (c->mode == M_ASYNC)
|
||||
return 0;
|
||||
|
||||
c->mode = M_ASYNC;
|
||||
c->opt.tcor.ext1x = 0;
|
||||
c->opt.tcor.llm = 0;
|
||||
c->opt.rcor.dpll = 0;
|
||||
c->opt.rcor.encod = ENCOD_NRZ;
|
||||
if (! c->txbaud || ! c->rxbaud)
|
||||
c->txbaud = c->rxbaud = 9600;
|
||||
} else
|
||||
return -1;
|
||||
|
||||
cx_setup_chan (c);
|
||||
cx_start_chan (c, 0, 0);
|
||||
cx_enable_receive (c, 0);
|
||||
cx_enable_transmit (c, 0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Set port type for old models of Sigma
|
||||
*/
|
||||
void cx_set_port (cx_chan_t *c, int iftype)
|
||||
{
|
||||
if (c->board->type == B_SIGMA_XXX) {
|
||||
switch (c->num) {
|
||||
case 0:
|
||||
if ((c->board->if0type != 0) == (iftype != 0))
|
||||
return;
|
||||
c->board->if0type = iftype;
|
||||
c->board->bcr0 &= ~BCR0_UMASK;
|
||||
if (c->board->if0type &&
|
||||
(c->type==T_UNIV_RS449 || c->type==T_UNIV_V35))
|
||||
c->board->bcr0 |= BCR0_UI_RS449;
|
||||
outb (BCR0(c->board->port), c->board->bcr0);
|
||||
break;
|
||||
case 8:
|
||||
if ((c->board->if8type != 0) == (iftype != 0))
|
||||
return;
|
||||
c->board->if8type = iftype;
|
||||
c->board->bcr0b &= ~BCR0_UMASK;
|
||||
if (c->board->if8type &&
|
||||
(c->type==T_UNIV_RS449 || c->type==T_UNIV_V35))
|
||||
c->board->bcr0b |= BCR0_UI_RS449;
|
||||
outb (BCR0(c->board->port+0x10), c->board->bcr0b);
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Get port type for old models of Sigma
|
||||
* -1 Fixed port type or auto detect
|
||||
* 0 RS232
|
||||
* 1 V35
|
||||
* 2 RS449
|
||||
*/
|
||||
int cx_get_port (cx_chan_t *c)
|
||||
{
|
||||
int iftype;
|
||||
|
||||
if (c->board->type == B_SIGMA_XXX) {
|
||||
switch (c->num) {
|
||||
case 0:
|
||||
iftype = c->board->if0type; break;
|
||||
case 8:
|
||||
iftype = c->board->if8type; break;
|
||||
default:
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (iftype)
|
||||
switch (c->type) {
|
||||
case T_UNIV_V35: return 1; break;
|
||||
case T_UNIV_RS449: return 2; break;
|
||||
default: return -1; break;
|
||||
}
|
||||
else
|
||||
return 0;
|
||||
} else
|
||||
return -1;
|
||||
}
|
||||
|
||||
void cx_intr_off (cx_board_t *b)
|
||||
{
|
||||
outb (BCR0(b->port), b->bcr0 & ~BCR0_IRQ_MASK);
|
||||
if (b->chan[8].port || b->chan[12].port)
|
||||
outb (BCR0(b->port+0x10), b->bcr0b & ~BCR0_IRQ_MASK);
|
||||
}
|
||||
|
||||
void cx_intr_on (cx_board_t *b)
|
||||
{
|
||||
outb (BCR0(b->port), b->bcr0);
|
||||
if (b->chan[8].port || b->chan[12].port)
|
||||
outb (BCR0(b->port+0x10), b->bcr0b);
|
||||
}
|
||||
|
||||
int cx_checkintr (cx_board_t *b)
|
||||
{
|
||||
return (!(inw (BSR(b->port)) & BSR_NOINTR));
|
||||
}
|
487
sys/dev/cx/cxddk.h
Normal file
487
sys/dev/cx/cxddk.h
Normal file
@ -0,0 +1,487 @@
|
||||
/*
|
||||
* Defines for Cronyx-Sigma adapter driver.
|
||||
*
|
||||
* Copyright (C) 1994-2001 Cronyx Engineering.
|
||||
* Author: Serge Vakulenko, <vak@cronyx.ru>
|
||||
*
|
||||
* Copyright (C) 1998-2003 Cronyx Engineering.
|
||||
* Author: Roman Kurakin, <rik@cronyx.ru>
|
||||
*
|
||||
* This software is distributed with NO WARRANTIES, not even the implied
|
||||
* warranties for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
||||
*
|
||||
* Authors grant any other persons or organisations permission to use
|
||||
* or modify this software as long as this message is kept with the software,
|
||||
* all derivative works or modified versions.
|
||||
*
|
||||
* Cronyx Id: cxddk.h,v 1.1.2.1 2003/11/12 17:13:41 rik Exp $
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#ifndef port_t
|
||||
# ifdef _M_ALPHA /* port address on Alpha under */
|
||||
# define port_t unsigned long /* Windows NT is 32 bit long */
|
||||
# else
|
||||
# define port_t unsigned short /* all other architectures */
|
||||
# endif /* have 16-bit port addresses */
|
||||
#endif
|
||||
|
||||
#define NBRD 3 /* the max number of installed boards */
|
||||
#define NPORT 32 /* the number of i/o ports per board */
|
||||
#define DMABUFSZ 1600
|
||||
|
||||
/*
|
||||
* Asynchronous channel mode -------------------------------------------------
|
||||
*/
|
||||
|
||||
/* Parity */
|
||||
#define PAR_EVEN 0 /* even parity */
|
||||
#define PAR_ODD 1 /* odd parity */
|
||||
|
||||
/* Parity mode */
|
||||
#define PARM_NOPAR 0 /* no parity */
|
||||
#define PARM_FORCE 1 /* force parity (odd = force 1, even = 0) */
|
||||
#define PARM_NORMAL 2 /* normal parity */
|
||||
|
||||
/* Flow control transparency mode */
|
||||
#define FLOWCC_PASS 0 /* pass flow ctl chars as exceptions */
|
||||
#define FLOWCC_NOTPASS 1 /* don't pass flow ctl chars to the host */
|
||||
|
||||
/* Stop bit length */
|
||||
#define STOPB_1 2 /* 1 stop bit */
|
||||
#define STOPB_15 3 /* 1.5 stop bits */
|
||||
#define STOPB_2 4 /* 2 stop bits */
|
||||
|
||||
/* Action on break condition */
|
||||
#define BRK_INTR 0 /* generate an exception interrupt */
|
||||
#define BRK_NULL 1 /* translate to a NULL character */
|
||||
#define BRK_RESERVED 2 /* reserved */
|
||||
#define BRK_DISCARD 3 /* discard character */
|
||||
|
||||
/* Parity/framing error actions */
|
||||
#define PERR_INTR 0 /* generate an exception interrupt */
|
||||
#define PERR_NULL 1 /* translate to a NULL character */
|
||||
#define PERR_IGNORE 2 /* ignore error; char passed as good data */
|
||||
#define PERR_DISCARD 3 /* discard error character */
|
||||
#define PERR_FFNULL 5 /* translate to FF NULL char */
|
||||
|
||||
typedef struct { /* async channel option register 1 */
|
||||
unsigned charlen : 4; /* character length, 5..8 */
|
||||
unsigned ignpar : 1; /* ignore parity */
|
||||
unsigned parmode : 2; /* parity mode */
|
||||
unsigned parity : 1; /* parity */
|
||||
} cx_cor1_async_t;
|
||||
|
||||
typedef struct { /* async channel option register 2 */
|
||||
unsigned dsrae : 1; /* DSR automatic enable */
|
||||
unsigned ctsae : 1; /* CTS automatic enable */
|
||||
unsigned rtsao : 1; /* RTS automatic output enable */
|
||||
unsigned rlm : 1; /* remote loopback mode enable */
|
||||
unsigned zero : 1;
|
||||
unsigned etc : 1; /* embedded transmitter cmd enable */
|
||||
unsigned ixon : 1; /* in-band XON/XOFF enable */
|
||||
unsigned ixany : 1; /* XON on any character */
|
||||
} cx_cor2_async_t;
|
||||
|
||||
typedef struct { /* async channel option register 3 */
|
||||
unsigned stopb : 3; /* stop bit length */
|
||||
unsigned zero : 1;
|
||||
unsigned scde : 1; /* special char detection enable */
|
||||
unsigned flowct : 1; /* flow control transparency mode */
|
||||
unsigned rngde : 1; /* range detect enable */
|
||||
unsigned escde : 1; /* extended spec. char detect enable */
|
||||
} cx_cor3_async_t;
|
||||
|
||||
typedef struct { /* async channel option register 6 */
|
||||
unsigned parerr : 3; /* parity/framing error actions */
|
||||
unsigned brk : 2; /* action on break condition */
|
||||
unsigned inlcr : 1; /* translate NL to CR on input */
|
||||
unsigned icrnl : 1; /* translate CR to NL on input */
|
||||
unsigned igncr : 1; /* discard CR on input */
|
||||
} cx_cor6_async_t;
|
||||
|
||||
typedef struct { /* async channel option register 7 */
|
||||
unsigned ocrnl : 1; /* translate CR to NL on output */
|
||||
unsigned onlcr : 1; /* translate NL to CR on output */
|
||||
unsigned zero : 3;
|
||||
unsigned fcerr : 1; /* process flow ctl err chars enable */
|
||||
unsigned lnext : 1; /* LNext option enable */
|
||||
unsigned istrip : 1; /* strip 8-bit on input */
|
||||
} cx_cor7_async_t;
|
||||
|
||||
typedef struct { /* async channel options */
|
||||
cx_cor1_async_t cor1; /* channel option register 1 */
|
||||
cx_cor2_async_t cor2; /* channel option register 2 */
|
||||
cx_cor3_async_t cor3; /* option register 3 */
|
||||
cx_cor6_async_t cor6; /* channel option register 6 */
|
||||
cx_cor7_async_t cor7; /* channel option register 7 */
|
||||
unsigned char schr1; /* special character register 1 (XON) */
|
||||
unsigned char schr2; /* special character register 2 (XOFF) */
|
||||
unsigned char schr3; /* special character register 3 */
|
||||
unsigned char schr4; /* special character register 4 */
|
||||
unsigned char scrl; /* special character range low */
|
||||
unsigned char scrh; /* special character range high */
|
||||
unsigned char lnxt; /* LNext character */
|
||||
} cx_opt_async_t;
|
||||
|
||||
/*
|
||||
* HDLC channel mode ---------------------------------------------------------
|
||||
*/
|
||||
/* Address field length option */
|
||||
#define AFLO_1OCT 0 /* address field is 1 octet in length */
|
||||
#define AFLO_2OCT 1 /* address field is 2 octet in length */
|
||||
|
||||
/* Clear detect for X.21 data transfer phase */
|
||||
#define CLRDET_DISABLE 0 /* clear detect disabled */
|
||||
#define CLRDET_ENABLE 1 /* clear detect enabled */
|
||||
|
||||
/* Addressing mode */
|
||||
#define ADMODE_NOADDR 0 /* no address */
|
||||
#define ADMODE_4_1 1 /* 4 * 1 byte */
|
||||
#define ADMODE_2_2 2 /* 2 * 2 byte */
|
||||
|
||||
/* FCS append */
|
||||
#define FCS_NOTPASS 0 /* receive CRC is not passed to the host */
|
||||
#define FCS_PASS 1 /* receive CRC is passed to the host */
|
||||
|
||||
/* CRC modes */
|
||||
#define CRC_INVERT 0 /* CRC is transmitted inverted (CRC V.41) */
|
||||
#define CRC_DONT_INVERT 1 /* CRC is not transmitted inverted (CRC-16) */
|
||||
|
||||
/* Send sync pattern */
|
||||
#define SYNC_00 0 /* send 00h as pad char (NRZI encoding) */
|
||||
#define SYNC_AA 1 /* send AAh (Manchester/NRZ encoding) */
|
||||
|
||||
/* FCS preset */
|
||||
#define FCSP_ONES 0 /* FCS is preset to all ones (CRC V.41) */
|
||||
#define FCSP_ZEROS 1 /* FCS is preset to all zeros (CRC-16) */
|
||||
|
||||
/* idle mode */
|
||||
#define IDLE_FLAG 0 /* idle in flag */
|
||||
#define IDLE_MARK 1 /* idle in mark */
|
||||
|
||||
/* CRC polynomial select */
|
||||
#define POLY_V41 0 /* x^16+x^12+x^5+1 (HDLC, preset to 1) */
|
||||
#define POLY_16 1 /* x^16+x^15+x^2+1 (bisync, preset to 0) */
|
||||
|
||||
typedef struct { /* hdlc channel option register 1 */
|
||||
unsigned ifflags : 4; /* number of inter-frame flags sent */
|
||||
unsigned admode : 2; /* addressing mode */
|
||||
unsigned clrdet : 1; /* clear detect for X.21 data transfer phase */
|
||||
unsigned aflo : 1; /* address field length option */
|
||||
} cx_cor1_hdlc_t;
|
||||
|
||||
typedef struct { /* hdlc channel option register 2 */
|
||||
unsigned dsrae : 1; /* DSR automatic enable */
|
||||
unsigned ctsae : 1; /* CTS automatic enable */
|
||||
unsigned rtsao : 1; /* RTS automatic output enable */
|
||||
unsigned zero1 : 1;
|
||||
unsigned crcninv : 1; /* CRC invertion option */
|
||||
unsigned zero2 : 1;
|
||||
unsigned fcsapd : 1; /* FCS append */
|
||||
unsigned zero3 : 1;
|
||||
} cx_cor2_hdlc_t;
|
||||
|
||||
typedef struct { /* hdlc channel option register 3 */
|
||||
unsigned padcnt : 3; /* pad character count */
|
||||
unsigned idle : 1; /* idle mode */
|
||||
unsigned nofcs : 1; /* FCS disable */
|
||||
unsigned fcspre : 1; /* FCS preset */
|
||||
unsigned syncpat : 1; /* send sync pattern */
|
||||
unsigned sndpad : 1; /* send pad characters before flag enable */
|
||||
} cx_cor3_hdlc_t;
|
||||
|
||||
typedef struct { /* hdlc channel options */
|
||||
cx_cor1_hdlc_t cor1; /* hdlc channel option register 1 */
|
||||
cx_cor2_hdlc_t cor2; /* hdlc channel option register 2 */
|
||||
cx_cor3_hdlc_t cor3; /* hdlc channel option register 3 */
|
||||
unsigned char rfar1; /* receive frame address register 1 */
|
||||
unsigned char rfar2; /* receive frame address register 2 */
|
||||
unsigned char rfar3; /* receive frame address register 3 */
|
||||
unsigned char rfar4; /* receive frame address register 4 */
|
||||
unsigned char cpsr; /* CRC polynomial select */
|
||||
} cx_opt_hdlc_t;
|
||||
|
||||
/*
|
||||
* CD2400 channel state structure --------------------------------------------
|
||||
*/
|
||||
|
||||
/* Signal encoding */
|
||||
#define ENCOD_NRZ 0 /* NRZ mode */
|
||||
#define ENCOD_NRZI 1 /* NRZI mode */
|
||||
#define ENCOD_MANCHESTER 2 /* Manchester mode */
|
||||
|
||||
/* Clock source */
|
||||
#define CLK_0 0 /* clock 0 */
|
||||
#define CLK_1 1 /* clock 1 */
|
||||
#define CLK_2 2 /* clock 2 */
|
||||
#define CLK_3 3 /* clock 3 */
|
||||
#define CLK_4 4 /* clock 4 */
|
||||
#define CLK_EXT 6 /* external clock */
|
||||
#define CLK_RCV 7 /* receive clock */
|
||||
|
||||
/* Board type */
|
||||
#define B_SIGMA_XXX 0 /* old Sigmas */
|
||||
#define B_SIGMA_2X 1 /* Sigma-22 */
|
||||
#define B_SIGMA_800 2 /* Sigma-800 */
|
||||
|
||||
/* Channel type */
|
||||
#define T_NONE 0 /* no channel */
|
||||
#define T_ASYNC 1 /* pure asynchronous RS-232 channel */
|
||||
#define T_SYNC_RS232 2 /* pure synchronous RS-232 channel */
|
||||
#define T_SYNC_V35 3 /* pure synchronous V.35 channel */
|
||||
#define T_SYNC_RS449 4 /* pure synchronous RS-449 channel */
|
||||
#define T_UNIV_RS232 5 /* sync/async RS-232 channel */
|
||||
#define T_UNIV_RS449 6 /* sync/async RS-232/RS-449 channel */
|
||||
#define T_UNIV_V35 7 /* sync/async RS-232/V.35 channel */
|
||||
#define T_UNIV 8 /* sync/async, unknown interface */
|
||||
|
||||
#define M_ASYNC 0 /* asynchronous mode */
|
||||
#define M_HDLC 1 /* bit-sync mode (HDLC) */
|
||||
|
||||
typedef struct { /* channel option register 4 */
|
||||
unsigned thr : 4; /* FIFO threshold */
|
||||
unsigned zero : 1;
|
||||
unsigned cts_zd : 1; /* detect 1 to 0 transition on the CTS */
|
||||
unsigned cd_zd : 1; /* detect 1 to 0 transition on the CD */
|
||||
unsigned dsr_zd : 1; /* detect 1 to 0 transition on the DSR */
|
||||
} cx_cor4_t;
|
||||
|
||||
typedef struct { /* channel option register 5 */
|
||||
unsigned rx_thr : 4; /* receive flow control FIFO threshold */
|
||||
unsigned zero : 1;
|
||||
unsigned cts_od : 1; /* detect 0 to 1 transition on the CTS */
|
||||
unsigned cd_od : 1; /* detect 0 to 1 transition on the CD */
|
||||
unsigned dsr_od : 1; /* detect 0 to 1 transition on the DSR */
|
||||
} cx_cor5_t;
|
||||
|
||||
typedef struct { /* receive clock option register */
|
||||
unsigned clk : 3; /* receive clock source */
|
||||
unsigned encod : 2; /* signal encoding NRZ/NRZI/Manchester */
|
||||
unsigned dpll : 1; /* DPLL enable */
|
||||
unsigned zero : 1;
|
||||
unsigned tlval : 1; /* transmit line value */
|
||||
} cx_rcor_t;
|
||||
|
||||
typedef struct { /* transmit clock option register */
|
||||
unsigned zero1 : 1;
|
||||
unsigned llm : 1; /* local loopback mode */
|
||||
unsigned zero2 : 1;
|
||||
unsigned ext1x : 1; /* external 1x clock mode */
|
||||
unsigned zero3 : 1;
|
||||
unsigned clk : 3; /* transmit clock source */
|
||||
} cx_tcor_t;
|
||||
|
||||
typedef struct {
|
||||
cx_cor4_t cor4; /* channel option register 4 */
|
||||
cx_cor5_t cor5; /* channel option register 5 */
|
||||
cx_rcor_t rcor; /* receive clock option register */
|
||||
cx_tcor_t tcor; /* transmit clock option register */
|
||||
} cx_chan_opt_t;
|
||||
|
||||
typedef enum { /* line break mode */
|
||||
BRK_IDLE, /* normal line mode */
|
||||
BRK_SEND, /* start sending break */
|
||||
BRK_STOP, /* stop sending break */
|
||||
} cx_break_t;
|
||||
|
||||
#define BUS_NORMAL 0 /* normal bus timing */
|
||||
#define BUS_FAST 1 /* fast bus timing (Sigma-22 and -800) */
|
||||
#define BUS_FAST2 2 /* fast bus timing (Sigma-800) */
|
||||
#define BUS_FAST3 3 /* fast bus timing (Sigma-800) */
|
||||
|
||||
typedef struct { /* board options */
|
||||
unsigned char fast; /* bus master timing (Sigma-22 and -800) */
|
||||
} cx_board_opt_t;
|
||||
|
||||
#define NCHIP 4 /* the number of controllers per board */
|
||||
#define NCHAN 16 /* the number of channels on the board */
|
||||
|
||||
typedef struct {
|
||||
unsigned char tbuffer [2] [DMABUFSZ];
|
||||
unsigned char rbuffer [2] [DMABUFSZ];
|
||||
} cx_buf_t;
|
||||
|
||||
typedef struct _cx_chan_t {
|
||||
struct _cx_board_t *board; /* board pointer */
|
||||
unsigned char type; /* channel type */
|
||||
unsigned char num; /* channel number, 0..15 */
|
||||
port_t port; /* base port address */
|
||||
unsigned long oscfreq; /* oscillator frequency in Hz */
|
||||
unsigned long rxbaud; /* receiver speed */
|
||||
unsigned long txbaud; /* transmitter speed */
|
||||
unsigned char mode; /* channel mode */
|
||||
cx_chan_opt_t opt; /* common channel options */
|
||||
cx_opt_async_t aopt; /* async mode options */
|
||||
cx_opt_hdlc_t hopt; /* hdlc mode options */
|
||||
unsigned char *arbuf; /* receiver A dma buffer */
|
||||
unsigned char *brbuf; /* receiver B dma buffer */
|
||||
unsigned char *atbuf; /* transmitter A dma buffer */
|
||||
unsigned char *btbuf; /* transmitter B dma buffer */
|
||||
unsigned long arphys; /* receiver A phys address */
|
||||
unsigned long brphys; /* receiver B phys address */
|
||||
unsigned long atphys; /* transmitter A phys address */
|
||||
unsigned long btphys; /* transmitter B phys address */
|
||||
unsigned char dtr; /* DTR signal value */
|
||||
unsigned char rts; /* RTS signal value */
|
||||
|
||||
unsigned long rintr; /* receive interrupts */
|
||||
unsigned long tintr; /* transmit interrupts */
|
||||
unsigned long mintr; /* modem interrupts */
|
||||
unsigned long ibytes; /* input bytes */
|
||||
unsigned long ipkts; /* input packets */
|
||||
unsigned long ierrs; /* input errors */
|
||||
unsigned long obytes; /* output bytes */
|
||||
unsigned long opkts; /* output packets */
|
||||
unsigned long oerrs; /* output errors */
|
||||
|
||||
void *sys;
|
||||
int debug;
|
||||
void *attach [2];
|
||||
char *received_data;
|
||||
int received_len;
|
||||
int overflow;
|
||||
|
||||
void (*call_on_rx) (struct _cx_chan_t*, char*, int);
|
||||
void (*call_on_tx) (struct _cx_chan_t*, void*, int);
|
||||
void (*call_on_msig) (struct _cx_chan_t*);
|
||||
void (*call_on_err) (struct _cx_chan_t*, int);
|
||||
|
||||
} cx_chan_t;
|
||||
|
||||
typedef struct _cx_board_t {
|
||||
unsigned char type; /* board type */
|
||||
unsigned char num; /* board number, 0..2 */
|
||||
port_t port; /* base board port, 0..3f0 */
|
||||
unsigned char irq; /* irq {3 5 7 10 11 12 15} */
|
||||
unsigned char dma; /* DMA request {5 6 7} */
|
||||
char name[16]; /* board version name */
|
||||
unsigned char nuniv; /* number of universal channels */
|
||||
unsigned char nsync; /* number of sync. channels */
|
||||
unsigned char nasync; /* number of async. channels */
|
||||
unsigned char if0type; /* chan0 interface RS-232/RS-449/V.35 */
|
||||
unsigned char if8type; /* chan8 interface RS-232/RS-449/V.35 */
|
||||
unsigned short bcr0; /* BCR0 image */
|
||||
unsigned short bcr0b; /* BCR0b image */
|
||||
unsigned short bcr1; /* BCR1 image */
|
||||
unsigned short bcr1b; /* BCR1b image */
|
||||
cx_board_opt_t opt; /* board options */
|
||||
cx_chan_t chan[NCHAN]; /* channel structures */
|
||||
void *sys;
|
||||
} cx_board_t;
|
||||
|
||||
extern long cx_rxbaud, cx_txbaud;
|
||||
extern int cx_univ_mode, cx_sync_mode, cx_iftype;
|
||||
|
||||
extern cx_chan_opt_t chan_opt_dflt; /* default mode-independent options */
|
||||
extern cx_opt_async_t opt_async_dflt; /* default async options */
|
||||
extern cx_opt_hdlc_t opt_hdlc_dflt; /* default hdlc options */
|
||||
extern cx_board_opt_t board_opt_dflt; /* default board options */
|
||||
|
||||
struct _cr_dat_tst;
|
||||
int cx_probe_board (port_t port, int irq, int dma);
|
||||
void cx_init (cx_board_t *b, int num, port_t port, int irq, int dma);
|
||||
void cx_init_board (cx_board_t *b, int num, port_t port, int irq, int dma,
|
||||
int chain, int rev, int osc, int mod, int rev2, int osc2, int mod2);
|
||||
void cx_init_2x (cx_board_t *b, int num, port_t port, int irq, int dma,
|
||||
int rev, int osc);
|
||||
void cx_init_800 (cx_board_t *b, int num, port_t port, int irq, int dma,
|
||||
int chain);
|
||||
int cx_download (port_t port, const unsigned char *firmware, long bits,
|
||||
const struct _cr_dat_tst *tst);
|
||||
int cx_setup_board (cx_board_t *b, const unsigned char *firmware,
|
||||
long bits, const struct _cr_dat_tst *tst);
|
||||
void cx_setup_chan (cx_chan_t *c);
|
||||
void cx_update_chan (cx_chan_t *c);
|
||||
void cx_set_dtr (cx_chan_t *c, int on);
|
||||
void cx_set_rts (cx_chan_t *c, int on);
|
||||
void cx_led (cx_board_t *b, int on);
|
||||
void cx_cmd (port_t base, int cmd);
|
||||
void cx_disable_dma (cx_board_t *b);
|
||||
void cx_reinit_board (cx_board_t *b);
|
||||
int cx_get_dsr (cx_chan_t *c);
|
||||
int cx_get_cts (cx_chan_t *c);
|
||||
int cx_get_cd (cx_chan_t *c);
|
||||
void cx_clock (long hz, long ba, int *clk, int *div);
|
||||
|
||||
/* DDK errors */
|
||||
#define CX_FRAME 1
|
||||
#define CX_CRC 2
|
||||
#define CX_OVERRUN 3
|
||||
#define CX_OVERFLOW 4
|
||||
#define CX_UNDERRUN 5
|
||||
#define CX_BREAK 6
|
||||
|
||||
/* clock sources */
|
||||
#define CX_CLK_INT 0
|
||||
#define CX_CLK_EXT 6
|
||||
#define CX_CLK_RCV 7
|
||||
#define CX_CLK_DPLL 8
|
||||
#define CX_CLK_DPLL_EXT 14
|
||||
|
||||
/* functions dealing with interrupt vector in DOS */
|
||||
#if defined (MSDOS) || defined (__MSDOS__)
|
||||
int ddk_int_alloc (int irq, void (*func)(), void *arg);
|
||||
int ddk_int_restore (int irq);
|
||||
#endif
|
||||
|
||||
int cx_probe_irq (cx_board_t *b, int irq);
|
||||
void cx_int_handler (cx_board_t *b);
|
||||
|
||||
int cx_find (port_t *board_ports);
|
||||
int cx_open_board (cx_board_t *b, int num, port_t port, int irq, int dma);
|
||||
void cx_close_board (cx_board_t *b);
|
||||
|
||||
void cx_start_chan (cx_chan_t *c, cx_buf_t *cb, unsigned long phys);
|
||||
|
||||
/*
|
||||
Set port type for old models of Sigma
|
||||
*/
|
||||
void cx_set_port (cx_chan_t *c, int iftype);
|
||||
|
||||
/*
|
||||
Get port type for old models of Sigma
|
||||
-1 Fixed port type or auto detect
|
||||
0 RS232
|
||||
1 V35
|
||||
2 RS449
|
||||
*/
|
||||
int cx_get_port (cx_chan_t *c);
|
||||
|
||||
void cx_enable_receive (cx_chan_t *c, int on);
|
||||
void cx_enable_transmit (cx_chan_t *c, int on);
|
||||
int cx_receive_enabled (cx_chan_t *c);
|
||||
int cx_transmit_enabled (cx_chan_t *c);
|
||||
|
||||
void cx_set_baud (cx_chan_t *, unsigned long baud);
|
||||
int cx_set_mode (cx_chan_t *c, int mode);
|
||||
void cx_set_loop (cx_chan_t *c, int on);
|
||||
void cx_set_nrzi (cx_chan_t *c, int nrzi);
|
||||
void cx_set_dpll (cx_chan_t *c, int on);
|
||||
|
||||
unsigned long cx_get_baud (cx_chan_t *c);
|
||||
int cx_get_loop (cx_chan_t *c);
|
||||
int cx_get_nrzi (cx_chan_t *c);
|
||||
int cx_get_dpll (cx_chan_t *c);
|
||||
|
||||
int cx_send_packet (cx_chan_t *c, char *data, int len, void *attachment);
|
||||
int cx_buf_free (cx_chan_t *c);
|
||||
|
||||
void cx_register_transmit (cx_chan_t *c,
|
||||
void (*func) (cx_chan_t *c, void *attachment, int len));
|
||||
void cx_register_receive (cx_chan_t *c,
|
||||
void (*func) (cx_chan_t *c, char *data, int len));
|
||||
void cx_register_modem (cx_chan_t *c, void (*func) (cx_chan_t *c));
|
||||
void cx_register_error (cx_chan_t *c, void (*func) (cx_chan_t *c, int data));
|
||||
void cx_intr_off (cx_board_t *b);
|
||||
void cx_intr_on (cx_board_t *b);
|
||||
int cx_checkintr (cx_board_t *b);
|
||||
|
||||
/* Async functions */
|
||||
void cx_transmitter_ctl (cx_chan_t *c, int start);
|
||||
void cx_flush_transmit (cx_chan_t *c);
|
||||
void cx_xflow_ctl (cx_chan_t *c, int on);
|
||||
void cx_send_break (cx_chan_t *c, int msec);
|
||||
void cx_set_async_param (cx_chan_t *c, int baud, int bits, int parity,
|
||||
int stop2, int ignpar, int rtscts,
|
||||
int ixon, int ixany, int symstart, int symstop);
|
486
sys/dev/cx/cxreg.h
Normal file
486
sys/dev/cx/cxreg.h
Normal file
@ -0,0 +1,486 @@
|
||||
/*
|
||||
* Defines for Cronyx-Sigma adapter, based on Cirrus Logic multiprotocol
|
||||
* controller RISC processor CL-CD2400/2401.
|
||||
*
|
||||
* Copyright (C) 1994-2000 Cronyx Engineering.
|
||||
* Author: Serge Vakulenko, <vak@cronyx.ru>
|
||||
*
|
||||
* This software is distributed with NO WARRANTIES, not even the implied
|
||||
* warranties for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
||||
*
|
||||
* Authors grant any other persons or organisations permission to use
|
||||
* or modify this software as long as this message is kept with the software,
|
||||
* all derivative works or modified versions.
|
||||
*
|
||||
* Cronyx Id: cxreg.h,v 1.1.2.1 2003/11/12 17:13:41 rik Exp $
|
||||
* $FreeBSD$
|
||||
*/
|
||||
#define REVCL_MIN 7 /* CD2400 min. revision number G */
|
||||
#define REVCL_MAX 13 /* CD2400 max. revision number M */
|
||||
#define REVCL31_MIN 0x33 /* CD2431 min. revision number C */
|
||||
#define REVCL31_MAX 0x34 /* CD2431 max. revision number D */
|
||||
|
||||
#define BRD_INTR_LEVEL 0x5a /* interrupt level (arbitrary PILR value) */
|
||||
|
||||
#define CS0(p) ((p) | 0x8000) /* chip select 0 */
|
||||
#define CS1(p) ((p) | 0xc000) /* chip select 1 */
|
||||
#define CS1A(p) ((p) | 0x8010) /* chip select 1 for agp-compatible models */
|
||||
#define BSR(p) (p) /* board status register, read only */
|
||||
#define BCR0(p) (p) /* board command register 0, write only */
|
||||
#define BCR1(p) ((p) | 0x2000) /* board command register 1, write only */
|
||||
|
||||
/*
|
||||
* For Sigma-800 only.
|
||||
*/
|
||||
#define BDET(p) ((p) | 0x2000) /* board detection register, read only */
|
||||
#define BCR2(p) ((p) | 0x4000) /* board command register 2, write only */
|
||||
|
||||
/*
|
||||
* Chip register address, B is chip base port, R is chip register number.
|
||||
*/
|
||||
#define R(b,r) ((b) | (((r)<<6 & 0x3c00) | ((r) & 0xf)))
|
||||
|
||||
/*
|
||||
* Interrupt acknowledge register, P is board port, L is interrupt level,
|
||||
* as prodrammed in PILR.
|
||||
*/
|
||||
#define IACK(p,l) (R(p,l) | 0x4000)
|
||||
|
||||
/*
|
||||
* Global registers.
|
||||
*/
|
||||
#define GFRCR(b) R(b,0x82) /* global firmware revision code register */
|
||||
#define CAR(b) R(b,0xec) /* channel access register */
|
||||
|
||||
/*
|
||||
* Option registers.
|
||||
*/
|
||||
#define CMR(b) R(b,0x18) /* channel mode register */
|
||||
#define COR1(b) R(b,0x13) /* channel option register 1 */
|
||||
#define COR2(b) R(b,0x14) /* channel option register 2 */
|
||||
#define COR3(b) R(b,0x15) /* channel option register 3 */
|
||||
#define COR4(b) R(b,0x16) /* channel option register 4 */
|
||||
#define COR5(b) R(b,0x17) /* channel option register 5 */
|
||||
#define COR6(b) R(b,0x1b) /* channel option register 6 */
|
||||
#define COR7(b) R(b,0x04) /* channel option register 7 */
|
||||
#define SCHR1(b) R(b,0x1c) /* special character register 1 */
|
||||
#define SCHR2(b) R(b,0x1d) /* special character register 2 */
|
||||
#define SCHR3(b) R(b,0x1e) /* special character register 3 */
|
||||
#define SCHR4(b) R(b,0x1f) /* special character register 4 */
|
||||
#define SCRL(b) R(b,0x20) /* special character range low */
|
||||
#define SCRH(b) R(b,0x21) /* special character range high */
|
||||
#define LNXT(b) R(b,0x2d) /* LNext character */
|
||||
#define RFAR1(b) R(b,0x1c) /* receive frame address register 1 */
|
||||
#define RFAR2(b) R(b,0x1d) /* receive frame address register 2 */
|
||||
#define RFAR3(b) R(b,0x1e) /* receive frame address register 3 */
|
||||
#define RFAR4(b) R(b,0x1f) /* receive frame address register 4 */
|
||||
#define CPSR(b) R(b,0xd4) /* CRC polynomial select register */
|
||||
|
||||
/*
|
||||
* Bit rate and clock option registers.
|
||||
*/
|
||||
#define RBPR(b) R(b,0xc9) /* receive baud rate period register */
|
||||
#define RCOR(b) R(b,0xca) /* receive clock option register */
|
||||
#define TBPR(b) R(b,0xc1) /* transmit baud rate period register */
|
||||
#define TCOR(b) R(b,0xc2) /* receive clock option register */
|
||||
|
||||
/*
|
||||
* Channel command and status registers.
|
||||
*/
|
||||
#define CCR(b) R(b,0x10) /* channel command register */
|
||||
#define STCR(b) R(b,0x11) /* special transmit command register */
|
||||
#define CSR(b) R(b,0x19) /* channel status register */
|
||||
#define MSVR(b) R(b,0xdc) /* modem signal value register */
|
||||
#define MSVR_RTS(b) R(b,0xdc) /* modem RTS setup register */
|
||||
#define MSVR_DTR(b) R(b,0xdd) /* modem DTR setup register */
|
||||
|
||||
/*
|
||||
* Interrupt registers.
|
||||
*/
|
||||
#define LIVR(b) R(b,0x0a) /* local interrupt vector register */
|
||||
#define IER(b) R(b,0x12) /* interrupt enable register */
|
||||
#define LICR(b) R(b,0x25) /* local interrupting channel register */
|
||||
#define STK(b) R(b,0xe0) /* stack register */
|
||||
|
||||
/*
|
||||
* Receive interrupt registers.
|
||||
*/
|
||||
#define RPILR(b) R(b,0xe3) /* receive priority interrupt level register */
|
||||
#define RIR(b) R(b,0xef) /* receive interrupt register */
|
||||
#define RISR(b) R(b,0x8a) /* receive interrupt status register */
|
||||
#define RISRL(b) R(b,0x8a) /* receive interrupt status register low */
|
||||
#define RISRH(b) R(b,0x8b) /* receive interrupt status register high */
|
||||
#define RFOC(b) R(b,0x33) /* receive FIFO output count */
|
||||
#define RDR(b) R(b,0xf8) /* receive data register */
|
||||
#define REOIR(b) R(b,0x87) /* receive end of interrupt register */
|
||||
|
||||
/*
|
||||
* Transmit interrupt registers.
|
||||
*/
|
||||
#define TPILR(b) R(b,0xe2) /* transmit priority interrupt level reg */
|
||||
#define TIR(b) R(b,0xee) /* transmit interrupt register */
|
||||
#define TISR(b) R(b,0x89) /* transmit interrupt status register */
|
||||
#define TFTC(b) R(b,0x83) /* transmit FIFO transfer count */
|
||||
#define TDR(b) R(b,0xf8) /* transmit data register */
|
||||
#define TEOIR(b) R(b,0x86) /* transmit end of interrupt register */
|
||||
|
||||
/*
|
||||
* Modem interrupt registers.
|
||||
*/
|
||||
#define MPILR(b) R(b,0xe1) /* modem priority interrupt level register */
|
||||
#define MIR(b) R(b,0xed) /* modem interrupt register */
|
||||
#define MISR(b) R(b,0x88) /* modem/timer interrupt status register */
|
||||
#define MEOIR(b) R(b,0x85) /* modem end of interrupt register */
|
||||
|
||||
/*
|
||||
* DMA registers.
|
||||
*/
|
||||
#define DMR(b) R(b,0xf4) /* DMA mode register */
|
||||
#define BERCNT(b) R(b,0x8d) /* bus error retry count */
|
||||
#define DMABSTS(b) R(b,0x1a) /* DMA buffer status */
|
||||
|
||||
/*
|
||||
* DMA receive registers.
|
||||
*/
|
||||
#define ARBADRL(b) R(b,0x40) /* A receive buffer address lower */
|
||||
#define ARBADRU(b) R(b,0x42) /* A receive buffer address upper */
|
||||
#define BRBADRL(b) R(b,0x44) /* B receive buffer address lower */
|
||||
#define BRBADRU(b) R(b,0x46) /* B receive buffer address upper */
|
||||
#define ARBCNT(b) R(b,0x48) /* A receive buffer byte count */
|
||||
#define BRBCNT(b) R(b,0x4a) /* B receive buffer byte count */
|
||||
#define ARBSTS(b) R(b,0x4c) /* A receive buffer status */
|
||||
#define BRBSTS(b) R(b,0x4d) /* B receive buffer status */
|
||||
#define RCBADRL(b) R(b,0x3c) /* receive current buffer address lower */
|
||||
#define RCBADRU(b) R(b,0x3e) /* receive current buffer address upper */
|
||||
|
||||
/*
|
||||
* DMA transmit registers.
|
||||
*/
|
||||
#define ATBADRL(b) R(b,0x50) /* A transmit buffer address lower */
|
||||
#define ATBADRU(b) R(b,0x52) /* A transmit buffer address upper */
|
||||
#define BTBADRL(b) R(b,0x54) /* B transmit buffer address lower */
|
||||
#define BTBADRU(b) R(b,0x56) /* B transmit buffer address upper */
|
||||
#define ATBCNT(b) R(b,0x58) /* A transmit buffer byte count */
|
||||
#define BTBCNT(b) R(b,0x5a) /* B transmit buffer byte count */
|
||||
#define ATBSTS(b) R(b,0x5c) /* A transmit buffer status */
|
||||
#define BTBSTS(b) R(b,0x5d) /* B transmit buffer status */
|
||||
#define TCBADRL(b) R(b,0x38) /* transmit current buffer address lower */
|
||||
#define TCBADRU(b) R(b,0x3a) /* transmit current buffer address upper */
|
||||
|
||||
/*
|
||||
* Timer registers.
|
||||
*/
|
||||
#define TPR(b) R(b,0xd8) /* timer period register */
|
||||
#define RTPR(b) R(b,0x26) /* receive timeout period register */
|
||||
#define RTPRL(b) R(b,0x26) /* receive timeout period register low */
|
||||
#define RTPTH(b) R(b,0x27) /* receive timeout period register high */
|
||||
#define GT1(b) R(b,0x28) /* general timer 1 */
|
||||
#define GT1L(b) R(b,0x28) /* general timer 1 low */
|
||||
#define GT1H(b) R(b,0x29) /* general timer 1 high */
|
||||
#define GT2(b) R(b,0x2a) /* general timer 2 */
|
||||
#define TTR(b) R(b,0x2a) /* transmit timer register */
|
||||
|
||||
/*
|
||||
* Board status register bits, for all models.
|
||||
*/
|
||||
#define BSR_NOINTR 0x01 /* no interrupt pending flag */
|
||||
#define BSR_NOCHAIN 0x80 /* no daisy chained board, all but Sigma-22 */
|
||||
|
||||
/*
|
||||
* For old Sigmas only.
|
||||
*/
|
||||
#define BSR_VAR_MASK 0x66 /* adapter variant mask */
|
||||
#define BSR_OSC_MASK 0x18 /* oscillator frequency mask */
|
||||
#define BSR_OSC_20 0x18 /* 20 MHz */
|
||||
#define BSR_OSC_18432 0x10 /* 18.432 MHz */
|
||||
|
||||
#define BSR_NODSR(n) (0x100 << (n)) /* DSR from channels 0-3, inverted */
|
||||
#define BSR_NOCD(n) (0x1000 << (n)) /* CD from channels 0-3, inverted */
|
||||
|
||||
/*
|
||||
* Board status register bits for Sigma-2x.
|
||||
*/
|
||||
#define BSR2X_OSC_33 0x08 /* oscillator 33/20 MHz bit */
|
||||
#define BSR2X_VAR_MASK 0x30 /* Sigma-2x variant mask */
|
||||
|
||||
/*
|
||||
* Board status register bits for Sigma-800.
|
||||
*/
|
||||
#define BSR800_NU0 0x02 /* no channels 0-3 installed */
|
||||
#define BSR800_NU1 0x04 /* no channels 4-7 installed */
|
||||
#define BSR800_LERR 0x08 /* firmware load error */
|
||||
#define BSR800_MIRQ 0x10 /* modem IRQ active */
|
||||
#define BSR800_TIRQ 0x20 /* transmit IRQ active */
|
||||
#define BSR800_RIRQ 0x40 /* receive IRQ active */
|
||||
|
||||
#define BDET_IB 0x08 /* identification bit */
|
||||
#define BDET_IB_NEG 0x80 /* negated identification bit */
|
||||
|
||||
/*
|
||||
* Sigma-800 control register 2 bits.
|
||||
*/
|
||||
#define BCR2_BUS0 0x01 /* bus timing control */
|
||||
#define BCR2_BUS1 0x02 /* bus timing control */
|
||||
#define BCR2_TMS 0x08 /* firmware download signal */
|
||||
#define BCR2_TDI 0x80 /* firmware download signal */
|
||||
|
||||
/*
|
||||
* Board revision mask.
|
||||
*/
|
||||
#define BSR_REV_MASK (BSR_OSC_MASK|BSR_VAR_MASK|BSR_NOCHAIN)
|
||||
#define BSR2X_REV_MASK (BSR_OSC_MASK|BSR_VAR_MASK)
|
||||
|
||||
/*
|
||||
* Sigma-2x variants.
|
||||
*/
|
||||
#define CRONYX_22 0x20
|
||||
#define CRONYX_24 0x00
|
||||
|
||||
/*
|
||||
* Sigma-XXX variants.
|
||||
*/
|
||||
#define CRONYX_100 0x64
|
||||
#define CRONYX_400 0x62
|
||||
#define CRONYX_500 0x60
|
||||
#define CRONYX_410 0x24
|
||||
#define CRONYX_810 0x20
|
||||
#define CRONYX_410s 0x04
|
||||
#define CRONYX_810s 0x00
|
||||
#define CRONYX_440 0x44
|
||||
#define CRONYX_840 0x40
|
||||
#define CRONYX_401 0x26
|
||||
#define CRONYX_801 0x22
|
||||
#define CRONYX_401s 0x06
|
||||
#define CRONYX_801s 0x02
|
||||
#define CRONYX_404 0x46
|
||||
#define CRONYX_703 0x42
|
||||
|
||||
/*
|
||||
* Board control register 0 bits.
|
||||
*/
|
||||
#define BCR0_IRQ_DIS 0x00 /* no interrupt generated */
|
||||
#define BCR0_IRQ_3 0x01 /* select IRQ number 3 */
|
||||
#define BCR0_IRQ_5 0x02 /* select IRQ number 5 */
|
||||
#define BCR0_IRQ_7 0x03 /* select IRQ number 7 */
|
||||
#define BCR0_IRQ_10 0x04 /* select IRQ number 10 */
|
||||
#define BCR0_IRQ_11 0x05 /* select IRQ number 11 */
|
||||
#define BCR0_IRQ_12 0x06 /* select IRQ number 12 */
|
||||
#define BCR0_IRQ_15 0x07 /* select IRQ number 15 */
|
||||
#define BCR0_IRQ_MASK 0x07 /* irq select mask */
|
||||
|
||||
#define BCR0_DMA_DIS 0x00 /* no interrupt generated */
|
||||
#define BCR0_DMA_5 0x10 /* select DMA channel 5 */
|
||||
#define BCR0_DMA_6 0x20 /* select DMA channel 6 */
|
||||
#define BCR0_DMA_7 0x30 /* select DMA channel 7 */
|
||||
#define BCR0_DMA_MASK 0x30 /* drq select mask */
|
||||
|
||||
/* For old Sigmas only. */
|
||||
#define BCR0_NORESET 0x08 /* CD2400 reset flag (inverted) */
|
||||
|
||||
#define BCR0_UM_ASYNC 0x00 /* channel 0 mode - async */
|
||||
#define BCR0_UM_SYNC 0x80 /* channel 0 mode - sync */
|
||||
#define BCR0_UI_RS232 0x00 /* channel 0 interface - RS-232 */
|
||||
#define BCR0_UI_RS449 0x40 /* channel 0 interface - RS-449/V.35 */
|
||||
#define BCR0_UMASK 0xc0 /* channel 0 interface mask */
|
||||
|
||||
/* For Sigma-22 only. */
|
||||
#define BCR02X_FAST 0x40 /* fast bus timing */
|
||||
#define BCR02X_LED 0x80 /* LED control */
|
||||
|
||||
/* For Sigma-800 only. */
|
||||
#define BCR0800_TCK 0x80 /* firmware download signal */
|
||||
|
||||
/*
|
||||
* Board control register 1 bits.
|
||||
*/
|
||||
/* For old Sigmas only. */
|
||||
#define BCR1_DTR(n) (0x100 << (n)) /* DTR for channels 0-3 sync */
|
||||
|
||||
/* For Sigma-800 only. */
|
||||
#define BCR1800_DTR(n) (1 << ((n) & 7)) /* DTR for channels 0-7 sync */
|
||||
|
||||
/*
|
||||
* Channel commands (CCR).
|
||||
*/
|
||||
#define CCR_CLRCH 0x40 /* clear channel */
|
||||
#define CCR_INITCH 0x20 /* initialize channel */
|
||||
#define CCR_RSTALL 0x10 /* reset all channels */
|
||||
#define CCR_ENTX 0x08 /* enable transmitter */
|
||||
#define CCR_DISTX 0x04 /* disable transmitter */
|
||||
#define CCR_ENRX 0x02 /* enable receiver */
|
||||
#define CCR_DISRX 0x01 /* disable receiver */
|
||||
#define CCR_CLRT1 0xc0 /* clear timer 1 */
|
||||
#define CCR_CLRT2 0xa0 /* clear timer 2 */
|
||||
#define CCR_CLRRCV 0x90 /* clear receiver */
|
||||
#define CCR_CLRTX 0x88 /* clear transmitter */
|
||||
|
||||
/*
|
||||
* Interrupt enable register (IER) bits.
|
||||
*/
|
||||
#define IER_MDM 0x80 /* modem status changed */
|
||||
#define IER_RET 0x20 /* receive exception timeout */
|
||||
#define IER_RXD 0x08 /* data received */
|
||||
#define IER_TIMER 0x04 /* timer expired */
|
||||
#define IER_TXMPTY 0x02 /* transmitter empty */
|
||||
#define IER_TXD 0x01 /* data transmitted */
|
||||
|
||||
/*
|
||||
* Modem signal values register bits (MSVR).
|
||||
*/
|
||||
#define MSV_DSR 0x80 /* state of Data Set Ready input */
|
||||
#define MSV_CD 0x40 /* state of Carrier Detect input */
|
||||
#define MSV_CTS 0x20 /* state of Clear to Send input */
|
||||
#define MSV_TXCOUT 0x10 /* TXCout/DTR pin output flag */
|
||||
#define MSV_PORTID 0x04 /* device is CL-CD2401 (not 2400) */
|
||||
#define MSV_DTR 0x02 /* state of Data Terminal Ready output */
|
||||
#define MSV_RTS 0x01 /* state of Request to Send output */
|
||||
#define MSV_BITS "\20\1rts\2dtr\3cd2400\5txcout\6cts\7cd\10dsr"
|
||||
|
||||
/*
|
||||
* DMA buffer status register bits (DMABSTS).
|
||||
*/
|
||||
#define DMABSTS_TDALIGN 0x80 /* internal data alignment in transmit FIFO */
|
||||
#define DMABSTS_RSTAPD 0x40 /* reset append mode */
|
||||
#define DMABSTS_CRTTBUF 0x20 /* internal current transmit buffer in use */
|
||||
#define DMABSTS_APPEND 0x10 /* append buffer is in use */
|
||||
#define DMABSTS_NTBUF 0x08 /* next transmit buffer is B (not A) */
|
||||
#define DMABSTS_TBUSY 0x04 /* current transmit buffer is in use */
|
||||
#define DMABSTS_NRBUF 0x02 /* next receive buffer is B (not A) */
|
||||
#define DMABSTS_RBUSY 0x01 /* current receive buffer is in use */
|
||||
|
||||
/*
|
||||
* Buffer status register bits ([AB][RT]BSTS).
|
||||
*/
|
||||
#define BSTS_BUSERR 0x80 /* bus error */
|
||||
#define BSTS_EOFR 0x40 /* end of frame */
|
||||
#define BSTS_EOBUF 0x20 /* end of buffer */
|
||||
#define BSTS_APPEND 0x08 /* append mode */
|
||||
#define BSTS_INTR 0x02 /* interrupt required */
|
||||
#define BSTS_OWN24 0x01 /* buffer is (free to be) used by CD2400 */
|
||||
#define BSTS_BITS "\20\1own24\2intr\4append\6eobuf\7eofr\10buserr"
|
||||
|
||||
/*
|
||||
* Receive interrupt status register (RISR) bits.
|
||||
*/
|
||||
#define RIS_OVERRUN 0x0008 /* overrun error */
|
||||
#define RIS_BB 0x0800 /* buffer B status (not A) */
|
||||
#define RIS_EOBUF 0x2000 /* end of buffer reached */
|
||||
#define RIS_EOFR 0x4000 /* frame reception complete */
|
||||
#define RIS_BUSERR 0x8000 /* bus error */
|
||||
|
||||
#define RISH_CLRDCT 0x0001 /* X.21 clear detect */
|
||||
#define RISH_RESIND 0x0004 /* residual indication */
|
||||
#define RISH_CRCERR 0x0010 /* CRC error */
|
||||
#define RISH_RXABORT 0x0020 /* abort sequence received */
|
||||
#define RISH_EOFR 0x0040 /* complete frame received */
|
||||
#define RISH_BITS "\20\1clrdct\3resind\4overrun\5crcerr\6rxabort\7eofr\14bb\16eobuf\17eofr\20buserr"
|
||||
|
||||
#define RISA_BREAK 0x0001 /* break signal detected */
|
||||
#define RISA_FRERR 0x0002 /* frame error (bad stop bits) */
|
||||
#define RISA_PARERR 0x0004 /* parity error */
|
||||
#define RISA_SCMASK 0x0070 /* special character detect mask */
|
||||
#define RISA_SCHR1 0x0010 /* special character 1 detected */
|
||||
#define RISA_SCHR2 0x0020 /* special character 2 detected */
|
||||
#define RISA_SCHR3 0x0030 /* special character 3 detected */
|
||||
#define RISA_SCHR4 0x0040 /* special character 4 detected */
|
||||
#define RISA_SCRANGE 0x0070 /* special character in range detected */
|
||||
#define RISA_TIMEOUT 0x0080 /* receive timeout, no data */
|
||||
#define RISA_BITS "\20\1break\2frerr\3parerr\4overrun\5schr1\6schr2\7schr4\10timeout\14bb\16eobuf\17eofr\20buserr"
|
||||
|
||||
#define RISB_CRCERR 0x0010 /* CRC error */
|
||||
#define RISB_RXABORT 0x0020 /* abort sequence received */
|
||||
#define RISB_EOFR 0x0040 /* complete frame received */
|
||||
|
||||
#define RISX_LEADCHG 0x0001 /* CTS lead change */
|
||||
#define RISX_PARERR 0x0004 /* parity error */
|
||||
#define RISX_SCMASK 0x0070 /* special character detect mask */
|
||||
#define RISX_SCHR1 0x0010 /* special character 1 detected */
|
||||
#define RISX_SCHR2 0x0020 /* special character 2 detected */
|
||||
#define RISX_SCHR3 0x0030 /* special character 3 detected */
|
||||
#define RISX_ALLZERO 0x0040 /* all 0 condition detected */
|
||||
#define RISX_ALLONE 0x0050 /* all 1 condition detected */
|
||||
#define RISX_ALTOZ 0x0060 /* alternating 1 0 condition detected */
|
||||
#define RISX_SYN 0x0070 /* SYN detected */
|
||||
#define RISX_LEAD 0x0080 /* leading value */
|
||||
|
||||
/*
|
||||
* Channel mode register (CMR) bits.
|
||||
*/
|
||||
#define CMR_RXDMA 0x80 /* DMA receive transfer mode */
|
||||
#define CMR_TXDMA 0x40 /* DMA transmit transfer mode */
|
||||
#define CMR_HDLC 0x00 /* HDLC protocol mode */
|
||||
#define CMR_BISYNC 0x01 /* BISYNC protocol mode */
|
||||
#define CMR_ASYNC 0x02 /* ASYNC protocol mode */
|
||||
#define CMR_X21 0x03 /* X.21 protocol mode */
|
||||
|
||||
/*
|
||||
* Modem interrupt status register (MISR) bits.
|
||||
*/
|
||||
#define MIS_CDSR 0x80 /* DSR changed */
|
||||
#define MIS_CCD 0x40 /* CD changed */
|
||||
#define MIS_CCTS 0x20 /* CTS changed */
|
||||
#define MIS_CGT2 0x02 /* GT2 timer expired */
|
||||
#define MIS_CGT1 0x01 /* GT1 timer expired */
|
||||
#define MIS_BITS "\20\1gt1\2gt2\6ccts\7ccd\10cdsr"
|
||||
|
||||
/*
|
||||
* Transmit interrupt status register (TISR) bits.
|
||||
*/
|
||||
#define TIS_BUSERR 0x80 /* Bus error */
|
||||
#define TIS_EOFR 0x40 /* End of frame */
|
||||
#define TIS_EOBUF 0x20 /* end of transmit buffer reached */
|
||||
#define TIS_UNDERRUN 0x10 /* transmit underrun */
|
||||
#define TIS_BB 0x08 /* buffer B status (not A) */
|
||||
#define TIS_TXEMPTY 0x02 /* transmitter empty */
|
||||
#define TIS_TXDATA 0x01 /* transmit data below threshold */
|
||||
#define TIS_BITS "\20\1txdata\2txempty\4bb\5underrun\6eobuf\7eofr\10buserr"
|
||||
|
||||
/*
|
||||
* Local interrupt vector register (LIVR) bits.
|
||||
*/
|
||||
#define LIV_EXCEP 0
|
||||
#define LIV_MODEM 1
|
||||
#define LIV_TXDATA 2
|
||||
#define LIV_RXDATA 3
|
||||
|
||||
/*
|
||||
* Transmit end of interrupt registers (TEOIR) bits.
|
||||
*/
|
||||
#define TEOI_TERMBUFF 0x80 /* force current buffer to be discarded */
|
||||
#define TEOI_EOFR 0x40 /* end of frame in interrupt mode */
|
||||
#define TEOI_SETTM2 0x20 /* set general timer 2 in sync mode */
|
||||
#define TEOI_SETTM1 0x10 /* set general timer 1 in sync mode */
|
||||
#define TEOI_NOTRANSF 0x08 /* no transfer of data on this interrupt */
|
||||
|
||||
/*
|
||||
* Receive end of interrupt registers (REOIR) bits.
|
||||
*/
|
||||
#define REOI_TERMBUFF 0x80 /* force current buffer to be terminated */
|
||||
#define REOI_DISCEXC 0x40 /* discard exception character */
|
||||
#define REOI_SETTM2 0x20 /* set general timer 2 */
|
||||
#define REOI_SETTM1 0x10 /* set general timer 1 */
|
||||
#define REOI_NOTRANSF 0x08 /* no transfer of data */
|
||||
#define REOI_GAP_MASK 0x07 /* optional gap size to leave in buffer */
|
||||
|
||||
/*
|
||||
* Special transmit command register (STCR) bits.
|
||||
*/
|
||||
#define STC_ABORTTX 0x40 /* abort transmission (HDLC mode) */
|
||||
#define STC_APPDCMP 0x20 /* append complete (async DMA mode) */
|
||||
#define STC_SNDSPC 0x08 /* send special characters (async mode) */
|
||||
#define STC_SSPC_MASK 0x07 /* special character select */
|
||||
#define STC_SSPC_1 0x01 /* send special character #1 */
|
||||
#define STC_SSPC_2 0x02 /* send special character #2 */
|
||||
#define STC_SSPC_3 0x03 /* send special character #3 */
|
||||
#define STC_SSPC_4 0x04 /* send special character #4 */
|
||||
|
||||
/*
|
||||
* Channel status register (CSR) bits, asynchronous mode.
|
||||
*/
|
||||
#define CSRA_RXEN 0x80 /* receiver enable */
|
||||
#define CSRA_RXFLOFF 0x40 /* receiver flow off */
|
||||
#define CSRA_RXFLON 0x20 /* receiver flow on */
|
||||
#define CSRA_TXEN 0x08 /* transmitter enable */
|
||||
#define CSRA_TXFLOFF 0x04 /* transmitter flow off */
|
||||
#define CSRA_TXFLON 0x02 /* transmitter flow on */
|
||||
#define CSRA_BITS "\20\2txflon\3txfloff\4txen\6rxflon\7rxfloff\10rxen"
|
3240
sys/dev/cx/if_cx.c
Normal file
3240
sys/dev/cx/if_cx.c
Normal file
File diff suppressed because it is too large
Load Diff
96
sys/dev/cx/machdep.h
Normal file
96
sys/dev/cx/machdep.h
Normal file
@ -0,0 +1,96 @@
|
||||
/*
|
||||
* Cronyx DDK: platform dependent definitions.
|
||||
*
|
||||
* Copyright (C) 1998-1999 Cronyx Engineering
|
||||
* Author: Alexander Kvitchenko, <aak@cronyx.ru>
|
||||
*
|
||||
* Copyright (C) 2001-2003 Cronyx Engineering.
|
||||
* Author: Roman Kurakin, <rik@cronyx.ru>
|
||||
*
|
||||
* This software is distributed with NO WARRANTIES, not even the implied
|
||||
* warranties for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
||||
*
|
||||
* Authors grant any other persons or organisations permission to use
|
||||
* or modify this software as long as this message is kept with the software,
|
||||
* all derivative works or modified versions.
|
||||
*
|
||||
* Cronyx Id: machdep.h,v 1.3.4.3 2003/11/27 14:21:58 rik Exp $
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
/*
|
||||
* DOS (Borland Turbo C++ 1.0)
|
||||
*/
|
||||
#if defined (MSDOS) || defined (__MSDOS__)
|
||||
# include <dos.h>
|
||||
# include <string.h>
|
||||
# define inb(port) inportb(port)
|
||||
# define inw(port) inport(port)
|
||||
# define outb(port,b) outportb(port,b)
|
||||
# define outw(port,w) outport(port,w)
|
||||
# define GETTICKS() biostime(0,0L)
|
||||
#else
|
||||
|
||||
/*
|
||||
* Windows NT
|
||||
*/
|
||||
#ifdef NDIS_MINIPORT_DRIVER
|
||||
# include <string.h>
|
||||
# define inb(port) inp((unsigned short)(port))
|
||||
# define inw(port) inpw((unsigned short)(port))
|
||||
# define outb(port,b) outp((unsigned short)(port),b)
|
||||
# define outw(port,w) outpw((unsigned short)(port),(unsigned short)(w))
|
||||
#pragma warning (disable: 4761)
|
||||
#pragma warning (disable: 4242)
|
||||
#pragma warning (disable: 4244)
|
||||
#define ulong64 unsigned __int64
|
||||
#else
|
||||
|
||||
/*
|
||||
* Linux
|
||||
*/
|
||||
#ifdef __linux__
|
||||
# undef REALLY_SLOW_IO
|
||||
# include <asm/io.h> /* should swap outb() arguments */
|
||||
# include <linux/string.h>
|
||||
# include <linux/delay.h>
|
||||
static inline void __ddk_outb (unsigned port, unsigned char byte)
|
||||
{ outb (byte, port); }
|
||||
static inline void __ddk_outw (unsigned port, unsigned short word)
|
||||
{ outw (word, port); }
|
||||
# undef outb
|
||||
# undef outw
|
||||
# define outb(port,val) __ddk_outb(port, val)
|
||||
# define outw(port,val) __ddk_outw(port, val)
|
||||
# define GETTICKS() (jiffies * 200 / 11 / HZ)
|
||||
#else
|
||||
|
||||
/*
|
||||
* FreeBSD and BSD/OS
|
||||
*/
|
||||
#ifdef __FreeBSD__
|
||||
# include <sys/param.h>
|
||||
# include <machine/cpufunc.h>
|
||||
# include <sys/libkern.h>
|
||||
# include <sys/systm.h>
|
||||
# define memset(a,b,c) bzero (a,c)
|
||||
# if __FreeBSD_version > 501000
|
||||
# define port_t int
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef inline
|
||||
# if __GNUC__ >= 2
|
||||
# define inline __inline__
|
||||
# else
|
||||
# define inline /**/
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifndef ulong64
|
||||
#define ulong64 unsigned long long
|
||||
#endif
|
30
sys/dev/cx/ng_cx.h
Normal file
30
sys/dev/cx/ng_cx.h
Normal file
@ -0,0 +1,30 @@
|
||||
/*
|
||||
* Defines for Cronyx-Tau adapter driver.
|
||||
*
|
||||
* Copyright (C) 1999 Cronyx Engineering.
|
||||
* Author: Kurakin Roman, <rik@cronyx.ru>
|
||||
*
|
||||
* This software is distributed with NO WARRANTIES, not even the implied
|
||||
* warranties for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
||||
*
|
||||
* Authors grant any other persons or organisations a permission to use,
|
||||
* modify and redistribute this software in source and binary forms,
|
||||
* as long as this message is kept with the software, all derivative
|
||||
* works or modified versions.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#ifdef NETGRAPH
|
||||
|
||||
#ifndef _CX_NETGRAPH_H_
|
||||
#define _CX_NETGRAPH_H_
|
||||
|
||||
#define NG_CX_NODE_TYPE "cx"
|
||||
#define NGM_CX_COOKIE 942763600
|
||||
#define NG_CX_HOOK_RAW "rawdata"
|
||||
#define NG_CX_HOOK_DEBUG "debug"
|
||||
|
||||
#endif /* _CX_NETGRAPH_H_ */
|
||||
|
||||
#endif /* NETGRAPH */
|
449
sys/i386/include/cserial.h
Normal file
449
sys/i386/include/cserial.h
Normal file
@ -0,0 +1,449 @@
|
||||
/*
|
||||
* Ioctl interface to Cronyx serial drivers.
|
||||
*
|
||||
* Copyright (C) 1997-2002 Cronyx Engineering.
|
||||
* Author: Serge Vakulenko, <vak@cronyx.ru>
|
||||
*
|
||||
* Copyright (C) 2001-2003 Cronyx Engineering.
|
||||
* Author: Roman Kurakin, <rik@cronyx.ru>
|
||||
*
|
||||
* This software is distributed with NO WARRANTIES, not even the implied
|
||||
* warranties for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
||||
*
|
||||
* Authors grant any other persons or organisations permission to use
|
||||
* or modify this software as long as this message is kept with the software,
|
||||
* all derivative works or modified versions.
|
||||
*
|
||||
* Cronyx Id: cserial.h,v 1.1.2.4 2003/11/12 17:11:08 rik Exp $
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
/*
|
||||
* General channel statistics.
|
||||
*/
|
||||
struct serial_statistics {
|
||||
unsigned long rintr; /* receive interrupts */
|
||||
unsigned long tintr; /* transmit interrupts */
|
||||
unsigned long mintr; /* modem interrupts */
|
||||
unsigned long ibytes; /* input bytes */
|
||||
unsigned long ipkts; /* input packets */
|
||||
unsigned long ierrs; /* input errors */
|
||||
unsigned long obytes; /* output bytes */
|
||||
unsigned long opkts; /* output packets */
|
||||
unsigned long oerrs; /* output errors */
|
||||
};
|
||||
|
||||
/*
|
||||
* Statistics for E1/G703 channels.
|
||||
*/
|
||||
struct e1_counters {
|
||||
unsigned long bpv; /* bipolar violations */
|
||||
unsigned long fse; /* frame sync errors */
|
||||
unsigned long crce; /* CRC errors */
|
||||
unsigned long rcrce; /* remote CRC errors (E-bit) */
|
||||
unsigned long uas; /* unavailable seconds */
|
||||
unsigned long les; /* line errored seconds */
|
||||
unsigned long es; /* errored seconds */
|
||||
unsigned long bes; /* bursty errored seconds */
|
||||
unsigned long ses; /* severely errored seconds */
|
||||
unsigned long oofs; /* out of frame seconds */
|
||||
unsigned long css; /* controlled slip seconds */
|
||||
unsigned long dm; /* degraded minutes */
|
||||
};
|
||||
|
||||
struct e1_statistics {
|
||||
unsigned long status; /* line status bit mask */
|
||||
unsigned long cursec; /* seconds in current interval */
|
||||
unsigned long totsec; /* total seconds elapsed */
|
||||
struct e1_counters currnt; /* current 15-min interval data */
|
||||
struct e1_counters total; /* total statistics data */
|
||||
struct e1_counters interval [48]; /* 12 hour period data */
|
||||
};
|
||||
|
||||
struct e3_statistics {
|
||||
unsigned long status;
|
||||
unsigned long cursec;
|
||||
unsigned long totsec;
|
||||
unsigned long ccv;
|
||||
unsigned long tcv;
|
||||
unsigned long icv[48];
|
||||
};
|
||||
|
||||
#define M_ASYNC 0 /* asynchronous mode */
|
||||
#define M_HDLC 1 /* bit-sync mode (HDLC) */
|
||||
#define M_G703 2
|
||||
#define M_E1 3
|
||||
|
||||
/*
|
||||
* Receive error codes.
|
||||
*/
|
||||
#define ER_FRAMING 1 /* framing error */
|
||||
#define ER_CHECKSUM 2 /* parity/CRC error */
|
||||
#define ER_BREAK 3 /* break state */
|
||||
#define ER_OVERFLOW 4 /* receive buffer overflow */
|
||||
#define ER_OVERRUN 5 /* receive fifo overrun */
|
||||
#define ER_UNDERRUN 6 /* transmit fifo underrun */
|
||||
#define ER_SCC_FRAMING 7 /* subchannel framing error */
|
||||
#define ER_SCC_OVERFLOW 8 /* subchannel receive buffer overflow */
|
||||
#define ER_SCC_OVERRUN 9 /* subchannel receiver overrun */
|
||||
|
||||
/*
|
||||
* E1 channel status.
|
||||
*/
|
||||
#define E1_NOALARM 0x0001 /* no alarm present */
|
||||
#define E1_FARLOF 0x0002 /* receiving far loss of framing */
|
||||
#define E1_AIS 0x0008 /* receiving all ones */
|
||||
#define E1_LOF 0x0020 /* loss of framing */
|
||||
#define E1_LOS 0x0040 /* loss of signal */
|
||||
#define E1_AIS16 0x0100 /* receiving all ones in timeslot 16 */
|
||||
#define E1_FARLOMF 0x0200 /* receiving alarm in timeslot 16 */
|
||||
#define E1_LOMF 0x0400 /* loss of multiframe sync */
|
||||
#define E1_TSTREQ 0x0800 /* test code detected */
|
||||
#define E1_TSTERR 0x1000 /* test error */
|
||||
|
||||
#define E3_LOS 0x00000002 /* Lost of synchronization */
|
||||
#define E3_TXE 0x00000004 /* Transmit error */
|
||||
|
||||
/*
|
||||
* Query the mask of all registered channels, max 128.
|
||||
*/
|
||||
#define SERIAL_GETREGISTERED _IOR ('x', 0, char[16])
|
||||
|
||||
/*
|
||||
* Attach/detach the protocol to the channel.
|
||||
* The protocol is given by it's name, char[8].
|
||||
* For example "async", "hdlc", "cisco", "fr", "ppp".
|
||||
*/
|
||||
#define SERIAL_GETPROTO _IOR ('x', 1, char [8])
|
||||
#define SERIAL_SETPROTO _IOW ('x', 1, char [8])
|
||||
|
||||
/*
|
||||
* Query/set the hardware mode for the channel.
|
||||
*/
|
||||
#define SERIAL_GETMODE _IOR ('x', 2, int)
|
||||
#define SERIAL_SETMODE _IOW ('x', 2, int)
|
||||
|
||||
#define SERIAL_ASYNC 1
|
||||
#define SERIAL_HDLC 2
|
||||
|
||||
/*
|
||||
* Get/clear the channel statistics.
|
||||
*/
|
||||
#define SERIAL_GETSTAT _IOR ('x', 3, struct serial_statistics)
|
||||
#define SERIAL_GETESTAT _IOR ('x', 3, struct e1_statistics)
|
||||
#define SERIAL_GETE3STAT _IOR ('x', 3, struct e3_statistics)
|
||||
#define SERIAL_CLRSTAT _IO ('x', 3)
|
||||
|
||||
/*
|
||||
* Query/set the synchronization mode and baud rate.
|
||||
* If baud==0 then the external clock is used.
|
||||
*/
|
||||
#define SERIAL_GETBAUD _IOR ('x', 4, long)
|
||||
#define SERIAL_SETBAUD _IOW ('x', 4, long)
|
||||
|
||||
/*
|
||||
* Query/set the internal loopback mode,
|
||||
* useful for debugging purposes.
|
||||
*/
|
||||
#define SERIAL_GETLOOP _IOR ('x', 5, int)
|
||||
#define SERIAL_SETLOOP _IOW ('x', 5, int)
|
||||
|
||||
/*
|
||||
* Query/set the DPLL mode, commonly used with NRZI
|
||||
* for channels lacking synchro signals.
|
||||
*/
|
||||
#define SERIAL_GETDPLL _IOR ('x', 6, int)
|
||||
#define SERIAL_SETDPLL _IOW ('x', 6, int)
|
||||
|
||||
/*
|
||||
* Query/set the NRZI encoding (default is NRZ).
|
||||
*/
|
||||
#define SERIAL_GETNRZI _IOR ('x', 7, int)
|
||||
#define SERIAL_SETNRZI _IOW ('x', 7, int)
|
||||
|
||||
/*
|
||||
* Invert receive and transmit clock.
|
||||
*/
|
||||
#define SERIAL_GETINVCLK _IOR ('x', 8, int)
|
||||
#define SERIAL_SETINVCLK _IOW ('x', 8, int)
|
||||
|
||||
/*
|
||||
* Query/set the E1/G703 synchronization mode.
|
||||
*/
|
||||
#define SERIAL_GETCLK _IOR ('x', 9, int)
|
||||
#define SERIAL_SETCLK _IOW ('x', 9, int)
|
||||
|
||||
#define E1CLK_INTERNAL 0
|
||||
#define E1CLK_RECEIVE 1
|
||||
#define E1CLK_RECEIVE_CHAN0 2
|
||||
#define E1CLK_RECEIVE_CHAN1 3
|
||||
#define E1CLK_RECEIVE_CHAN2 4
|
||||
#define E1CLK_RECEIVE_CHAN3 5
|
||||
|
||||
/*
|
||||
* Query/set the E1 timeslot mask.
|
||||
*/
|
||||
#define SERIAL_GETTIMESLOTS _IOR ('x', 10, long)
|
||||
#define SERIAL_SETTIMESLOTS _IOW ('x', 10, long)
|
||||
|
||||
/*
|
||||
* Query/set the E1 subchannel timeslot mask.
|
||||
*/
|
||||
#define SERIAL_GETSUBCHAN _IOR ('x', 11, long)
|
||||
#define SERIAL_SETSUBCHAN _IOW ('x', 11, long)
|
||||
|
||||
/*
|
||||
* Query/set the high input sensitivity mode (E1).
|
||||
*/
|
||||
#define SERIAL_GETHIGAIN _IOR ('x', 12, int)
|
||||
#define SERIAL_SETHIGAIN _IOW ('x', 12, int)
|
||||
|
||||
/*
|
||||
* Query the input signal level in santibells.
|
||||
*/
|
||||
#define SERIAL_GETLEVEL _IOR ('x', 13, int)
|
||||
|
||||
/*
|
||||
* Get the channel name.
|
||||
*/
|
||||
#define SERIAL_GETNAME _IOR ('x', 14, char [32])
|
||||
|
||||
/*
|
||||
* Get version string.
|
||||
*/
|
||||
#define SERIAL_GETVERSIONSTRING _IOR ('x', 15, char [256])
|
||||
|
||||
/*
|
||||
* Query/set master channel.
|
||||
*/
|
||||
#define SERIAL_GETMASTER _IOR ('x', 16, char [16])
|
||||
#define SERIAL_SETMASTER _IOW ('x', 16, char [16])
|
||||
|
||||
/*
|
||||
* Query/set keepalive.
|
||||
*/
|
||||
#define SERIAL_GETKEEPALIVE _IOR ('x', 17, int)
|
||||
#define SERIAL_SETKEEPALIVE _IOW ('x', 17, int)
|
||||
|
||||
/*
|
||||
* Query/set E1 configuration.
|
||||
*/
|
||||
#define SERIAL_GETCFG _IOR ('x', 18, char)
|
||||
#define SERIAL_SETCFG _IOW ('x', 18, char)
|
||||
|
||||
/*
|
||||
* Query/set debug.
|
||||
*/
|
||||
#define SERIAL_GETDEBUG _IOR ('x', 19, int)
|
||||
#define SERIAL_SETDEBUG _IOW ('x', 19, int)
|
||||
|
||||
/*
|
||||
* Query/set phony mode (E1).
|
||||
*/
|
||||
#define SERIAL_GETPHONY _IOR ('x', 20, int)
|
||||
#define SERIAL_SETPHONY _IOW ('x', 20, int)
|
||||
|
||||
/*
|
||||
* Query/set timeslot 16 usage mode (E1).
|
||||
*/
|
||||
#define SERIAL_GETUSE16 _IOR ('x', 21, int)
|
||||
#define SERIAL_SETUSE16 _IOW ('x', 21, int)
|
||||
|
||||
/*
|
||||
* Query/set crc4 mode (E1).
|
||||
*/
|
||||
#define SERIAL_GETCRC4 _IOR ('x', 22, int)
|
||||
#define SERIAL_SETCRC4 _IOW ('x', 22, int)
|
||||
|
||||
/*
|
||||
* Query/set the timeout to recover after transmit interrupt loss.
|
||||
* If timo==0 recover will be disabled.
|
||||
*/
|
||||
#define SERIAL_GETTIMO _IOR ('x', 23, long)
|
||||
#define SERIAL_SETTIMO _IOW ('x', 23, long)
|
||||
|
||||
/*
|
||||
* Query/set port type for old models of Sigma
|
||||
* -1 Fixed or cable select
|
||||
* 0 RS-232
|
||||
* 1 V35
|
||||
* 2 RS-449
|
||||
* 3 E1 (only for Windows 2000)
|
||||
* 4 G.703 (only for Windows 2000)
|
||||
* 5 DATA (only for Windows 2000)
|
||||
* 6 E3 (only for Windows 2000)
|
||||
* 7 T3 (only for Windows 2000)
|
||||
* 8 STS1 (only for Windows 2000)
|
||||
*/
|
||||
#define SERIAL_GETPORT _IOR ('x', 25, int)
|
||||
#define SERIAL_SETPORT _IOW ('x', 25, int)
|
||||
|
||||
/*
|
||||
* Add the virtual channel DLCI (Frame Relay).
|
||||
*/
|
||||
#define SERIAL_ADDDLCI _IOW ('x', 26, int)
|
||||
|
||||
/*
|
||||
* Invert receive clock.
|
||||
*/
|
||||
#define SERIAL_GETINVRCLK _IOR ('x', 27, int)
|
||||
#define SERIAL_SETINVRCLK _IOW ('x', 27, int)
|
||||
|
||||
/*
|
||||
* Invert transmit clock.
|
||||
*/
|
||||
#define SERIAL_GETINVTCLK _IOR ('x', 28, int)
|
||||
#define SERIAL_SETINVTCLK _IOW ('x', 28, int)
|
||||
|
||||
/*
|
||||
* Unframed E1 mode.
|
||||
*/
|
||||
#define SERIAL_GETUNFRAM _IOR ('x', 29, int)
|
||||
#define SERIAL_SETUNFRAM _IOW ('x', 29, int)
|
||||
|
||||
/*
|
||||
* E1 monitoring mode.
|
||||
*/
|
||||
#define SERIAL_GETMONITOR _IOR ('x', 30, int)
|
||||
#define SERIAL_SETMONITOR _IOW ('x', 30, int)
|
||||
|
||||
/*
|
||||
* Interrupt number.
|
||||
*/
|
||||
#define SERIAL_GETIRQ _IOR ('x', 31, int)
|
||||
|
||||
/*
|
||||
* Reset.
|
||||
*/
|
||||
#define SERIAL_RESET _IO ('x', 32)
|
||||
|
||||
/*
|
||||
* Hard reset.
|
||||
*/
|
||||
#define SERIAL_HARDRESET _IO ('x', 33)
|
||||
|
||||
/*
|
||||
* Query cable type.
|
||||
*/
|
||||
#define SERIAL_GETCABLE _IOR ('x', 34, int)
|
||||
|
||||
/*
|
||||
* Assignment of HDLC ports to E1 channels.
|
||||
*/
|
||||
#define SERIAL_GETDIR _IOR ('x', 35, int)
|
||||
#define SERIAL_SETDIR _IOW ('x', 35, int)
|
||||
|
||||
struct dxc_table { /* cross-connector parameters */
|
||||
unsigned char ts [32]; /* timeslot number */
|
||||
unsigned char link [32]; /* E1 link number */
|
||||
};
|
||||
|
||||
/*
|
||||
* DXC cross-connector settings for E1 channels.
|
||||
*/
|
||||
#define SERIAL_GETDXC _IOR ('x', 36, struct dxc_table)
|
||||
#define SERIAL_SETDXC _IOW ('x', 36, struct dxc_table)
|
||||
|
||||
/*
|
||||
* Scrambler for G.703.
|
||||
*/
|
||||
#define SERIAL_GETSCRAMBLER _IOR ('x', 37, int)
|
||||
#define SERIAL_SETSCRAMBLER _IOW ('x', 37, int)
|
||||
|
||||
/*
|
||||
* Length of cable for T3 and STS-1.
|
||||
*/
|
||||
#define SERIAL_GETCABLEN _IOR ('x', 38, int)
|
||||
#define SERIAL_SETCABLEN _IOW ('x', 38, int)
|
||||
|
||||
/*
|
||||
* Remote loopback for E3, T3 and STS-1.
|
||||
*/
|
||||
#define SERIAL_GETRLOOP _IOR ('x', 39, int)
|
||||
#define SERIAL_SETRLOOP _IOW ('x', 39, int)
|
||||
|
||||
/*
|
||||
* Dynamic binder interface.
|
||||
*/
|
||||
#ifdef __KERNEL__
|
||||
typedef struct _chan_t chan_t;
|
||||
typedef struct _proto_t proto_t;
|
||||
|
||||
void binder_register_protocol (proto_t *p);
|
||||
void binder_unregister_protocol (proto_t *p);
|
||||
|
||||
int binder_register_channel (chan_t *h, char *prefix, int minor);
|
||||
void binder_unregister_channel (chan_t *h);
|
||||
|
||||
/*
|
||||
* Hardware channel driver structure.
|
||||
*/
|
||||
struct sk_buff;
|
||||
|
||||
struct _chan_t {
|
||||
char name [16];
|
||||
int mtu; /* max packet size */
|
||||
int fifosz; /* total hardware i/o buffer size */
|
||||
int port; /* hardware base i/o port */
|
||||
int irq; /* hardware interrupt line */
|
||||
int minor; /* minor number 0..127, assigned by binder */
|
||||
int debug; /* debug level, 0..2 */
|
||||
int running; /* running, 0..1 */
|
||||
struct _proto_t *proto; /* protocol interface data */
|
||||
void *sw; /* protocol private data */
|
||||
void *hw; /* hardware layer private data */
|
||||
|
||||
/* Interface to protocol */
|
||||
int (*up) (chan_t *h);
|
||||
void (*down) (chan_t *h);
|
||||
int (*transmit) (chan_t *h, struct sk_buff *skb);
|
||||
void (*set_dtr) (chan_t *h, int val);
|
||||
void (*set_rts) (chan_t *h, int val);
|
||||
int (*query_dtr) (chan_t *h);
|
||||
int (*query_rts) (chan_t *h);
|
||||
int (*query_dsr) (chan_t *h);
|
||||
int (*query_cts) (chan_t *h);
|
||||
int (*query_dcd) (chan_t *h);
|
||||
|
||||
/* Interface to async protocol */
|
||||
void (*set_async_param) (chan_t *h, int baud, int bits, int parity,
|
||||
int stop2, int ignpar, int rtscts,
|
||||
int ixon, int ixany, int symstart, int symstop);
|
||||
void (*send_break) (chan_t *h, int msec);
|
||||
void (*send_xon) (chan_t *h);
|
||||
void (*send_xoff) (chan_t *h);
|
||||
void (*start_transmitter) (chan_t *h);
|
||||
void (*stop_transmitter) (chan_t *h);
|
||||
void (*flush_transmit_buffer) (chan_t *h);
|
||||
|
||||
/* Control interface */
|
||||
int (*control) (chan_t *h, unsigned int cmd, unsigned long arg);
|
||||
};
|
||||
|
||||
/*
|
||||
* Protocol driver structure.
|
||||
*/
|
||||
struct _proto_t {
|
||||
char *name;
|
||||
struct _proto_t *next;
|
||||
|
||||
/* Interface to channel */
|
||||
void (*receive) (chan_t *h, struct sk_buff *skb);
|
||||
void (*receive_error) (chan_t *h, int errcode);
|
||||
void (*transmit) (chan_t *h);
|
||||
void (*modem_event) (chan_t *h);
|
||||
|
||||
/* Interface to binder */
|
||||
int (*open) (chan_t *h);
|
||||
void (*close) (chan_t *h);
|
||||
int (*read) (chan_t *h, unsigned short flg, char *buf, int len);
|
||||
int (*write) (chan_t *h, unsigned short flg, const char *buf, int len);
|
||||
int (*select) (chan_t *h, int type, void *st, struct file *filp);
|
||||
struct fasync_struct *fasync;
|
||||
|
||||
/* Control interface */
|
||||
int (*attach) (chan_t *h);
|
||||
int (*detach) (chan_t *h);
|
||||
int (*control) (chan_t *h, unsigned int cmd, unsigned long arg);
|
||||
};
|
||||
#endif /* KERNEL */
|
39
sys/modules/cx/Makefile
Normal file
39
sys/modules/cx/Makefile
Normal file
@ -0,0 +1,39 @@
|
||||
# Cronyx Id: sys.modules.cx.Makefile,v 1.1.2.2 2003/01/21 15:15:49 rik Exp $
|
||||
# $FreeBSD$
|
||||
|
||||
.PATH: ${.CURDIR}/../../dev/cx
|
||||
KMOD= if_cx
|
||||
SRCS= if_cx.c cxddk.c csigma.c opt_netgraph.h opt_ng_cronyx.h bpf.h \
|
||||
sppp.h device_if.h bus_if.h isa_if.h
|
||||
NOMAN=
|
||||
|
||||
NBPF?= 0
|
||||
PROTOS?= -DINET
|
||||
NG_CRONYX?= 0
|
||||
NETGRAPH= ${NG_CRONYX}
|
||||
|
||||
|
||||
CFLAGS+= ${PROTOS}
|
||||
CLEANFILES+= opt_ng_cronyx.h opt_netgraph.h bpf.h cxddk.c csigma.c sppp.h
|
||||
|
||||
opt_netgraph.h:
|
||||
echo "#define NETGRAPH $(NETGRAPH)" > opt_netgraph.h
|
||||
|
||||
opt_ng_cronyx.h:
|
||||
.if ${NG_CRONYX} != 0
|
||||
echo "#define NETGRAPH_CRONYX 1" > opt_ng_cronyx.h
|
||||
.else
|
||||
echo "" > opt_ng_cronyx.h
|
||||
.endif
|
||||
|
||||
sppp.h:
|
||||
.if ${NG_CRONYX} == 0
|
||||
echo "#define NSPPP 1" > sppp.h
|
||||
.else
|
||||
echo "#define NSPPP 0" > sppp.h
|
||||
.endif
|
||||
|
||||
bpf.h:
|
||||
echo "#define NBPF ${NBPF}" > bpf.h
|
||||
|
||||
.include <bsd.kmod.mk>
|
Loading…
Reference in New Issue
Block a user