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synced 2024-12-23 11:18:54 +00:00
Fix bug in the ioapic emulation for level-triggered interrupts,
where a pin assertion while a source was masked would result in the interrupt being lost, with the symptom being a console hang. The condition is now recorded, and the interrupt generated when the source is unmasked. Discovered by: OpenBSD 5.4 MP Reviewed by: neel MFC after: 3 days
This commit is contained in:
Peter Grehan
parent
29ef2f0e31
commit
8f1db961f9
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=257092
@ -37,6 +37,7 @@ __FBSDID("$FreeBSD$");
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#include <string.h>
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#include <assert.h>
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#include <stdbool.h>
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#include <pthread.h>
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#include <vmmapi.h>
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@ -46,34 +47,40 @@ __FBSDID("$FreeBSD$");
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#include <stdio.h>
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static uint64_t ioapic_clearpend, ioapic_togglepend, ioapic_setpend;
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#define IOAPIC_PADDR 0xFEC00000
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#define IOREGSEL 0x00
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#define IOWIN 0x10
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#define REDIR_ENTRIES 16
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#define INTR_ASSERTED(ioapic, pin) ((ioapic)->pinstate[(pin)] == true)
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#define INTR_ASSERTED(ioapic, pin) \
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((ioapic)->rtbl[(pin)].pinstate == true)
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struct ioapic {
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int inited;
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uint32_t id;
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uint64_t redtbl[REDIR_ENTRIES];
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bool pinstate[REDIR_ENTRIES];
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struct {
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uint64_t reg;
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bool pinstate;
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bool pending;
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} rtbl[REDIR_ENTRIES];
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uintptr_t paddr; /* gpa where the ioapic is mapped */
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uint32_t ioregsel;
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struct memory_region *region;
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pthread_mutex_t mtx;
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};
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static struct ioapic ioapics[1]; /* only a single ioapic for now */
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static int ioapic_region_read(struct ioapic *ioapic, uintptr_t paddr,
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int size, uint64_t *data);
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static int ioapic_region_write(struct ioapic *ioapic, uintptr_t paddr,
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int size, uint64_t data);
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static int ioapic_region_read(struct vmctx *vm, struct ioapic *ioapic,
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uintptr_t paddr, int size, uint64_t *data);
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static int ioapic_region_write(struct vmctx *vm, struct ioapic *ioapic,
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uintptr_t paddr, int size, uint64_t data);
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static int ioapic_region_handler(struct vmctx *vm, int vcpu, int dir,
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uintptr_t paddr, int size, uint64_t *val,
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void *arg1, long arg2);
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uintptr_t paddr, int size, uint64_t *val, void *arg1, long arg2);
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static void
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ioapic_set_pinstate(struct vmctx *ctx, int pin, bool newstate)
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@ -84,14 +91,11 @@ ioapic_set_pinstate(struct vmctx *ctx, int pin, bool newstate)
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ioapic = &ioapics[0]; /* assume a single ioapic */
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if (pin < 0 || pin >= REDIR_ENTRIES)
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return;
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/* Nothing to do if interrupt pin has not changed state */
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if (ioapic->pinstate[pin] == newstate)
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if (ioapic->rtbl[pin].pinstate == newstate)
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return;
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ioapic->pinstate[pin] = newstate; /* record it */
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ioapic->rtbl[pin].pinstate = newstate; /* record it */
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/* Nothing to do if interrupt pin is deasserted */
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if (!INTR_ASSERTED(ioapic, pin))
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@ -105,8 +109,8 @@ ioapic_set_pinstate(struct vmctx *ctx, int pin, bool newstate)
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* Level-triggered sources will work so long as there is
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* no sharing.
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*/
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low = ioapic->redtbl[pin];
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high = ioapic->redtbl[pin] >> 32;
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low = ioapic->rtbl[pin].reg;
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high = ioapic->rtbl[pin].reg >> 32;
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if ((low & IOART_INTMASK) == IOART_INTMCLR &&
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(low & IOART_DESTMOD) == IOART_DESTPHY &&
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(low & IOART_DELMOD) == IOART_DELFIXED) {
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@ -124,19 +128,47 @@ ioapic_set_pinstate(struct vmctx *ctx, int pin, bool newstate)
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vcpu++;
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}
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}
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} else if ((low & IOART_INTMASK) != IOART_INTMCLR &&
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low & IOART_TRGRLVL) {
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/*
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* For level-triggered interrupts that have been
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* masked, set the pending bit so that an interrupt
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* will be generated on unmask and if the level is
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* still asserted
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*/
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ioapic_setpend++;
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ioapic->rtbl[pin].pending = true;
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}
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}
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static void
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ioapic_set_pinstate_locked(struct vmctx *ctx, int pin, bool newstate)
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{
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struct ioapic *ioapic;
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if (pin < 0 || pin >= REDIR_ENTRIES)
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return;
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ioapic = &ioapics[0];
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pthread_mutex_lock(&ioapic->mtx);
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ioapic_set_pinstate(ctx, pin, newstate);
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pthread_mutex_unlock(&ioapic->mtx);
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}
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/*
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* External entry points require locking
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*/
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void
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ioapic_deassert_pin(struct vmctx *ctx, int pin)
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{
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ioapic_set_pinstate(ctx, pin, false);
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ioapic_set_pinstate_locked(ctx, pin, false);
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}
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void
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ioapic_assert_pin(struct vmctx *ctx, int pin)
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{
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ioapic_set_pinstate(ctx, pin, true);
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ioapic_set_pinstate_locked(ctx, pin, true);
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}
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void
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@ -154,9 +186,11 @@ ioapic_init(int which)
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bzero(ioapic, sizeof(struct ioapic));
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pthread_mutex_init(&ioapic->mtx, NULL);
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/* Initialize all redirection entries to mask all interrupts */
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for (i = 0; i < REDIR_ENTRIES; i++)
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ioapic->redtbl[i] = 0x0001000000010000UL;
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ioapic->rtbl[i].reg = 0x0001000000010000UL;
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ioapic->paddr = IOAPIC_PADDR;
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@ -206,14 +240,15 @@ ioapic_read(struct ioapic *ioapic, uint32_t addr)
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else
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rshift = 0;
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return (ioapic->redtbl[pin] >> rshift);
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return (ioapic->rtbl[pin].reg >> rshift);
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}
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return (0);
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}
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static void
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ioapic_write(struct ioapic *ioapic, uint32_t addr, uint32_t data)
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ioapic_write(struct vmctx *vm, struct ioapic *ioapic, uint32_t addr,
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uint32_t data)
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{
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int regnum, pin, lshift;
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@ -241,14 +276,31 @@ ioapic_write(struct ioapic *ioapic, uint32_t addr, uint32_t data)
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else
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lshift = 0;
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ioapic->redtbl[pin] &= ~((uint64_t)0xffffffff << lshift);
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ioapic->redtbl[pin] |= ((uint64_t)data << lshift);
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ioapic->rtbl[pin].reg &= ~((uint64_t)0xffffffff << lshift);
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ioapic->rtbl[pin].reg |= ((uint64_t)data << lshift);
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if (ioapic->rtbl[pin].pending &&
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((ioapic->rtbl[pin].reg & IOART_INTMASK) ==
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IOART_INTMCLR)) {
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ioapic->rtbl[pin].pending = false;
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ioapic_clearpend++;
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/*
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* Inject the deferred level-triggered int if it is
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* still asserted. Simulate by toggling the pin
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* off and then on.
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*/
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if (ioapic->rtbl[pin].pinstate == true) {
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ioapic_togglepend++;
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ioapic_set_pinstate(vm, pin, false);
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ioapic_set_pinstate(vm, pin, true);
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}
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}
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}
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}
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static int
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ioapic_region_read(struct ioapic *ioapic, uintptr_t paddr, int size,
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uint64_t *data)
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ioapic_region_read(struct vmctx *vm, struct ioapic *ioapic, uintptr_t paddr,
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int size, uint64_t *data)
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{
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int offset;
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@ -276,8 +328,8 @@ ioapic_region_read(struct ioapic *ioapic, uintptr_t paddr, int size,
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}
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static int
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ioapic_region_write(struct ioapic *ioapic, uintptr_t paddr, int size,
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uint64_t data)
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ioapic_region_write(struct vmctx *vm, struct ioapic *ioapic, uintptr_t paddr,
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int size, uint64_t data)
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{
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int offset;
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@ -298,14 +350,14 @@ ioapic_region_write(struct ioapic *ioapic, uintptr_t paddr, int size,
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if (offset == IOREGSEL)
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ioapic->ioregsel = data;
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else
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ioapic_write(ioapic, ioapic->ioregsel, data);
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ioapic_write(vm, ioapic, ioapic->ioregsel, data);
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return (0);
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}
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static int
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ioapic_region_handler(struct vmctx *vm, int vcpu, int dir, uintptr_t paddr,
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int size, uint64_t *val, void *arg1, long arg2)
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int size, uint64_t *val, void *arg1, long arg2)
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{
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struct ioapic *ioapic;
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int which;
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@ -315,10 +367,12 @@ ioapic_region_handler(struct vmctx *vm, int vcpu, int dir, uintptr_t paddr,
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assert(ioapic == &ioapics[which]);
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pthread_mutex_lock(&ioapic->mtx);
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if (dir == MEM_F_READ)
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ioapic_region_read(ioapic, paddr, size, val);
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ioapic_region_read(vm, ioapic, paddr, size, val);
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else
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ioapic_region_write(ioapic, paddr, size, *val);
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ioapic_region_write(vm, ioapic, paddr, size, *val);
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pthread_mutex_unlock(&ioapic->mtx);
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return (0);
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}
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