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Add definitions for Intel Speed Shift

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These definitions will be used by a driver to implement Hardware
P-States (autonomous control of HWP, via Intel Speed Shift technology).

Reviewed by:	kib
Approved by:	emaste (mentor)
Differential Revision:	https://reviews.freebsd.org/D18050
This commit is contained in:
Ben Widawsky 2018-11-21 00:21:58 +00:00
parent d062baf95a
commit 91890b73ad
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=340716
1 changed files with 32 additions and 0 deletions
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32
sys/x86/include/specialreg.h
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@ -189,6 +189,12 @@
#define CPUTPM1_SENSOR 0x00000001
#define CPUTPM1_TURBO 0x00000002
#define CPUTPM1_ARAT 0x00000004
#define CPUTPM1_HWP 0x00000080
#define CPUTPM1_HWP_NOTIFICATION 0x00000100
#define CPUTPM1_HWP_ACTIVITY_WINDOW 0x00000200
#define CPUTPM1_HWP_PERF_PREF 0x00000400
#define CPUTPM1_HWP_PKG 0x00000800
#define CPUTPM1_HWP_FLEXIBLE 0x00020000
#define CPUTPM2_EFFREQ 0x00000001
/* Intel Processor Trace CPUID. */
@ -541,7 +547,14 @@
#define MSR_DRAM_ENERGY_STATUS 0x619
#define MSR_PP0_ENERGY_STATUS 0x639
#define MSR_PP1_ENERGY_STATUS 0x641
#define MSR_PPERF 0x64e
#define MSR_TSC_DEADLINE 0x6e0 /* Writes are not serializing */
#define MSR_IA32_PM_ENABLE 0x770
#define MSR_IA32_HWP_CAPABILITIES 0x771
#define MSR_IA32_HWP_REQUEST_PKG 0x772
#define MSR_IA32_HWP_INTERRUPT 0x773
#define MSR_IA32_HWP_REQUEST 0x774
#define MSR_IA32_HWP_STATUS 0x777
/*
* VMX MSRs
@ -718,6 +731,25 @@
/* MSR IA32_FLUSH_CMD */
#define IA32_FLUSH_CMD_L1D 0x00000001
/* MSR IA32_HWP_CAPABILITIES */
#define IA32_HWP_CAPABILITIES_HIGHEST_PERFORMANCE(x) (((x) >> 0) & 0xff)
#define IA32_HWP_CAPABILITIES_GUARANTEED_PERFORMANCE(x) (((x) >> 8) & 0xff)
#define IA32_HWP_CAPABILITIES_EFFICIENT_PERFORMANCE(x) (((x) >> 16) & 0xff)
#define IA32_HWP_CAPABILITIES_LOWEST_PERFORMANCE(x) (((x) >> 24) & 0xff)
/* MSR IA32_HWP_REQUEST */
#define IA32_HWP_REQUEST_MINIMUM_VALID (1ULL << 63)
#define IA32_HWP_REQUEST_MAXIMUM_VALID (1ULL << 62)
#define IA32_HWP_REQUEST_DESIRED_VALID (1ULL << 61)
#define IA32_HWP_REQUEST_EPP_VALID (1ULL << 60)
#define IA32_HWP_REQUEST_ACTIVITY_WINDOW_VALID (1ULL << 59)
#define IA32_HWP_REQUEST_PACKAGE_CONTROL (1ULL << 42)
#define IA32_HWP_ACTIVITY_WINDOW (0x3ffULL << 32)
#define IA32_HWP_REQUEST_ENERGY_PERFORMANCE_PREFERENCE (0xffULL << 24)
#define IA32_HWP_DESIRED_PERFORMANCE (0xffULL << 16)
#define IA32_HWP_REQUEST_MAXIMUM_PERFORMANCE (0xffULL << 8)
#define IA32_HWP_MINIMUM_PERFORMANCE (0xffULL << 0)
/*
* PAT modes.
*/