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Add support for saving and restoring kernel floating point state. The state
will be saved if we context switch as a result of an interrupt which occured while using the floating point registers in the kernel (which actually can't happen right now). This allows fp disabled traps in the kernel, which normally shouldn't happen, so make sure the trapping code is what we expect it is.
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=113024
@ -1219,6 +1219,36 @@ ENTRY(tl1_insn_exceptn_trap)
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mov %g2, %o0
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END(tl1_insn_exceptn_trap)
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.macro tl1_fp_disabled
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ba,a %xcc, tl1_fp_disabled_1
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nop
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.align 32
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.endm
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ENTRY(tl1_fp_disabled_1)
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rdpr %tpc, %g1
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set fpu_fault_begin, %g2
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sub %g1, %g2, %g1
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cmp %g1, fpu_fault_size
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bgeu,a,pn %xcc, 1f
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nop
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wr %g0, FPRS_FEF, %fprs
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wr %g0, ASI_BLK_S, %asi
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ldda [PCB_REG + PCB_KFP + (0 * 64)] %asi, %f0
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ldda [PCB_REG + PCB_KFP + (1 * 64)] %asi, %f16
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ldda [PCB_REG + PCB_KFP + (2 * 64)] %asi, %f32
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ldda [PCB_REG + PCB_KFP + (3 * 64)] %asi, %f48
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membar #Sync
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retry
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1: tl1_split
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clr %o1
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set trap, %o2
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ba %xcc, tl1_trap
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mov T_FP_DISABLED | T_KERNEL, %o0
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END(tl1_fp_disabled_1)
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.macro tl1_data_excptn
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wrpr %g0, PSTATE_ALT, %pstate
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b,a %xcc, tl1_data_excptn_trap
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@ -1913,7 +1943,7 @@ tl1_priv_opcode:
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tl1_gen T_PRIVILEGED_OPCODE ! 0x211
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tl1_reserved 14 ! 0x212-0x21f
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tl1_fp_disabled:
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tl1_gen T_FP_DISABLED ! 0x220
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tl1_fp_disabled ! 0x220
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tl1_fp_ieee:
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tl1_gen T_FP_EXCEPTION_IEEE_754 ! 0x221
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tl1_fp_other:
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@ -53,6 +53,20 @@ ENTRY(cpu_switch)
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save %sp, -CCFSZ, %sp
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mov %i1, %i0
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/*
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* If the current thread was using floating point in the kernel, save
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* its context. The userland floating point context has already been
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* saved.
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*/
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rd %fprs, %l2
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andcc %l2, FPRS_FEF, %g0
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bz,a,pt %xcc, 1f
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nop
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call savefpctx
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add PCB_REG, PCB_KFP, %o0
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ba,a %xcc, 2f
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nop
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/*
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* If the current thread was using floating point in userland, save
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* its context.
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