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Force pmap to write-back the pte cacheline after each pte modification,

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even if the pte is supposed to be cached in write through mode (might be a
skyeye bug, I'll have to check).
This commit is contained in:
Olivier Houchard 2005-11-21 19:10:44 +00:00
parent f9126cfb8f
commit 94d8cf9916
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=152654
1 changed files with 5 additions and 0 deletions
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5
sys/arm/include/pmap.h
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@ -335,8 +335,13 @@ extern int pmap_needs_pte_sync;
#define PMAP_NEEDS_PTE_SYNC 1
#define PMAP_INCLUDE_PTE_SYNC
#elif (ARM_MMU_SA1 == 0)
#if defined(CPU_ARM9) && !defined(ARM9_CACHE_WRITE_THROUGH)
#define PMAP_NEEDS_PTE_SYNC 1
#define PMAP_INCLUDE_PTE_SYNC
#else
#define PMAP_NEEDS_PTE_SYNC 0
#endif
#endif
/*
* These macros return various bits based on kernel/user and protection.