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Now that the register definitions are in -HEAD, enable this.
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978c5ce568
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=249517
@ -269,14 +269,14 @@ ar5416BTCoexEnable(struct ath_hal *ah)
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}
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OS_REG_WRITE(ah, AR_BT_COEX_MODE2, ahp->ah_btCoexMode2);
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#if 0
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/* Added Select GPIO5~8 instaed SPI */
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if (AR_SREV_9271(ah)) {
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val = OS_REG_READ(ah, AR9271_CLOCK_CONTROL);
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val &= 0xFFFFFEFF;
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OS_REG_WRITE(ah, AR9271_CLOCK_CONTROL, val);
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}
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#endif
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/* Added Select GPIO5~8 instaed SPI */
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if (AR_SREV_9271(ah)) {
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uint32_t val;
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val = OS_REG_READ(ah, AR9271_CLOCK_CONTROL);
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val &= 0xFFFFFEFF;
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OS_REG_WRITE(ah, AR9271_CLOCK_CONTROL, val);
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}
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if (ahp->ah_btCoexFlag & HAL_BT_COEX_FLAG_LOW_ACK_PWR)
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OS_REG_WRITE(ah, AR_TPC, HAL_BT_COEX_LOW_ACK_POWER);
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