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Add driver for PCIe root complex on Annapurna Alpine platform.
The driver subclasses pci-host-generic and additionally performs configuration of vendor-specific PCIe registers. Obtained from: Semihalf Submitted by: Michal Stanek <mst@semihalf.com> Sponsored by: Annapurna Labs Reviewed by: wma Differential Revision: https://reviews.freebsd.org/D7571
This commit is contained in:
Wojciech Macek
parent
65afaac0c3
commit
988d9b3505
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=306021
158
sys/arm/annapurna/alpine/alpine_pci.c
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158
sys/arm/annapurna/alpine/alpine_pci.c
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@ -0,0 +1,158 @@
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/*-
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* Copyright (c) 2015,2016 Annapurna Labs Ltd. and affiliates
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* All rights reserved.
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*
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* Developed by Semihalf.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Alpine PCI/PCI-Express controller driver.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <sys/intr.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/pci/pci_host_generic.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include "pcib_if.h"
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#include "contrib/alpine-hal/al_hal_unit_adapter_regs.h"
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#include "contrib/alpine-hal/al_hal_pcie.h"
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#include "contrib/alpine-hal/al_hal_pcie_axi_reg.h"
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#define ANNAPURNA_VENDOR_ID 0x1c36
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/* Forward prototypes */
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static int al_pcib_probe(device_t);
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static int al_pcib_attach(device_t);
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static void al_pcib_fixup(device_t);
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static struct ofw_compat_data compat_data[] = {
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{"annapurna-labs,al-internal-pcie", true},
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{"annapurna-labs,alpine-internal-pcie", true},
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{NULL, false}
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};
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/*
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* Bus interface definitions.
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*/
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static device_method_t al_pcib_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, al_pcib_probe),
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DEVMETHOD(device_attach, al_pcib_attach),
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DEVMETHOD_END
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};
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DEFINE_CLASS_1(pcib, al_pcib_driver, al_pcib_methods,
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sizeof(struct generic_pcie_softc), generic_pcie_driver);
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static devclass_t anpa_pcib_devclass;
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DRIVER_MODULE(alpine_pcib, simplebus, al_pcib_driver, anpa_pcib_devclass, 0, 0);
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DRIVER_MODULE(alpine_pcib, ofwbus, al_pcib_driver, anpa_pcib_devclass, 0, 0);
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static int
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al_pcib_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
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return (ENXIO);
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device_set_desc(dev,
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"Annapurna-Labs Integrated Internal PCI-E Controller");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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al_pcib_attach(device_t dev)
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{
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int rv;
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rv = pci_host_generic_attach(dev);
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/* Annapurna quirk: configure vendor-specific registers */
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if (rv == 0)
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al_pcib_fixup(dev);
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return (rv);
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}
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static void
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al_pcib_fixup(device_t dev)
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{
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uint32_t val;
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uint16_t vid;
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uint8_t hdrtype;
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int bus, slot, func, maxfunc;
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/* Fixup is only needed on bus 0 */
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bus = 0;
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for (slot = 0; slot <= PCI_SLOTMAX; slot++) {
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maxfunc = 0;
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for (func = 0; func <= maxfunc; func++) {
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hdrtype = PCIB_READ_CONFIG(dev, bus, slot, func,
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PCIR_HDRTYPE, 1);
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if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE)
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continue;
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if (func == 0 && (hdrtype & PCIM_MFDEV) != 0)
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maxfunc = PCI_FUNCMAX;
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vid = PCIB_READ_CONFIG(dev, bus, slot, func,
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PCIR_VENDOR, 2);
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if (vid == ANNAPURNA_VENDOR_ID) {
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val = PCIB_READ_CONFIG(dev, bus, slot, func,
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AL_PCI_AXI_CFG_AND_CTR_0, 4);
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val |= PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_PF_VEC_PH_VEC_OVRD_FROM_AXUSER_MASK;
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PCIB_WRITE_CONFIG(dev, bus, slot, func,
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AL_PCI_AXI_CFG_AND_CTR_0, val, 4);
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val = PCIB_READ_CONFIG(dev, bus, slot, func,
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AL_PCI_APP_CONTROL, 4);
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val &= ~0xffff;
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val |= PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_4_PF_VEC_MEM_ADDR54_63_SEL_TGTID_MASK;
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PCIB_WRITE_CONFIG(dev, bus, slot, func,
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AL_PCI_APP_CONTROL, val, 4);
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}
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}
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}
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}
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@ -60,6 +60,11 @@ device ses # Enclosure Services (SES and SAF-TE)
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# Serial ports
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device uart
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# PCI/PCIE
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device pci
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device pci_host_generic
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device al_pci # Annapurna Alpine PCI-E
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# Ethernet
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device ether
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device mii
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@ -105,6 +105,7 @@ device cpufreq
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# Bus drivers
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device pci
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device al_pci # Annapurna Alpine PCI-E
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options PCI_HP # PCI-Express native HotPlug
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options PCI_IOV # PCI SR-IOV support
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@ -175,6 +175,7 @@
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device_type = "pci";
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <0xfbc00000 0x100000>;
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interrupt-parent = <&MPIC>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <0x3000 0 0 1 &MPIC 0 32 4>, // USB adapter
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@ -13,6 +13,7 @@ cloudabi32_vdso_blob.o optional compat_cloudabi32 \
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#
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arm/annapurna/alpine/alpine_ccu.c optional al_ccu fdt
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arm/annapurna/alpine/alpine_nb_service.c optional al_nb_service fdt
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arm/annapurna/alpine/alpine_pci.c optional al_pci fdt
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arm/arm/autoconf.c standard
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arm/arm/bcopy_page.S standard
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arm/arm/bcopyinout.S standard
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@ -40,6 +40,7 @@ arm/allwinner/clk/aw_usbclk.c optional aw_ccu
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arm/allwinner/if_awg.c optional awg
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arm/annapurna/alpine/alpine_ccu.c optional al_ccu fdt
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arm/annapurna/alpine/alpine_nb_service.c optional al_nb_service fdt
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arm/annapurna/alpine/alpine_pci.c optional al_pci fdt
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arm/arm/generic_timer.c standard
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arm/arm/gic.c standard
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arm/arm/gic_fdt.c optional fdt
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