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https://git.FreeBSD.org/src.git
synced 2024-12-24 11:29:10 +00:00
Retire arm_remap_nocache() and the data and constants associated with it.
The only remaining user was the code that allocates bounce pages for armv4 busdma. It's not clear why bounce pages would need uncached memory, but if that ever changes, kmem_alloc_attr() would be the way to get it.
This commit is contained in:
parent
6489412064
commit
99af02e3b6
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=257201
@ -57,7 +57,7 @@ vm_offset_t
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initarm_lastaddr(void)
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{
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return (DEVMAP_BOOTSTRAP_MAP_START - ARM_NOCACHE_KVA_SIZE);
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return (DEVMAP_BOOTSTRAP_MAP_START);
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}
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void
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@ -122,7 +122,6 @@ struct bus_dma_tag {
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struct bounce_page {
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vm_offset_t vaddr; /* kva of bounce buffer */
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vm_offset_t vaddr_nocache; /* kva of bounce buffer uncached */
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bus_addr_t busaddr; /* Physical address */
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vm_offset_t datavaddr; /* kva of client data */
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bus_addr_t dataaddr; /* client physical address */
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@ -1196,39 +1195,23 @@ _bus_dmamap_sync_bp(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
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STAILQ_FOREACH(bpage, &map->bpages, links) {
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if (op & BUS_DMASYNC_PREWRITE) {
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if (bpage->datavaddr != 0)
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bcopy((void *)bpage->datavaddr,
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(void *)(bpage->vaddr_nocache != 0 ?
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bpage->vaddr_nocache :
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bpage->vaddr),
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bpage->datacount);
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bcopy((void *)bpage->datavaddr,
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(void *)bpage->vaddr, bpage->datacount);
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else
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physcopyout(bpage->dataaddr,
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(void *)(bpage->vaddr_nocache != 0 ?
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bpage->vaddr_nocache :
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bpage->vaddr),
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bpage->datacount);
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if (bpage->vaddr_nocache == 0) {
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cpu_dcache_wb_range(bpage->vaddr,
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bpage->datacount);
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cpu_l2cache_wb_range(bpage->vaddr,
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bpage->datacount);
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}
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(void *)bpage->vaddr,bpage->datacount);
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cpu_dcache_wb_range(bpage->vaddr, bpage->datacount);
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cpu_l2cache_wb_range(bpage->vaddr, bpage->datacount);
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dmat->bounce_zone->total_bounced++;
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}
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if (op & BUS_DMASYNC_POSTREAD) {
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if (bpage->vaddr_nocache == 0) {
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cpu_dcache_inv_range(bpage->vaddr,
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bpage->datacount);
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cpu_l2cache_inv_range(bpage->vaddr,
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bpage->datacount);
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}
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cpu_dcache_inv_range(bpage->vaddr, bpage->datacount);
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cpu_l2cache_inv_range(bpage->vaddr, bpage->datacount);
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if (bpage->datavaddr != 0)
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bcopy((void *)(bpage->vaddr_nocache != 0 ?
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bpage->vaddr_nocache : bpage->vaddr),
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bcopy((void *)bpage->vaddr,
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(void *)bpage->datavaddr, bpage->datacount);
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else
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physcopyin((void *)(bpage->vaddr_nocache != 0 ?
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bpage->vaddr_nocache : bpage->vaddr),
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physcopyin((void *)bpage->vaddr,
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bpage->dataaddr, bpage->datacount);
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dmat->bounce_zone->total_bounced++;
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}
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@ -1385,8 +1368,6 @@ alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages)
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break;
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}
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bpage->busaddr = pmap_kextract(bpage->vaddr);
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bpage->vaddr_nocache = (vm_offset_t)arm_remap_nocache(
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(void *)bpage->vaddr, PAGE_SIZE);
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mtx_lock(&bounce_lock);
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STAILQ_INSERT_TAIL(&bz->bounce_page_list, bpage, links);
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total_bpages++;
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@ -1951,7 +1951,6 @@ pmap_bootstrap(vm_offset_t firstaddr, struct pv_addr *l1pt)
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virtual_avail = round_page(virtual_avail);
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virtual_end = vm_max_kernel_address;
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kernel_vm_end = pmap_curmaxkvaddr;
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arm_nocache_startaddr = vm_max_kernel_address;
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mtx_init(&cmtx, "TMP mappings mtx", NULL, MTX_DEF);
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pmap_set_pcb_pagedir(kernel_pmap, thread0.td_pcb);
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@ -2423,7 +2423,6 @@ pmap_bootstrap(vm_offset_t firstaddr, struct pv_addr *l1pt)
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virtual_avail = round_page(virtual_avail);
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virtual_end = vm_max_kernel_address;
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kernel_vm_end = pmap_curmaxkvaddr;
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arm_nocache_startaddr = vm_max_kernel_address;
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mtx_init(&cmtx, "TMP mappings mtx", NULL, MTX_DEF);
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#ifdef ARM_USE_SMALL_ALLOC
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@ -482,80 +482,6 @@ cpu_exit(struct thread *td)
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{
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}
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#define BITS_PER_INT (8 * sizeof(int))
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vm_offset_t arm_nocache_startaddr;
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static int arm_nocache_allocated[ARM_NOCACHE_KVA_SIZE / (PAGE_SIZE *
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BITS_PER_INT)];
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/*
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* Functions to map and unmap memory non-cached into KVA the kernel won't try
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* to allocate. The goal is to provide uncached memory to busdma, to honor
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* BUS_DMA_COHERENT.
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* We can allocate at most ARM_NOCACHE_KVA_SIZE bytes.
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* The allocator is rather dummy, each page is represented by a bit in
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* a bitfield, 0 meaning the page is not allocated, 1 meaning it is.
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* As soon as it finds enough contiguous pages to satisfy the request,
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* it returns the address.
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*/
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void *
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arm_remap_nocache(void *addr, vm_size_t size)
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{
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int i, j;
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size = round_page(size);
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for (i = 0; i < ARM_NOCACHE_KVA_SIZE / PAGE_SIZE; i++) {
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if (!(arm_nocache_allocated[i / BITS_PER_INT] & (1 << (i %
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BITS_PER_INT)))) {
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for (j = i; j < i + (size / (PAGE_SIZE)); j++)
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if (arm_nocache_allocated[j / BITS_PER_INT] &
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(1 << (j % BITS_PER_INT)))
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break;
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if (j == i + (size / (PAGE_SIZE)))
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break;
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}
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}
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if (i < ARM_NOCACHE_KVA_SIZE / PAGE_SIZE) {
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vm_offset_t tomap = arm_nocache_startaddr + i * PAGE_SIZE;
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void *ret = (void *)tomap;
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vm_paddr_t physaddr = vtophys((vm_offset_t)addr);
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vm_offset_t vaddr = (vm_offset_t) addr;
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vaddr = vaddr & ~PAGE_MASK;
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for (; tomap < (vm_offset_t)ret + size; tomap += PAGE_SIZE,
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vaddr += PAGE_SIZE, physaddr += PAGE_SIZE, i++) {
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cpu_idcache_wbinv_range(vaddr, PAGE_SIZE);
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#ifdef ARM_L2_PIPT
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cpu_l2cache_wbinv_range(physaddr, PAGE_SIZE);
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#else
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cpu_l2cache_wbinv_range(vaddr, PAGE_SIZE);
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#endif
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pmap_kenter_nocache(tomap, physaddr);
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cpu_tlb_flushID_SE(vaddr);
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arm_nocache_allocated[i / BITS_PER_INT] |= 1 << (i %
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BITS_PER_INT);
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}
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return (ret);
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}
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return (NULL);
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}
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void
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arm_unmap_nocache(void *addr, vm_size_t size)
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{
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vm_offset_t raddr = (vm_offset_t)addr;
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int i;
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size = round_page(size);
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i = (raddr - arm_nocache_startaddr) / (PAGE_SIZE);
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for (; size > 0; size -= PAGE_SIZE, i++) {
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arm_nocache_allocated[i / BITS_PER_INT] &= ~(1 << (i %
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BITS_PER_INT));
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pmap_kremove(raddr);
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raddr += PAGE_SIZE;
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}
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}
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#ifdef ARM_USE_SMALL_ALLOC
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static TAILQ_HEAD(,arm_small_page) pages_normal =
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@ -65,7 +65,7 @@ vm_offset_t
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initarm_lastaddr(void)
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{
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return (DEVMAP_BOOTSTRAP_MAP_START - ARM_NOCACHE_KVA_SIZE);
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return (DEVMAP_BOOTSTRAP_MAP_START);
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}
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void
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@ -735,11 +735,6 @@ struct arm_small_page {
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#endif
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#define ARM_NOCACHE_KVA_SIZE 0x1000000
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extern vm_offset_t arm_nocache_startaddr;
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void *arm_remap_nocache(void *, vm_size_t);
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void arm_unmap_nocache(void *, vm_size_t);
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extern vm_paddr_t dump_avail[];
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#endif /* _KERNEL */
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@ -66,7 +66,7 @@ initarm_lastaddr(void)
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while (1);
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/* Platform-specific initialisation */
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return (fdt_immr_va - ARM_NOCACHE_KVA_SIZE);
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return (fdt_immr_va);
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}
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void
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@ -206,7 +206,7 @@ initarm_lastaddr(void)
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while (1);
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/* Platform-specific initialisation */
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return (fdt_immr_va - ARM_NOCACHE_KVA_SIZE);
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return (fdt_immr_va);
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}
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void
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@ -49,7 +49,7 @@ vm_offset_t
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initarm_lastaddr(void)
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{
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return (DEVMAP_BOOTSTRAP_MAP_START - ARM_NOCACHE_KVA_SIZE);
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return (DEVMAP_BOOTSTRAP_MAP_START);
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}
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void
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@ -109,7 +109,7 @@ initarm_lastaddr(void)
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if (fdt_immr_addr(TEGRA2_BASE) != 0) /* FIXME ???? */
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while (1);
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return (fdt_immr_va - ARM_NOCACHE_KVA_SIZE);
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return (fdt_immr_va);
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}
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void
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@ -63,7 +63,7 @@ initarm_lastaddr(void)
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{
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ti_cpu_reset = NULL;
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return (DEVMAP_BOOTSTRAP_MAP_START - ARM_NOCACHE_KVA_SIZE);
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return (DEVMAP_BOOTSTRAP_MAP_START);
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}
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void
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@ -60,7 +60,7 @@ vm_offset_t
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initarm_lastaddr(void)
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{
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return (DEVMAP_BOOTSTRAP_MAP_START - ARM_NOCACHE_KVA_SIZE);
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return (DEVMAP_BOOTSTRAP_MAP_START);
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}
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void
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initarm_lastaddr(void)
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{
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return (ZYNQ7_PSIO_VBASE - ARM_NOCACHE_KVA_SIZE);
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return (ZYNQ7_PSIO_VBASE);
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}
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void
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