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Eliminate the AT91XXXX_BASE for each SoC. AT91_BASE is the right way

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to spell this since we only have one AT91_BASE for all Atmel arm9 SoCs.
This commit is contained in:
Warner Losh 2012-07-10 02:14:50 +00:00
parent 378d88b3dc
commit 9a5f8be0a7
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=238330
8 changed files with 11 additions and 15 deletions
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7
sys/arm/at91/at91_reset.S
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@ -1,13 +1,14 @@
#include <machine/asm.h>
#include <arm/at91/at91_rstreg.h>
#include <arm/at91/at91reg.h>
#include <arm/at91/at91sam9g20reg.h>
__FBSDID("$FreeBSD$");
#define SDRAM_TR (AT91SAM9G20_BASE + \
#define SDRAM_TR (AT91_BASE + \
AT91SAM9G20_SDRAMC_BASE + AT91SAM9G20_SDRAMC_TR)
#define SDRAM_LPR (AT91SAM9G20_BASE + \
#define SDRAM_LPR (AT91_BASE + \
AT91SAM9G20_SDRAMC_BASE + AT91SAM9G20_SDRAMC_LPR)
#define RSTC_RCR (AT91SAM9G20_BASE + \
#define RSTC_RCR (AT91_BASE + \
AT91SAM9G20_RSTC_BASE + RST_CR)
/*

4
sys/arm/at91/at91rm9200.c
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@ -164,8 +164,8 @@ at91_add_child(device_t dev, int prio, const char *name, int unit,
bus_set_resource(kid, SYS_RES_IRQ, 1, irq1, 1);
if (irq2 != 0)
bus_set_resource(kid, SYS_RES_IRQ, 2, irq2, 1);
if (addr != 0 && addr < AT91RM92_BASE)
addr += AT91RM92_BASE;
if (addr != 0 && addr < AT91_BASE)
addr += AT91_BASE;
if (addr != 0)
bus_set_resource(kid, SYS_RES_MEMORY, 0, addr, size);
}

1
sys/arm/at91/at91rm92reg.h
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@ -70,7 +70,6 @@
* 0xf0000000 - 0xfffffffff : Peripherals
*/
#define AT91RM92_BASE 0xd0000000
/* Usart */
#define AT91RM92_USART_SIZE 0x4000

4
sys/arm/at91/at91sam9g20.c
View File

@ -157,8 +157,8 @@ at91_add_child(device_t dev, int prio, const char *name, int unit,
bus_set_resource(kid, SYS_RES_IRQ, 1, irq1, 1);
if (irq2 != 0)
bus_set_resource(kid, SYS_RES_IRQ, 2, irq2, 1);
if (addr != 0 && addr < AT91SAM9G20_BASE)
addr += AT91SAM9G20_BASE;
if (addr != 0 && addr < AT91_BASE)
addr += AT91_BASE;
if (addr != 0)
bus_set_resource(kid, SYS_RES_MEMORY, 0, addr, size);
}

2
sys/arm/at91/at91sam9g20reg.h
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@ -73,8 +73,6 @@
#define AT91_CHIPSELECT_7 0x80000000
#define AT91SAM9G20_BASE 0xd0000000
#define AT91SAM9G20_EMAC_BASE 0xffc4000
#define AT91SAM9G20_EMAC_SIZE 0x4000

4
sys/arm/at91/at91sam9x25.c
View File

@ -160,8 +160,8 @@ at91_add_child(device_t dev, int prio, const char *name, int unit,
bus_set_resource(kid, SYS_RES_IRQ, 1, irq1, 1);
if (irq2 != 0)
bus_set_resource(kid, SYS_RES_IRQ, 2, irq2, 1);
if (addr != 0 && addr < AT91SAM9X25_BASE)
addr += AT91SAM9X25_BASE;
if (addr != 0 && addr < AT91_BASE)
addr += AT91_BASE;
if (addr != 0)
bus_set_resource(kid, SYS_RES_MEMORY, 0, addr, size);
}

2
sys/arm/at91/at91sam9x25reg.h
View File

@ -73,8 +73,6 @@
#define AT91_CHIPSELECT_4 0x50000000
#define AT91_CHIPSELECT_5 0x60000000
#define AT91SAM9X25_BASE 0xd0000000
#define AT91SAM9X25_EMAC_SIZE 0x4000
#define AT91SAM9X25_EMAC0_BASE 0x802c000
#define AT91SAM9X25_EMAC0_SIZE AT91SAM9X25_EMAC_SIZE

2
sys/arm/at91/uart_cpu_at91rm9200usart.c
View File

@ -73,7 +73,7 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
* XXX: Not pretty, but will work because we map the needed addresses
* early.
*/
di->bas.bsh = AT91RM92_BASE + AT91RM92_DBGU_BASE;
di->bas.bsh = AT91_BASE + AT91RM92_DBGU_BASE;
di->baudrate = 115200;
di->bas.regshft = 0;
di->bas.rclk = 0;