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arm: dts: Remove some old DTS

Browse Source 
RPI is using the firmware provided DTS since 12.0
Pandaboard works with the Linux DTS
RK* Exynos* and Meson*/Odroid* don't even work with current
source code, if someone wants to make them work again they
better use the Linux DTS.
This commit is contained in:
Emmanuel Vadot 2019-04-10 19:18:05 +00:00
parent 8021928623
commit 9dfa2a5468
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=346095
21 changed files with 0 additions and 3170 deletions
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505
sys/dts/arm/bcm2835.dtsi
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@ -1,505 +0,0 @@
/*
* Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@bluezbox.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/ {
#address-cells = <1>;
#size-cells = <1>;
cpus {
cpu@0 {
compatible = "arm,1176jzf-s";
};
};
SOC: axi {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x20000000 0x01000000>;
ranges = <0 0x20000000 0x01000000>;
intc: interrupt-controller {
compatible = "broadcom,bcm2835-armctrl-ic",
"broadcom,bcm2708-armctrl-ic";
reg = <0xB200 0x200>;
interrupt-controller;
#interrupt-cells = <1>;
/* Bank 0
* 0: ARM_TIMER
* 1: ARM_MAILBOX
* 2: ARM_DOORBELL_0
* 3: ARM_DOORBELL_1
* 4: VPU0_HALTED
* 5: VPU1_HALTED
* 6: ILLEGAL_TYPE0
* 7: ILLEGAL_TYPE1
*/
/* Bank 1
* 0: TIMER0 16: DMA0
* 1: TIMER1 17: DMA1
* 2: TIMER2 18: VC_DMA2
* 3: TIMER3 19: VC_DMA3
* 4: CODEC0 20: DMA4
* 5: CODEC1 21: DMA5
* 6: CODEC2 22: DMA6
* 7: VC_JPEG 23: DMA7
* 8: ISP 24: DMA8
* 9: VC_USB 25: DMA9
* 10: VC_3D 26: DMA10
* 11: TRANSPOSER 27: DMA11
* 12: MULTICORESYNC0 28: DMA12
* 13: MULTICORESYNC1 29: AUX
* 14: MULTICORESYNC2 30: ARM
* 15: MULTICORESYNC3 31: VPUDMA
*/
/* Bank 2
* 0: HOSTPORT 16: SMI
* 1: VIDEOSCALER 17: GPIO0
* 2: CCP2TX 18: GPIO1
* 3: SDC 19: GPIO2
* 4: DSI0 20: GPIO3
* 5: AVE 21: VC_I2C
* 6: CAM0 22: VC_SPI
* 7: CAM1 23: VC_I2SPCM
* 8: HDMI0 24: VC_SDIO
* 9: HDMI1 25: VC_UART
* 10: PIXELVALVE1 26: SLIMBUS
* 11: I2CSPISLV 27: VEC
* 12: DSI1 28: CPG
* 13: PWA0 29: RNG
* 14: PWA1 30: VC_ARASANSDIO
* 15: CPR 31: AVSPMON
*/
};
timer {
compatible = "broadcom,bcm2835-system-timer",
"broadcom,bcm2708-system-timer";
reg = <0x3000 0x1000>;
interrupts = <8 9 10 11>;
interrupt-parent = <&intc>;
clock-frequency = <1000000>;
};
armtimer {
/* Not AMBA compatible */
compatible = "broadcom,bcm2835-sp804", "arm,sp804";
reg = <0xB400 0x24>;
interrupts = <0>;
interrupt-parent = <&intc>;
};
watchdog0 {
compatible = "broadcom,bcm2835-wdt",
"broadcom,bcm2708-wdt";
reg = <0x10001c 0x0c>; /* 0x1c, 0x20, 0x24 */
};
gpio: gpio {
compatible = "broadcom,bcm2835-gpio",
"broadcom,bcm2708-gpio";
reg = <0x200000 0xb0>;
/* Unusual arrangement of interrupts
* (determined by testing)
* 17: Bank 0 (GPIOs 0-31)
* 19: Bank 1 (GPIOs 32-53)
* 18: Bank 2
* 20: All banks (GPIOs 0-53)
*/
interrupts = <57 59 58 60>;
interrupt-parent = <&intc>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pins_reserved>;
/* Pins that can short 3.3V to GND in output mode: 46-47
* Pins used by VideoCore: 48-53
*/
broadcom,read-only = <46>, <47>, <48>, <49>, <50>,
<51>, <52>, <53>;
/* BSC0 */
pins_bsc0_a: bsc0_a {
broadcom,pins = <0>, <1>;
};
pins_bsc0_b: bsc0_b {
broadcom,pins = <28>, <29>;
};
pins_bsc0_c: bsc0_c {
broadcom,pins = <44>, <45>;
};
/* BSC1 */
pins_bsc1_a: bsc1_a {
broadcom,pins = <2>, <3>;
};
pins_bsc1_b: bsc1_b {
broadcom,pins = <44>, <45>;
};
/* GPCLK0 */
pins_gpclk0_a: gpclk0_a {
broadcom,pins = <4>;
};
pins_gpclk0_b: gpclk0_b {
broadcom,pins = <20>;
};
pins_gpclk0_c: gpclk0_c {
broadcom,pins = <32>;
};
pins_gpclk0_d: gpclk0_d {
broadcom,pins = <34>;
};
/* GPCLK1 */
pins_gpclk1_a: gpclk1_a {
broadcom,pins = <5>;
};
pins_gpclk1_b: gpclk1_b {
broadcom,pins = <21>;
};
pins_gpclk1_c: gpclk1_c {
broadcom,pins = <42>;
};
pins_gpclk1_d: gpclk1_d {
broadcom,pins = <44>;
};
/* GPCLK2 */
pins_gpclk2_a: gpclk2_a {
broadcom,pins = <6>;
};
pins_gpclk2_b: gpclk2_b {
broadcom,pins = <43>;
};
/* SPI0 */
pins_spi0_a: spi0_a {
broadcom,pins = <7>, <8>, <9>, <10>, <11>;
};
pins_spi0_b: spi0_b {
broadcom,pins = <35>, <36>, <37>, <38>, <39>;
};
/* PWM */
pins_pwm0_a: pwm0_a {
broadcom,pins = <12>;
};
pins_pwm0_b: pwm0_b {
broadcom,pins = <18>;
};
pins_pwm0_c: pwm0_c {
broadcom,pins = <40>;
};
pins_pwm1_a: pwm1_a {
broadcom,pins = <13>;
};
pins_pwm1_b: pwm1_b {
broadcom,pins = <19>;
};
pins_pwm1_c: pwm1_c {
broadcom,pins = <41>;
};
pins_pwm1_d: pwm1_d {
broadcom,pins = <45>;
};
/* UART0 */
pins_uart0_a: uart0_a {
broadcom,pins = <14>, <15>;
};
pins_uart0_b: uart0_b {
broadcom,pins = <32>, <33>;
};
pins_uart0_c: uart0_c {
broadcom,pins = <36>, <37>;
};
pins_uart0_fc_a: uart0_fc_a {
broadcom,pins = <16>, <17>;
};
pins_uart0_fc_b: uart0_fc_b {
broadcom,pins = <30>, <31>;
};
pins_uart0_fc_c: uart0_fc_c {
broadcom,pins = <39>, <38>;
};
/* PCM */
pins_pcm_a: pcm_a {
broadcom,pins = <18>, <19>, <20>, <21>;
};
pins_pcm_b: pcm_b {
broadcom,pins = <28>, <29>, <30>, <31>;
};
/* Secondary Address Bus */
pins_sm_addr_a: sm_addr_a {
broadcom,pins = <5>, <4>, <3>, <2>, <1>, <0>;
};
pins_sm_addr_b: sm_addr_b {
broadcom,pins = <33>, <32>, <31>, <30>, <29>,
<28>;
};
pins_sm_ctl_a: sm_ctl_a {
broadcom,pins = <6>, <7>;
};
pins_sm_ctl_b: sm_ctl_b {
broadcom,pins = <34>, <35>;
};
pins_sm_data_8bit_a: sm_data_8bit_a {
broadcom,pins = <8>, <9>, <10>, <11>, <12>,
<13>, <14>, <15>;
};
pins_sm_data_8bit_b: sm_data_8bit_b {
broadcom,pins = <36>, <37>, <38>, <39>, <40>,
<41>, <42>, <43>;
};
pins_sm_data_16bit: sm_data_16bit {
broadcom,pins = <16>, <17>, <18>, <19>, <20>,
<21>, <22>, <23>;
};
pins_sm_data_18bit: sm_data_18bit {
broadcom,pins = <24>, <25>;
};
/* BSCSL */
pins_bscsl: bscsl {
broadcom,pins = <18>, <19>;
};
/* SPISL */
pins_spisl: spisl {
broadcom,pins = <18>, <19>, <20>, <21>;
};
/* SPI1 */
pins_spi1: spi1 {
broadcom,pins = <16>, <17>, <18>, <19>, <20>,
<21>;
};
/* UART1 */
pins_uart1_a: uart1_a {
broadcom,pins = <14>, <15>;
};
pins_uart1_b: uart1_b {
broadcom,pins = <32>, <33>;
};
pins_uart1_c: uart1_c {
broadcom,pins = <40>, <41>;
};
pins_uart1_fc_a: uart1_fc_a {
broadcom,pins = <16>, <17>;
};
pins_uart1_fc_b: uart1_fc_b {
broadcom,pins = <30>, <31>;
};
pins_uart1_fc_c: uart1_fc_c {
broadcom,pins = <43>, <42>;
};
/* SPI2 */
pins_spi2: spi2 {
broadcom,pins = <40>, <41>, <42>, <43>, <44>,
<45>;
};
/* ARM JTAG */
pins_arm_jtag_trst: arm_jtag_trst {
broadcom,pins = <22>;
};
pins_arm_jtag_a: arm_jtag_a {
broadcom,pins = <4>, <5>, <6>, <12>, <13>;
};
pins_arm_jtag_b: arm_jtag_b {
broadcom,pins = <23>, <24>, <25>, <26>, <27>;
};
/* Reserved */
pins_reserved: reserved {
broadcom,pins = <48>, <49>, <50>, <51>, <52>,
<53>;
};
};
rng {
compatible = "broadcom,bcm2835-rng",
"broadcom,bcm2708-rng";
reg = <0x104000 0x20>;
interrupts = <69>;
interrupt-parent = <&intc>;
};
bsc0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "broadcom,bcm2835-bsc",
"broadcom,bcm2708-bsc";
reg = <0x205000 0x20>;
interrupts = <61>;
interrupt-parent = <&intc>;
};
bsc1 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "broadcom,bcm2835-bsc",
"broadcom,bcm2708-bsc";
reg = <0x804000 0x20>;
interrupts = <61>;
interrupt-parent = <&intc>;
};
spi0 {
compatible = "broadcom,bcm2835-spi",
"broadcom,bcm2708-spi";
reg = <0x204000 0x20>;
interrupts = <62>;
interrupt-parent = <&intc>;
};
dma: dma {
compatible = "broadcom,bcm2835-dma",
"broadcom,bcm2708-dma";
reg = <0x7000 0x1000>, <0xE05000 0x1000>;
interrupts = <24 25 26 27 28 29 30 31 32 33 34 35 36>;
interrupt-parent = <&intc>;
broadcom,channels = <0x7f35>;
};
vc_mbox: mbox {
compatible = "broadcom,bcm2835-mbox",
"broadcom,bcm2708-mbox";
reg = <0xB880 0x40>;
interrupts = <1>;
interrupt-parent = <&intc>;
/* Channels
* 0: Power
* 1: Frame buffer
* 2: Virtual UART
* 3: VCHIQ
* 4: LEDs
* 5: Buttons
* 6: Touch screen
*/
};
sdhci {
compatible = "broadcom,bcm2835-sdhci",
"broadcom,bcm2708-sdhci";
reg = <0x300000 0x100>;
interrupts = <70>;
interrupt-parent = <&intc>;
clock-frequency = <50000000>; /* Set by VideoCore */
};
uart0: uart0 {
compatible = "broadcom,bcm2835-uart",
"broadcom,bcm2708-uart", "arm,pl011",
"arm,primecell";
reg = <0x201000 0x1000>;
interrupts = <65>;
interrupt-parent = <&intc>;
clock-frequency = <3000000>; /* Set by VideoCore */
reg-shift = <2>;
};
vchiq: vchiq {
compatible = "broadcom,bcm2835-vchiq";
reg = <0xB800 0x50>;
interrupts = <2>;
interrupt-parent = <&intc>;
cache-line-size = <32>;
};
usb {
compatible = "broadcom,bcm2835-usb",
"broadcom,bcm2708-usb",
"synopsys,designware-hs-otg2";
reg = <0x980000 0x20000>;
interrupts = <17>;
interrupt-parent = <&intc>;
#address-cells = <1>;
#size-cells = <0>;
};
};
};

508
sys/dts/arm/bcm2836.dtsi
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@ -1,508 +0,0 @@
/*
* Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@bluezbox.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/ {
#address-cells = <1>;
#size-cells = <1>;
timer {
compatible = "arm,armv7-timer";
clock-frequency = <19200000>;
interrupts = <0 1 3 2>;
interrupt-parent = <&local_intc>;
};
SOC: axi {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x3f000000 0x01000000>;
ranges = <0 0x3f000000 0x01000000>,
<0x40000000 0x40000000 0x00001000>;
local_intc: local_intc {
compatible = "brcm,bcm2836-l1-intc";
reg = <0x40000000 0x100>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&local_intc>;
};
intc: interrupt-controller {
compatible = "broadcom,bcm2835-armctrl-ic",
"broadcom,bcm2708-armctrl-ic";
reg = <0xB200 0x200>;
interrupt-parent = <&local_intc>;
interrupts = <8>;
interrupt-controller;
#interrupt-cells = <1>;
/* Bank 0
* 0: ARM_TIMER
* 1: ARM_MAILBOX
* 2: ARM_DOORBELL_0
* 3: ARM_DOORBELL_1
* 4: VPU0_HALTED
* 5: VPU1_HALTED
* 6: ILLEGAL_TYPE0
* 7: ILLEGAL_TYPE1
*/
/* Bank 1
* 0: TIMER0 16: DMA0
* 1: TIMER1 17: DMA1
* 2: TIMER2 18: VC_DMA2
* 3: TIMER3 19: VC_DMA3
* 4: CODEC0 20: DMA4
* 5: CODEC1 21: DMA5
* 6: CODEC2 22: DMA6
* 7: VC_JPEG 23: DMA7
* 8: ISP 24: DMA8
* 9: VC_USB 25: DMA9
* 10: VC_3D 26: DMA10
* 11: TRANSPOSER 27: DMA11
* 12: MULTICORESYNC0 28: DMA12
* 13: MULTICORESYNC1 29: AUX
* 14: MULTICORESYNC2 30: ARM
* 15: MULTICORESYNC3 31: VPUDMA
*/
/* Bank 2
* 0: HOSTPORT 16: SMI
* 1: VIDEOSCALER 17: GPIO0
* 2: CCP2TX 18: GPIO1
* 3: SDC 19: GPIO2
* 4: DSI0 20: GPIO3
* 5: AVE 21: VC_I2C
* 6: CAM0 22: VC_SPI
* 7: CAM1 23: VC_I2SPCM
* 8: HDMI0 24: VC_SDIO
* 9: HDMI1 25: VC_UART
* 10: PIXELVALVE1 26: SLIMBUS
* 11: I2CSPISLV 27: VEC
* 12: DSI1 28: CPG
* 13: PWA0 29: RNG
* 14: PWA1 30: VC_ARASANSDIO
* 15: CPR 31: AVSPMON
*/
};
watchdog0 {
compatible = "broadcom,bcm2835-wdt",
"broadcom,bcm2708-wdt";
reg = <0x10001c 0x0c>; /* 0x1c, 0x20, 0x24 */
};
gpio: gpio {
compatible = "broadcom,bcm2835-gpio",
"broadcom,bcm2708-gpio";
reg = <0x200000 0xb0>;
/* Unusual arrangement of interrupts
* (determined by testing)
* 17: Bank 0 (GPIOs 0-31)
* 19: Bank 1 (GPIOs 32-53)
* 18: Bank 2
* 20: All banks (GPIOs 0-53)
*/
interrupts = <57 59 58 60>;
interrupt-parent = <&intc>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pins_reserved>;
/* Pins that can short 3.3V to GND in output mode: 46
* Pins used by VideoCore: 48-53
*/
broadcom,read-only = <46>, <48>, <49>, <50>,
<51>, <52>, <53>;
/* BSC0 */
pins_bsc0_a: bsc0_a {
broadcom,pins = <0>, <1>;
};
pins_bsc0_b: bsc0_b {
broadcom,pins = <28>, <29>;
};
pins_bsc0_c: bsc0_c {
broadcom,pins = <44>, <45>;
};
/* BSC1 */
pins_bsc1_a: bsc1_a {
broadcom,pins = <2>, <3>;
};
pins_bsc1_b: bsc1_b {
broadcom,pins = <44>, <45>;
};
/* GPCLK0 */
pins_gpclk0_a: gpclk0_a {
broadcom,pins = <4>;
};
pins_gpclk0_b: gpclk0_b {
broadcom,pins = <20>;
};
pins_gpclk0_c: gpclk0_c {
broadcom,pins = <32>;
};
pins_gpclk0_d: gpclk0_d {
broadcom,pins = <34>;
};
/* GPCLK1 */
pins_gpclk1_a: gpclk1_a {
broadcom,pins = <5>;
};
pins_gpclk1_b: gpclk1_b {
broadcom,pins = <21>;
};
pins_gpclk1_c: gpclk1_c {
broadcom,pins = <42>;
};
pins_gpclk1_d: gpclk1_d {
broadcom,pins = <44>;
};
/* GPCLK2 */
pins_gpclk2_a: gpclk2_a {
broadcom,pins = <6>;
};
pins_gpclk2_b: gpclk2_b {
broadcom,pins = <43>;
};
/* SPI0 */
pins_spi0_a: spi0_a {
broadcom,pins = <7>, <8>, <9>, <10>, <11>;
};
pins_spi0_b: spi0_b {
broadcom,pins = <35>, <36>, <37>, <38>, <39>;
};
/* PWM */
pins_pwm0_a: pwm0_a {
broadcom,pins = <12>;
};
pins_pwm0_b: pwm0_b {
broadcom,pins = <18>;
};
pins_pwm0_c: pwm0_c {
broadcom,pins = <40>;
};
pins_pwm1_a: pwm1_a {
broadcom,pins = <13>;
};
pins_pwm1_b: pwm1_b {
broadcom,pins = <19>;
};
pins_pwm1_c: pwm1_c {
broadcom,pins = <41>;
};
pins_pwm1_d: pwm1_d {
broadcom,pins = <45>;
};
/* UART0 */
pins_uart0_a: uart0_a {
broadcom,pins = <14>, <15>;
};
pins_uart0_b: uart0_b {
broadcom,pins = <32>, <33>;
};
pins_uart0_c: uart0_c {
broadcom,pins = <36>, <37>;
};
pins_uart0_fc_a: uart0_fc_a {
broadcom,pins = <16>, <17>;
};
pins_uart0_fc_b: uart0_fc_b {
broadcom,pins = <30>, <31>;
};
pins_uart0_fc_c: uart0_fc_c {
broadcom,pins = <39>, <38>;
};
/* PCM */
pins_pcm_a: pcm_a {
broadcom,pins = <18>, <19>, <20>, <21>;
};
pins_pcm_b: pcm_b {
broadcom,pins = <28>, <29>, <30>, <31>;
};
/* Secondary Address Bus */
pins_sm_addr_a: sm_addr_a {
broadcom,pins = <5>, <4>, <3>, <2>, <1>, <0>;
};
pins_sm_addr_b: sm_addr_b {
broadcom,pins = <33>, <32>, <31>, <30>, <29>,
<28>;
};
pins_sm_ctl_a: sm_ctl_a {
broadcom,pins = <6>, <7>;
};
pins_sm_ctl_b: sm_ctl_b {
broadcom,pins = <34>, <35>;
};
pins_sm_data_8bit_a: sm_data_8bit_a {
broadcom,pins = <8>, <9>, <10>, <11>, <12>,
<13>, <14>, <15>;
};
pins_sm_data_8bit_b: sm_data_8bit_b {
broadcom,pins = <36>, <37>, <38>, <39>, <40>,
<41>, <42>, <43>;
};
pins_sm_data_16bit: sm_data_16bit {
broadcom,pins = <16>, <17>, <18>, <19>, <20>,
<21>, <22>, <23>;
};
pins_sm_data_18bit: sm_data_18bit {
broadcom,pins = <24>, <25>;
};
/* BSCSL */
pins_bscsl: bscsl {
broadcom,pins = <18>, <19>;
};
/* SPISL */
pins_spisl: spisl {
broadcom,pins = <18>, <19>, <20>, <21>;
};
/* SPI1 */
pins_spi1: spi1 {
broadcom,pins = <16>, <17>, <18>, <19>, <20>,
<21>;
};
/* UART1 */
pins_uart1_a: uart1_a {
broadcom,pins = <14>, <15>;
};
pins_uart1_b: uart1_b {
broadcom,pins = <32>, <33>;
};
pins_uart1_c: uart1_c {
broadcom,pins = <40>, <41>;
};
pins_uart1_fc_a: uart1_fc_a {
broadcom,pins = <16>, <17>;
};
pins_uart1_fc_b: uart1_fc_b {
broadcom,pins = <30>, <31>;
};
pins_uart1_fc_c: uart1_fc_c {
broadcom,pins = <43>, <42>;
};
/* SPI2 */
pins_spi2: spi2 {
broadcom,pins = <40>, <41>, <42>, <43>, <44>,
<45>;
};
/* ARM JTAG */
pins_arm_jtag_trst: arm_jtag_trst {
broadcom,pins = <22>;
};
pins_arm_jtag_a: arm_jtag_a {
broadcom,pins = <4>, <5>, <6>, <12>, <13>;
};
pins_arm_jtag_b: arm_jtag_b {
broadcom,pins = <23>, <24>, <25>, <26>, <27>;
};
/* Reserved */
pins_reserved: reserved {
broadcom,pins = <48>, <49>, <50>, <51>, <52>,
<53>;
};
};
cprman {
compatible = "broadcom,bcm2835-cprman";
reg = <0x101000 0x2000>;
};
rng {
compatible = "broadcom,bcm2835-rng",
"broadcom,bcm2708-rng";
reg = <0x104000 0x20>;
interrupts = <69>;
interrupt-parent = <&intc>;
};
bsc0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "broadcom,bcm2835-bsc",
"broadcom,bcm2708-bsc";
reg = <0x205000 0x20>;
interrupts = <61>;
interrupt-parent = <&intc>;
};
bsc1 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "broadcom,bcm2835-bsc",
"broadcom,bcm2708-bsc";
reg = <0x804000 0x20>;
interrupts = <61>;
interrupt-parent = <&intc>;
};
spi0 {
compatible = "broadcom,bcm2835-spi",
"broadcom,bcm2708-spi";
reg = <0x204000 0x20>;
interrupts = <62>;
interrupt-parent = <&intc>;
};
pwm0 {
compatible = "broadcom,bcm2835-pwm";
reg = <0x20c000 0x28>;
};
dma: dma {
compatible = "broadcom,bcm2835-dma",
"broadcom,bcm2708-dma";
reg = <0x7000 0x1000>, <0xE05000 0x1000>;
interrupts = <24 25 26 27 28 29 30 31 32 33 34 35 36>;
interrupt-parent = <&intc>;
broadcom,channels = <0x7f35>;
};
vc_mbox: mbox {
compatible = "broadcom,bcm2835-mbox",
"broadcom,bcm2708-mbox";
reg = <0xB880 0x40>;
interrupts = <1>;
interrupt-parent = <&intc>;
/* Channels
* 0: Power
* 1: Frame buffer
* 2: Virtual UART
* 3: VCHIQ
* 4: LEDs
* 5: Buttons
* 6: Touch screen
*/
};
sdhci {
compatible = "broadcom,bcm2835-sdhci",
"broadcom,bcm2708-sdhci";
reg = <0x300000 0x100>;
interrupts = <70>;
interrupt-parent = <&intc>;
clock-frequency = <250000000>; /* Set by VideoCore */
};
uart0: uart0 {
compatible = "broadcom,bcm2835-uart",
"broadcom,bcm2708-uart", "arm,pl011",
"arm,primecell";
reg = <0x201000 0x1000>;
interrupts = <65>;
interrupt-parent = <&intc>;
clock-frequency = <3000000>; /* Set by VideoCore */
reg-shift = <2>;
};
vchiq: vchiq {
compatible = "broadcom,bcm2835-vchiq";
reg = <0xB800 0x50>;
interrupts = <2>;
interrupt-parent = <&intc>;
cache-line-size = <32>;
};
usb {
compatible = "broadcom,bcm2835-usb",
"broadcom,bcm2708-usb",
"synopsys,designware-hs-otg2";
reg = <0x980000 0x20000>;
interrupts = <17>;
interrupt-parent = <&intc>;
#address-cells = <1>;
#size-cells = <0>;
};
};
};

337
sys/dts/arm/exynos5.dtsi
View File

@ -1,337 +0,0 @@
/*-
* Copyright (c) 2013-2014 Ruslan Bukin <br@bsdpad.com>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/ {
compatible = "samsung,exynos5";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&GIC>;
aliases {
soc = &SOC;
serial0 = &serial0;
serial1 = &serial1;
serial2 = &serial2;
serial3 = &serial3;
clk0 = &clk0;
dp0 = &dp0;
fimd0 = &fimd0;
};
SOC: Exynos5@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges;
bus-frequency = <0>;
pmu_system_controller: system-controller@10040000 {
reg = <0x10040000 0x5000>;
status = "disabled";
};
GIC: interrupt-controller@10481000 {
compatible = "arm,gic";
reg = < 0x10481000 0x1000 >, /* Distributor Registers */
< 0x10482000 0x2000 >; /* CPU Interface Registers */
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
};
combiner: interrupt-controller@10440000 {
compatible = "exynos,combiner";
reg = <0x10440000 0x1000>;
interrupts = < 32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63 >;
interrupt-parent = <&GIC>;
};
clk0: clk@10010000 {
compatible = "exynos,clk";
reg = < 0x10020000 0x20000 >;
};
mct {
compatible = "exynos,mct";
reg = < 0x101C0000 0x1000 >;
clock-frequency = <24000000>;
};
generic_timer {
compatible = "arm,armv7-timer";
clock-frequency = <24000000>;
interrupts = < 29 30 27 26 >;
interrupt-parent = <&GIC>;
};
pwm {
compatible = "samsung,s3c24x0-timer";
reg = <0x12DD0000 0x1000>;
interrupts = < 71 >;
interrupt-parent = <&GIC>;
clock-frequency = <24000000>;
};
pad0: pad@11400000 {
status = "disabled";
};
usbdrd_phy0: phy@12100000 {
compatible = "samsung,exynos5420-usbdrd-phy";
status = "disabled";
reg = <0x12100000 0x100>;
samsung,pmu-syscon = <&pmu_system_controller>;
};
usbdrd_phy1: phy@12500000 {
compatible = "samsung,exynos5420-usbdrd-phy";
status = "disabled";
reg = <0x12500000 0x100>;
samsung,pmu-syscon = <&pmu_system_controller>;
};
xhci@12000000 {
compatible = "samsung,exynos5250-dwusb3";
status = "disabled";
reg = <0x12000000 0x1000>,
<0x1200c100 0x1000>;
interrupts = < 104 >;
interrupt-parent = <&GIC>;
};
xhci@12400000 {
compatible = "samsung,exynos5250-dwusb3";
status = "disabled";
reg = <0x12400000 0x1000>,
<0x1240c100 0x1000>;
interrupts = < 105 >;
interrupt-parent = <&GIC>;
};
usb@12110000 {
compatible = "exynos,usb-ehci", "usb-ehci";
status = "disabled";
reg = <0x12110000 0x1000>, /* EHCI */
<0x12130000 0x1000>, /* EHCI host ctrl */
<0x10050230 0x10>; /* Sysreg */
interrupts = < 103 >;
interrupt-parent = <&GIC>;
};
usb@12120000 {
compatible = "exynos,usb-ohci", "usb-ohci";
status = "disabled";
reg = <0x12120000 0x10000>;
interrupts = < 103 >;
interrupt-parent = <&GIC>;
};
sdhci@12200000 {
compatible = "sdhci_generic";
status = "disabled";
reg = <0x12200000 0x1000>;
interrupts = <107>;
interrupt-parent = <&GIC>;
max-frequency = <24000000>; /* TODO: verify freq */
};
sdhci@12210000 {
compatible = "sdhci_generic";
status = "disabled";
reg = <0x12210000 0x1000>;
interrupts = <108>;
interrupt-parent = <&GIC>;
max-frequency = <24000000>;
};
sdhci@12220000 {
compatible = "sdhci_generic";
status = "disabled";
reg = <0x12220000 0x1000>;
interrupts = <109>;
interrupt-parent = <&GIC>;
max-frequency = <24000000>;
};
sdhci@12230000 {
compatible = "sdhci_generic";
status = "disabled";
reg = <0x12230000 0x1000>;
interrupts = <110>;
interrupt-parent = <&GIC>;
max-frequency = <24000000>;
};
serial0: serial@12C00000 {
compatible = "exynos";
status = "disabled";
reg = <0x12C00000 0x100>;
interrupts = < 83 >;
interrupt-parent = <&GIC>;
clock-frequency = < 100000000 >;
current-speed = <115200>;
};
serial1: serial@12C10000 {
compatible = "exynos";
status = "disabled";
reg = <0x12C10000 0x100>;
interrupts = < 84 >;
interrupt-parent = <&GIC>;
clock-frequency = < 100000000 >;
current-speed = <115200>;
};
serial2: serial@12C20000 {
compatible = "exynos";
status = "disabled";
reg = <0x12C20000 0x100>;
interrupts = < 85 >;
interrupt-parent = <&GIC>;
clock-frequency = < 100000000 >;
current-speed = <115200>;
};
serial3: serial@12C30000 {
compatible = "exynos";
status = "disabled";
reg = <0x12C30000 0x100>;
interrupts = < 86 >;
interrupt-parent = <&GIC>;
clock-frequency = < 100000000 >;
current-speed = <115200>;
};
spi0: spi@12d20000 {
compatible = "samsung,exynos5-spi";
status = "disabled";
reg = <0x12d20000 0x100>;
interrupts = < 100 >;
interrupt-parent = <&GIC>;
};
spi1: spi@12d30000 {
compatible = "samsung,exynos5-spi";
status = "disabled";
reg = <0x12d30000 0x100>;
interrupts = < 101 >;
interrupt-parent = <&GIC>;
};
spi2: spi@12d40000 {
compatible = "samsung,exynos5-spi";
status = "disabled";
reg = <0x12d40000 0x100>;
interrupts = < 102 >;
interrupt-parent = <&GIC>;
};
i2c0: i2c@12C60000 {
compatible = "exynos,i2c";
status = "disabled";
reg = <0x12C60000 0x10000>;
interrupts = < 88 >;
interrupt-parent = <&GIC>;
};
i2c1: i2c@12C70000 {
compatible = "exynos,i2c";
status = "disabled";
reg = <0x12C70000 0x10000>;
interrupts = < 89 >;
interrupt-parent = <&GIC>;
};
i2c2: i2c@12C80000 {
compatible = "exynos,i2c";
status = "disabled";
reg = <0x12C80000 0x10000>;
interrupts = < 90 >;
interrupt-parent = <&GIC>;
};
i2c3: i2c@12C90000 {
compatible = "exynos,i2c";
status = "disabled";
reg = <0x12C90000 0x10000>;
interrupts = < 91 >;
interrupt-parent = <&GIC>;
};
i2c4: i2c@12CA0000 {
compatible = "exynos,i2c";
status = "disabled";
reg = <0x12CA0000 0x10000>;
interrupts = < 92 >;
interrupt-parent = <&GIC>;
};
i2c5: i2c@12CB0000 {
compatible = "exynos,i2c";
status = "disabled";
reg = <0x12CB0000 0x10000>;
interrupts = < 93 >;
interrupt-parent = <&GIC>;
};
i2c6: i2c@12CC0000 {
compatible = "exynos,i2c";
status = "disabled";
reg = <0x12CC0000 0x10000>;
interrupts = < 94 >;
interrupt-parent = <&GIC>;
};
i2c7: i2c@12CD0000 {
compatible = "exynos,i2c";
status = "disabled";
reg = <0x12CD0000 0x10000>;
interrupts = < 95 >;
interrupt-parent = <&GIC>;
};
fimd0: fimd@14400000 {
compatible = "exynos,fimd";
status = "disabled";
reg = < 0x14400000 0x10000 >, /* fimd */
< 0x14420000 0x10000 >, /* disp */
< 0x10050000 0x220 >; /* sysreg */
interrupt-parent = <&GIC>;
};
dp0: dp@145B0000 {
compatible = "exynos,dp";
status = "disabled";
reg = < 0x145B0000 0x10000 >;
interrupt-parent = <&GIC>;
};
};
};

57
sys/dts/arm/exynos5250-arndale.dts
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@ -1,57 +0,0 @@
/*-
* Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/dts-v1/;
/include/ "exynos5250.dtsi"
/ {
model = "Arndale Board";
memory {
device_type = "memory";
reg = < 0x40000000 0x80000000 >; /* 2G */
};
SOC: Exynos5@0 {
pad0: pad@11400000 {
status = "okay";
};
serial2: serial@12C20000 {
status = "okay";
};
};
chosen {
stdin = &serial2;
stdout = &serial2;
};
};

82
sys/dts/arm/exynos5250-snow.dts
View File

@ -1,82 +0,0 @@
/*-
* Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/dts-v1/;
/include/ "exynos5250.dtsi"
/ {
model = "Samsung Chromebook";
memory {
device_type = "memory";
reg = < 0x40000000 0x80000000 >; /* 2G */
};
SOC: Exynos5@0 {
pad0: pad@11400000 {
status = "okay";
};
fimd0: fimd@14400000 {
status = "okay";
panel-size = < 1366 768 >;
panel-hsync = < 80 32 48 >;
panel-vsync = < 14 5 3 >;
panel-clk-div = < 17 >;
panel-backlight-pin = < 25 >;
};
i2c4: i2c@12CA0000 {
status = "okay";
};
keyboard-controller {
compatible = "google,mkbp-keyb";
google,key-rows = <8>;
google,key-columns = <13>;
freebsd,intr-gpio = <146>;
};
usbdrd_phy0: phy@12100000 {
vbus-supply = < 155 >;
};
};
i2c-arbitrator {
freebsd,our-gpio = <177>;
freebsd,ec-gpio = <168>;
};
chosen {
stdin = &serial2;
stdout = &serial2;
};
};

78
sys/dts/arm/exynos5250-spring.dts
View File

@ -1,78 +0,0 @@
/*-
* Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/dts-v1/;
/include/ "exynos5250.dtsi"
/ {
model = "HP Chromebook 11";
memory {
device_type = "memory";
reg = < 0x40000000 0x80000000 >; /* 2G */
};
SOC: Exynos5@0 {
pad0: pad@11400000 {
status = "okay";
};
fimd0: fimd@14400000 {
status = "okay";
panel-size = < 1366 768 >;
panel-hsync = < 80 32 48 >;
panel-vsync = < 14 5 3 >;
panel-clk-div = < 17 >;
panel-backlight-pin = < 25 >;
};
i2c4: i2c@12CA0000 {
status = "okay";
};
keyboard-controller {
compatible = "google,mkbp-keyb";
google,key-rows = <8>;
google,key-columns = <13>;
freebsd,intr-gpio = <146>;
};
};
chosen {
stdin = &serial2;
stdout = &serial2;
};
hsichub@13400000 {
compatible = "smsc,usb3503";
freebsd,reset-gpio = <172>;
};
};

79
sys/dts/arm/exynos5250.dtsi
View File

@ -1,79 +0,0 @@
/*-
* Copyright (c) 2013-2014 Ruslan Bukin <br@bsdpad.com>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/include/ "exynos5.dtsi"
/ {
compatible = "samsung,exynos5250", "samsung,exynos5";
SOC: Exynos5@0 {
pmu_system_controller: system-controller@10040000 {
compatible = "samsung,exynos5250-pmu";
status = "okay";
};
pad0: pad@11400000 {
compatible = "samsung,exynos5250-padctrl";
reg = <0x11400000 0x1000>,
<0x13400000 0x1000>,
<0x10D10000 0x1000>,
<0x03860000 0x1000>;
interrupts = < 78 77 82 79 >;
interrupt-parent = <&GIC>;
};
serial0: serial@12C00000 {
clock-frequency = < 100000000 >;
};
serial1: serial@12C10000 {
clock-frequency = < 100000000 >;
};
serial2: serial@12C20000 {
clock-frequency = < 100000000 >;
};
serial3: serial@12C30000 {
clock-frequency = < 100000000 >;
};
usb@12110000 {
status = "okay";
};
usbdrd_phy0: phy@12100000 {
status = "okay";
};
xhci@12000000 {
status = "okay";
};
};
};

70
sys/dts/arm/exynos5420-arndale-octa.dts
View File

@ -1,70 +0,0 @@
/*-
* Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/dts-v1/;
/include/ "exynos5420.dtsi"
/ {
model = "Arndale Octa Board";
memory {
device_type = "memory";
reg = < 0x20000000 0x7f200000 >; /* 2G */
};
SOC: Exynos5@0 {
serial3: serial@12C30000 {
status = "okay";
};
usb@12110000 {
status = "okay";
};
mmc2: dwmmc@12220000 {
status = "okay";
num-slots = <1>;
supports-highspeed;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
bus-frequency = <50000000>;
slot@0 {
reg = <0>;
bus-width = <4>;
};
};
};
chosen {
stdin = &serial3;
stdout = &serial3;
};
};

87
sys/dts/arm/exynos5420-peach-pit.dts
View File

@ -1,87 +0,0 @@
/*-
* Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/dts-v1/;
/include/ "exynos5420.dtsi"
/ {
model = "Chromebook Peach Pit";
memory {
device_type = "memory";
reg = < 0x20000000 0xdf000000 >; /* 3.5G */
};
SOC: Exynos5@0 {
fimd0: fimd@14400000 {
status = "okay";
panel-size = < 1366 768 >;
panel-hsync = < 80 32 48 >;
panel-vsync = < 14 5 3 >;
panel-clk-div = < 17 >;
panel-backlight-pin = < 25 >;
};
spi2: spi@12d40000 {
status = "okay";
};
keyboard-controller {
compatible = "google,mkbp-keyb";
google,key-rows = <8>;
google,key-columns = <13>;
freebsd,intr-gpio = < 21 >;
};
usbdrd_phy0: phy@12100000 {
vbus-supply = < 217 >;
};
usbdrd_phy1: phy@12500000 {
vbus-supply = < 218 >;
};
mmc2: dwmmc@12220000 {
status = "okay";
num-slots = <1>;
supports-highspeed;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
bus-frequency = <50000000>;
slot@0 {
reg = <0>;
bus-width = <4>;
};
};
};
};

112
sys/dts/arm/exynos5420.dtsi
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@ -1,112 +0,0 @@
/*-
* Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/include/ "exynos5.dtsi"
/ {
compatible = "samsung,exynos5420", "samsung,exynos5";
SOC: Exynos5@0 {
pmu_system_controller: system-controller@10040000 {
compatible = "samsung,exynos5420-pmu";
status = "okay";
};
pad0: pad@11400000 {
compatible = "samsung,exynos5420-padctrl";
status = "okay";
reg = <0x13400000 0x1000>,
<0x13410000 0x1000>,
<0x14000000 0x1000>,
<0x14010000 0x1000>,
<0x03860000 0x1000>;
interrupts = < 77 110 78 82 79 >;
interrupt-parent = <&GIC>;
};
serial0: serial@12C00000 {
clock-frequency = < 50000000 >;
};
serial1: serial@12C10000 {
clock-frequency = < 50000000 >;
};
serial2: serial@12C20000 {
clock-frequency = < 50000000 >;
};
serial3: serial@12C30000 {
clock-frequency = < 50000000 >;
};
usbdrd_phy0: phy@12100000 {
status = "okay";
};
usbdrd_phy1: phy@12500000 {
status = "okay";
};
xhci@12000000 {
status = "okay";
};
xhci@12400000 {
status = "okay";
};
mmc0: dwmmc@12200000 {
compatible = "samsung,exynos5420-dw-mshc-smu";
reg = <0x12200000 0x10000>;
interrupts = <107>;
interrupt-parent = <&GIC>;
fifo-depth = <0x40>;
status = "disabled";
};
mmc1: dwmmc@12210000 {
compatible = "samsung,exynos5420-dw-mshc-smu";
reg = <0x12210000 0x10000>;
interrupts = <108>;
interrupt-parent = <&GIC>;
fifo-depth = <0x40>;
status = "disabled";
};
mmc2: dwmmc@12220000 {
compatible = "samsung,exynos5420-dw-mshc";
reg = <0x12220000 0x10000>;
interrupts = <109>;
interrupt-parent = <&GIC>;
fifo-depth = <0x40>;
status = "disabled";
};
};
};

77
sys/dts/arm/meson3.dtsi
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@ -1,77 +0,0 @@
/*-
* Copyright (c) 2015 John Wehle <john@feith.com>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/*
* The basic single core aml8726 (aka meson) uses an Amlogic interrupt
* controller, however meson.dtsi specifies GIC (which is present on
* the multicore aml8726) so we need to override things here.
*/
/include/ "meson.dtsi"
/ {
model = "Amlogic Meson3 SoC";
compatible = "amlogic,meson3";
interrupt-parent = <&pic>;
pic: pic@c1109a40 {
device_type = "interrupt-controller";
compatible = "amlogic,aml8726-pic";
reg = <0xc1109a40 128>; /* cbus 0x2690 */
interrupt-controller;
#interrupt-cells = <3>;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@200 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
reg = <0x200>;
};
};
clk81: clk@0 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <0>;
};
};
&gic {
status = "disabled";
};
&L2 {
interrupts = <0 61 1>;
};

79
sys/dts/arm/meson8b.dtsi
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@ -1,79 +0,0 @@
/*-
* Copyright (c) 2015 John Wehle <john@feith.com>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/include/ "meson.dtsi"
/ {
model = "Amlogic Meson8b SoC";
compatible = "amlogic,meson8b";
interrupt-parent = <&gic>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@200 {
device_type = "cpu";
compatible = "arm,cortex-a5";
next-level-cache = <&L2>;
reg = <0x200>;
};
cpu@201 {
device_type = "cpu";
compatible = "arm,cortex-a5";
next-level-cache = <&L2>;
reg = <0x201>;
};
cpu@202 {
device_type = "cpu";
compatible = "arm,cortex-a5";
next-level-cache = <&L2>;
reg = <0x202>;
};
cpu@203 {
device_type = "cpu";
compatible = "arm,cortex-a5";
next-level-cache = <&L2>;
reg = <0x203>;
};
};
clk81: clk@0 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <0>;
};
};
&L2 {
interrupts = <0 143 1>;
};

396
sys/dts/arm/odroidc1.dts
View File

@ -1,396 +0,0 @@
/*-
* Copyright (c) 2015 John Wehle <john@feith.com>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/*
* The ordering of certain devices is significant (e.g. usb depends on
* usb-phy which depends on gpio, also the timer should appear early on
* to provide a reasonably accurate DELAY implementation).
*
* Both usb-phys devices must be configured to prevent the usb controller
* from hanging during initialization.
*/
/dts-v1/;
/memreserve/ 0x7900000 0x00600000; /* 6MB frame buffer */
#include "meson8b.dtsi"
/ {
model = "hardkernel,odroid-c1";
compatible = "hardkernel,odroid-c1", "amlogic,s805";
#address-cells = <1>;
#size-cells = <1>;
aliases {
soc = &soc;
screen = &screen;
uart0 = &uart_AO;
};
memory {
device_type = "memory";
reg = <0x0 0x40000000>; /* 1GB RAM */
};
soc: soc {
device_type = "soc";
bus-frequency = <0>;
scu: scu@c4300000 {
compatible = "arm,cortex-a5-scu";
reg = <0xc4300000 0x1000>;
};
cpuconfig: cpuconfig@d901ff80 {
compatible = "amlogic,aml8726-cpuconfig";
reg = <0xd901ff80 16>;
};
ccm@c1104140 {
compatible = "amlogic,aml8726-ccm";
reg = <0xc1104140 20>; /* cbus 0x1050 */
functions = "ethernet", "i2c", "rng", "sdio", "sdxc",
"uart-a", "uart-b", "uart-c",
"usb-a", "usb-b";
};
pinctrl@c11080b0 {
compatible = "amlogic,aml8726-pinctrl";
reg = <0xc11080b0 40>, /* mux */
<0xc11080e8 24>, /* pu/pd */
<0xc1108120 24>, /* pull enable */
<0xc8100014 4>, /* ao mux */
<0xc810002c 4>, /* ao pu/pd */
<0xc810002c 4>; /* ao pull enable */
/*
* Currently only pin muxing that deviates
* from the power on default of gpio is
* specified here.
*/
pinctrl-names = "default";
pinctrl-0 = <&pins_uartao &pins_ethernet &pins_hdmi>;
pins_ethernet: ethernet {
amlogic,pins = "ref_clk",
"tx_clk", "tx_en",
"tx_d0", "tx_d1",
"tx_d2", "tx_d3",
"rx_clk", "rx_dv",
"rx_d0", "rx_d1",
"rx_d2", "rx_d3",
"mdc", "mdio";
amlogic,function = "ethernet";
};
pins_hdmi: hdmi {
amlogic,pins = "cec", "hpd",
"scl", "sda";
amlogic,function = "hdmi";
};
pins_sdio_b: sdio_b {
amlogic,pins = "clk", "cmd",
"d0", "d1",
"d2", "d3";
amlogic,function = "sdio-b";
amlogic,pull = "up";
};
pins_sdxc_b: sdxc_b {
amlogic,pins = "clk", "cmd",
"d0", "d1",
"d2", "d3";
amlogic,function = "sdxc-b";
amlogic,pull = "up";
};
pins_sdio_c: sdio_c {
amlogic,pins = "clk", "cmd",
"d0", "d1",
"d2", "d3";
amlogic,function = "sdio-c";
amlogic,pull = "up";
};
pins_sdxc_c: sdxc_c {
amlogic,pins = "clk", "cmd",
"d0", "d1",
"d2", "d3",
"d4", "d5",
"d6", "d7";
amlogic,function = "sdxc-c";
amlogic,pull = "up";
};
pins_i2c_a: i2c_a {
amlogic,pins = "scl", "sda";
amlogic,function = "i2c-a";
};
pins_i2c_b: i2c_b {
amlogic,pins = "scl", "sda";
amlogic,function = "i2c-b";
};
pins_uarta: uarta {
amlogic,pins = "tx", "rx", "cts", "rts";
amlogic,function = "uart-a";
};
pins_uartb: uartb {
/*
* gpiox18 appears to have special
* meaning to the bootloader making
* hardware handshaking unavailable.
*/
amlogic,pins = "tx", "rx";
amlogic,function = "uart-b";
};
pins_uartc: uartc {
amlogic,pins = "tx", "rx", "cts", "rts";
amlogic,function = "uart-c";
};
pins_uartao: uartao {
amlogic,pins = "tx", "rx";
amlogic,function = "uart-ao";
};
};
rtc@c8100740 {
compatible = "amlogic,aml8726-rtc";
reg = <0xc8100740 20>; /* aobus 0x1d0 */
interrupts = <0 72 1>;
};
clkmsr: clkmsr@c1108758 {
compatible = "amlogic,aml8726-clkmsr";
reg = <0xc1108758 16>; /* cbus 0x21d6 */
clocks = <&clk81>;
};
gpioao: gpio@c8100024 {
/* gpio unit 7 */
compatible = "amlogic,aml8726-gpio";
reg = <0xc8100024 4>, /* oen aobus 0x9 */
<0xc8100024 4>, /* out */
<0xc8100028 4>; /* in */
gpio-controller;
#gpio-cells = <1>;
pin-count = <14>;
};
gpio3: gpio@c1108054 {
compatible = "amlogic,aml8726-gpio";
reg = <0xc1108054 4>, /* oen cbus 0x2015 */
<0xc1108058 4>, /* out */
<0xc110805c 4>; /* in */
gpio-controller;
#gpio-cells = <1>;
pin-count = <32>;
};
gpio5: gpio@c110806c {
compatible = "amlogic,aml8726-gpio";
reg = <0xc110806c 4>, /* oen cbus 0x201b */
<0xc1108070 4>, /* out */
<0xc1108074 4>; /* in */
gpio-controller;
#gpio-cells = <1>;
pin-count = <32>;
};
mmc@c1108c20 {
compatible = "amlogic,aml8726-mmc";
reg = <0xc1108c20 32>; /* cbus 0x2308 */
interrupts = <0 28 1>;
clocks = <&clk81>;
pinctrl-names = "default";
pinctrl-0 = <&pins_sdio_b>;
/*
* Ordering is significant.
*
* mmc-vselect low sets first voltage
* mmc-vselect high sets second voltage
*
* If mmc-vselect is not present, then
* only one voltage should be specified.
*/
mmc-voltages = "3.3", "1.8";
mmc-vselect = <&gpioao 3>; /* gpioao_3 */
mmc-pwr-en = <&gpio5 31 0>; /* card_8 */
ins-detect = <&gpio5 29 0>; /* card_6 */
};
sdxc@c1108e00 {
compatible = "amlogic,aml8726-sdxc-m8";
clock-frequency = <1275000000>;
reg = <0xc1108e00 60>; /* cbus 0x2380 */
interrupts = <0 78 1>;
pinctrl-names = "default";
pinctrl-0 = <&pins_sdxc_c>;
mmc-voltages = "1.8";
mmc-rst = <&gpio3 9 0>; /* boot_9 emmc-rst */
};
rng@c1108100 {
compatible = "amlogic,aml8726-rng";
reg = <0xc1108100 8>; /* cbus 0x2040 */
};
usb-phy@c1108800 {
/* usb-a phy */
compatible = "amlogic,aml8726-m8-usb-phy";
reg = <0xc1108800 32>; /* cbus 0x2200 */
usb-pwr-en = <&gpioao 5 1>; /* gpioao_5 vbus */
};
usb-phy@c1108820 {
/* usb-b phy */
compatible = "amlogic,aml8726-m8-usb-phy";
reg = <0xc1108820 32>; /* cbus 0x2208 */
force-aca = "true";
usb-hub-rst = <&gpioao 4 0>; /* gpioao_4 hub-rst */
};
usb@c9040000 {
/* usb-a */
compatible = "synopsys,designware-hs-otg2";
reg = <0xc9040000 0x40000>; /* ahbbus 0x40000*/
interrupts = <0 30 4>;
#address-cells = <1>;
#size-cells = <0>;
dr_mode = "host";
};
usb@c90c0000 {
/* usb-b */
compatible = "synopsys,designware-hs-otg2";
reg = <0xc90c0000 0x40000>; /* ahbbus 0xc0000 */
interrupts = <0 31 4>;
#address-cells = <1>;
#size-cells = <0>;
dr_mode = "host";
};
eth@c9410000 {
/* ethernet */
compatible = "amlogic,meson6-dwmac";
reg = <0xc9410000 0x2000>; /* ahbbus 0x410000 */
interrupts = <0 8 1>;
#address-cells = <1>;
#size-cells = <0>;
eth-phy-rst = <&gpio3 23 0>; /* gpioh_4 phy-rst */
};
screen: fb@c8006020 {
device_type = "display";
compatible = "amlogic,aml8726-fb";
reg = <0xc8006048 12>, /* CANVAS */
<0xc1106800 1024>, /* VIU */
<0xc1107400 1024>; /* VPP */
interrupts = <0 2 1>,
<0 3 1>,
<0 12 1>,
<0 13 1>;
address = <0x7900000>; /* match memreserve */
width = <720>;
height = <480>;
depth = <24>;
linebytes = <2160>;
};
};
leds {
compatible = "gpio-leds";
sys_led {
gpios = <&gpioao 13>; /* gpioao_13 sys_led */
label = "sys_led";
};
};
chosen {
stdin = "uart0";
stdout = "uart0";
};
};
&clk81 {
clock-frequency = <0>;
};
&uart_AO {
status = "okay";
current-speed = <115200>;
};
&uart_A {
status = "okay";
};
&uart_B {
status = "okay";
};
&uart_C {
status = "okay";
};
&i2c_A {
status = "okay";
};
&i2c_B {
status = "okay";
};

53
sys/dts/arm/pandaboard-common.dtsi
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@ -1,53 +0,0 @@
/*-
* Copyright (c) 2015 Oleksandr Tymoshenko <gonzo@freebsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
&mmc1 {
non-removable; /* XXX need real solution */
};
&mmc5 {
status = "disabled";
};
/ {
ocp {
global-timer@48240600 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x48240200 0x20>;
interrupts = <GIC_PPI 11 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>;
};
elm: elm@48078000 {
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
};
};
chosen {
stdin = "serial2";
stdout = "serial2";
};
};

31
sys/dts/arm/pandaboard-es.dts
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@ -1,31 +0,0 @@
/*-
* Copyright (c) 2015 Oleksandr Tymoshenko <gonzo@freebsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#include "omap4-panda-es.dts"
#include "pandaboard-common.dtsi"

31
sys/dts/arm/pandaboard.dts
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@ -1,31 +0,0 @@
/*-
* Copyright (c) 2015 Oleksandr Tymoshenko <gonzo@freebsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#include "omap4-panda.dts"
#include "pandaboard-common.dtsi"

63
sys/dts/arm/rk3188-radxa-lite.dts
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@ -1,63 +0,0 @@
/*-
* Copyright (c) 2014 Ganbold Tsagaankhuu <ganbold@freebsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/dts-v1/;
/include/ "rk3188.dtsi"
/ {
model = "Radxa RadxaRock Lite";
memory {
device_type = "memory";
reg = < 0x60000000 0x40000000 >; /* 1GB RAM */
};
aliases {
soc = &SOC;
};
SOC: rk3188 {
uart2: serial@20064000 {
status = "okay";
};
mmc@10214000 {
status = "okay";
};
};
chosen {
bootargs = "-v";
stdin = &uart2;
stdout = &uart2;
};
};

63
sys/dts/arm/rk3188-radxa.dts
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@ -1,63 +0,0 @@
/*-
* Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@freebsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/dts-v1/;
/include/ "rk3188.dtsi"
/ {
model = "Radxa RadxaRock";
memory {
device_type = "memory";
reg = < 0x60000000 0x80000000 >; /* 2GB RAM */
};
aliases {
soc = &SOC;
};
SOC: rk3188 {
uart2: serial@20064000 {
status = "okay";
};
mmc@10214000 {
status = "okay";
};
};
chosen {
bootargs = "-v";
stdin = &uart2;
stdout = &uart2;
};
};

254
sys/dts/arm/rk3188.dtsi
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@ -1,254 +0,0 @@
/*-
* Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@freebsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/ {
compatible = "rockchip,rk3188";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&GIC>;
aliases {
soc = &SOC;
};
SOC: rk3188 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges;
bus-frequency = <0>;
GIC: interrupt-controller@1013d000 {
compatible = "arm,gic";
reg = <0x1013d000 0x1000>, /* Distributor Registers */
<0x1013c100 0x0100>; /* CPU Interface Registers */
interrupt-controller;
#interrupt-cells = <1>;
};
pmu@20004000 {
compatible = "rockchip,rk30xx-pmu";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x20004000 0x100>;
};
grf@20008000 {
compatible = "rockchip,rk30xx-grf";
#address-cells = <1>;
#size-cells = <1>;
reg = < 0x20008000 0x2000 >;
};
mp_tmr@1013c600 {
compatible = "arm,mpcore-timers";
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = < 148500000 >;
reg = <0x1013c200 0x100>, /* Global Timer Regs */
<0x1013c600 0x20>; /* Private Timer Regs */
interrupts = < 27 29 >;
interrupt-parent = <&GIC>;
};
timer@20038000 {
compatible = "rockchip,rk30xx-timer";
reg = <0x20038000 0x20>;
interrupts = <76>;
clock-frequency = <24000000>;
status = "disabled";
};
timer@20038020 {
compatible = "rockchip,rk30xx-timer";
reg = <0x20038020 0x20>;
interrupts = <77>;
clock-frequency = <24000000>;
status = "disabled";
};
timer@20038060 {
compatible = "rockchip,rk30xx-timer";
reg = <0x20038060 0x20>;
interrupts = <91>;
clock-frequency = <24000000>;
status = "disabled";
};
timer@20038080 {
compatible = "rockchip,rk30xx-timer";
reg = <0x20038080 0x20>;
interrupts = <92>;
clock-frequency = <24000000>;
status = "disabled";
};
timer@200380a0 {
compatible = "rockchip,rk30xx-timer";
reg = <0x200380a0 0x20>;
interrupts = <96>;
clock-frequency = <24000000>;
status = "disabled";
};
watchdog@2004c000 {
compatible = "rockchip,rk30xx-wdt";
reg = <0x2004c000 0x100>;
clock-frequency = < 66000000 >;
};
gpio0: gpio@2000a000 {
compatible = "rockchip,rk30xx-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x2000a000 0x100>;
interrupts = <86>;
interrupt-parent = <&GIC>;
};
gpio1: gpio@2003c000 {
compatible = "rockchip,rk30xx-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x2003c000 0x100>;
interrupts = <87>;
interrupt-parent = <&GIC>;
};
gpio2: gpio@2003e000 {
compatible = "rockchip,rk30xx-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x2003e000 0x100>;
interrupts = <88>;
interrupt-parent = <&GIC>;
};
gpio3: gpio@20080000 {
compatible = "rockchip,rk30xx-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x20080000 0x100>;
interrupts = <89>;
interrupt-parent = <&GIC>;
};
usb0: usb@10180000 {
compatible = "synopsys,designware-hs-otg2";
reg = <0x10180000 0x40000>;
interrupts = <48>;
interrupt-parent = <&GIC>;
#address-cells = <1>;
#size-cells = <0>;
};
usb1: usb@101c0000 {
compatible = "synopsys,designware-hs-otg2";
reg = <0x101c0000 0x40000>;
interrupts = < 49 >;
interrupt-parent = <&GIC>;
#address-cells = <1>;
#size-cells = <0>;
gpios = <&gpio0 3 2 2>;
};
uart0: serial@10124000 {
compatible = "snps,dw-apb-uart";
reg = <0x10124000 0x400>;
reg-shift = <2>;
interrupts = <66>;
interrupt-parent = <&GIC>;
current-speed = <115200>;
clock-frequency = < 24000000 >;
broken-txfifo = <1>;
status = "disabled";
};
uart1: serial@10126000 {
compatible = "snps,dw-apb-uart";
reg = <0x10126000 0x400>;
reg-shift = <2>;
interrupts = <67>;
interrupt-parent = <&GIC>;
current-speed = <115200>;
clock-frequency = < 24000000 >;
broken-txfifo = <1>;
status = "disabled";
};
uart2: serial@20064000 {
compatible = "snps,dw-apb-uart";
reg = <0x20064000 0x400>;
reg-shift = <2>;
interrupts = <68>;
interrupt-parent = <&GIC>;
current-speed = <115200>;
clock-frequency = < 24000000 >;
broken-txfifo = <1>;
status = "disabled";
};
uart3: serial@20068000 {
compatible = "snps,dw-apb-uart";
reg = <0x20068000 0x400>;
reg-shift = <2>;
interrupts = <69>;
interrupt-parent = <&GIC>;
current-speed = <115200>;
clock-frequency = < 24000000 >;
broken-txfifo = <1>;
status = "disabled";
};
mmc@10214000 {
compatible = "rockchip,rk2928-dw-mshc";
reg = <0x10214000 0x1000>;
interrupts = <55>;
#address-cells = <1>;
#size-cells = <0>;
bus-frequency = <48000000>; /* TODO: verify freq */
fifo-depth = <0x40>;
num-slots = <1>;
status = "disabled";
};
mmc@10218000 {
compatible = "rockchip,rk2928-dw-mshc";
reg = <0x10218000 0x1000>;
interrupts = <56>;
#address-cells = <1>;
#size-cells = <0>;
bus-frequency = <48000000>; /* TODO: verify freq */
fifo-depth = <0x40>;
num-slots = <1>;
status = "disabled";
};
};
};

105
sys/dts/arm/rpi.dts
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@ -1,105 +0,0 @@
/*
* Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@bluezbox.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#include "bcm2835-rpi-b.dts"
/ {
/* This is only necessary for FDT_DTB_STATIC */
memory {
device_type = "memory";
reg = <0 0x8000000>; /* 128MB, Set by VideoCore */
};
rpi_ft5406 {
compatible = "rpi,rpi-ft5406";
status = "okay";
};
/* Temporary patches */
soc {
sdhost: mmc@7e202000 {
status = "disabled";
}
sdhci@7e300000 {
status = "okay";
};
spi@7e204000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
};
gpio@7e200000 {
/* Pins that can short 3.3V to GND in output mode: 46-47
* Pins used by VideoCore: 48-53
*/
broadcom,read-only = <46>, <47>, <48>, <49>, <50>,
<51>, <52>, <53>;
/* Reserved */
pins_reserved: reserved {
broadcom,pins = <48>, <49>, <50>, <51>, <52>,
<53>;
};
spi0_pins: spi0_pins {
brcm,pins = <9 10 11>;
brcm,function = <4>; /* alt0 */
};
spi0_cs_pins: spi0_cs_pins {
brcm,pins = <8 7>;
brcm,function = <1>; /* output */
};
}
vchiq {
compatible = "brcm,bcm2835-vchiq";
reg = <0x7e00b840 0xf>;
interrupts = <0 2>;
cache-line-size = <32>;
};
display {
compatible = "broadcom,bcm2835-fb", "broadcom,bcm2708-fb";
broadcom,vc-mailbox = <&mailbox>;
broadcom,vc-channel = <1>;
broadcom,width = <0>; /* Set by VideoCore */
broadcom,height = <0>; /* Set by VideoCore */
broadcom,depth = <0>; /* Set by VideoCore */
};
};
};

103
sys/dts/arm/rpi2.dts
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@ -1,103 +0,0 @@
/*
* Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@bluezbox.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#include "bcm2836-rpi-2-b.dts"
/ {
/* This is only necessary for FDT_DTB_STATIC */
memory {
device_type = "memory";
reg = <0 0x8000000>; /* 128MB, Set by VideoCore */
};
rpi_ft5406 {
compatible = "rpi,rpi-ft5406";
status = "okay";
};
/* Temporary patches */
soc {
sdhost: mmc@7e202000 {
status = "disabled";
}
sdhci@7e300000 {
status = "okay";
};
spi@7e204000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
};
gpio@7e200000 {
/* Pins that can short 3.3V to GND in output mode: 46-47
* Pins used by VideoCore: 48-53
*/
broadcom,read-only = <46>, <47>, <48>, <49>, <50>,
<51>, <52>, <53>;
/* Reserved */
pins_reserved: reserved {
broadcom,pins = <48>, <49>, <50>, <51>, <52>,
<53>;
};
spi0_pins: spi0_pins {
brcm,pins = <9 10 11>;
brcm,function = <4>; /* alt0 */
};
spi0_cs_pins: spi0_cs_pins {
brcm,pins = <8 7>;
brcm,function = <1>; /* output */
};
}
vchiq {
compatible = "brcm,bcm2835-vchiq";
reg = <0x7e00b840 0xf>;
interrupts = <0 2>;
cache-line-size = <32>;
};
display {
compatible = "broadcom,bcm2835-fb", "broadcom,bcm2708-fb";
broadcom,vc-mailbox = <&mailbox>;
broadcom,vc-channel = <1>;
broadcom,width = <0>; /* Set by VideoCore */
broadcom,height = <0>; /* Set by VideoCore */
broadcom,depth = <0>; /* Set by VideoCore */
};
};
};