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Enhance MCAM reg to allow query on access reg support in mlx5core.
Enhance MCAM to allow the driver to query which access regs are supported. For now, expose the regs needed for FW flashing. Linux commit: 0ab87743cc8c5bcd482daf71961ed5fc45349e01 Submitted by: slavash@ MFC after: 3 days Sponsored by: Mellanox Technologies
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parent
d5d52dd748
commit
9e3c099977
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=347275
@ -1056,6 +1056,9 @@ enum mlx5_mcam_feature_groups {
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#define MLX5_CAP_MCAM_FEATURE(mdev, fld) \
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MLX5_GET(mcam_reg, (mdev)->caps.mcam, mng_feature_cap_mask.enhanced_features.fld)
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#define MLX5_CAP_MCAM_REG(mdev, reg) \
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MLX5_GET(mcam_reg, (mdev)->caps.mcam, mng_access_reg_cap_mask.access_regs.reg)
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#define MLX5_CAP_QCAM_REG(mdev, fld) \
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MLX5_GET(qcam_reg, (mdev)->caps.qcam, qos_access_reg_cap_mask.reg_cap.fld)
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@ -8585,6 +8585,18 @@ struct mlx5_ifc_mcam_enhanced_features_bits {
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u8 pcie_performance_group[0x1];
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};
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struct mlx5_ifc_mcam_access_reg_bits {
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u8 reserved_at_0[0x1c];
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u8 mcda[0x1];
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u8 mcc[0x1];
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u8 mcqi[0x1];
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u8 reserved_at_1f[0x1];
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u8 regs_95_to_64[0x20];
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u8 regs_63_to_32[0x20];
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u8 regs_31_to_0[0x20];
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};
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struct mlx5_ifc_mcam_reg_bits {
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u8 reserved_at_0[0x8];
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u8 feature_group[0x8];
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@ -8594,6 +8606,7 @@ struct mlx5_ifc_mcam_reg_bits {
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u8 reserved_at_20[0x20];
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union {
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struct mlx5_ifc_mcam_access_reg_bits access_regs;
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u8 reserved_at_0[0x80];
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} mng_access_reg_cap_mask;
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