1
0
mirror of https://git.FreeBSD.org/src.git synced 2024-11-21 07:15:49 +00:00

igc: Remove non-existent legacy absolute and packet timers

igc, derived from igb, does not use these registers. All interrupt
timing is governed by EITR or LLI and driven by write-back.

MFC after:	1 week
Sponsored by:	BBOX.io
This commit is contained in:
Kevin Bowling 2024-09-28 21:32:49 -07:00
parent 1e3b1870ad
commit a40ecb6f74
3 changed files with 0 additions and 173 deletions

View File

@ -121,9 +121,6 @@ static int igc_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
static int igc_get_rs(SYSCTL_HANDLER_ARGS);
static void igc_print_debug_info(struct igc_adapter *);
static int igc_is_valid_ether_addr(u8 *);
static int igc_sysctl_int_delay(SYSCTL_HANDLER_ARGS);
static void igc_add_int_delay_sysctl(struct igc_adapter *, const char *,
const char *, struct igc_int_delay_info *, int, int);
/* Management and WOL Support */
static void igc_get_hw_control(struct igc_adapter *);
static void igc_release_hw_control(struct igc_adapter *);
@ -211,12 +208,6 @@ static driver_t igc_if_driver = {
* Tunable default values.
*********************************************************************/
#define IGC_TICKS_TO_USECS(ticks) ((1024 * (ticks) + 500) / 1000)
#define IGC_USECS_TO_TICKS(usecs) ((1000 * (usecs) + 512) / 1024)
#define MAX_INTS_PER_SEC 8000
#define DEFAULT_ITR (1000000000/(MAX_INTS_PER_SEC * 256))
/* Allow common code without TSO */
#ifndef CSUM_TSO
#define CSUM_TSO 0
@ -229,22 +220,6 @@ static int igc_disable_crc_stripping = 0;
SYSCTL_INT(_hw_igc, OID_AUTO, disable_crc_stripping, CTLFLAG_RDTUN,
&igc_disable_crc_stripping, 0, "Disable CRC Stripping");
static int igc_tx_int_delay_dflt = IGC_TICKS_TO_USECS(IGC_TIDV_VAL);
static int igc_rx_int_delay_dflt = IGC_TICKS_TO_USECS(IGC_RDTR_VAL);
SYSCTL_INT(_hw_igc, OID_AUTO, tx_int_delay, CTLFLAG_RDTUN, &igc_tx_int_delay_dflt,
0, "Default transmit interrupt delay in usecs");
SYSCTL_INT(_hw_igc, OID_AUTO, rx_int_delay, CTLFLAG_RDTUN, &igc_rx_int_delay_dflt,
0, "Default receive interrupt delay in usecs");
static int igc_tx_abs_int_delay_dflt = IGC_TICKS_TO_USECS(IGC_TADV_VAL);
static int igc_rx_abs_int_delay_dflt = IGC_TICKS_TO_USECS(IGC_RADV_VAL);
SYSCTL_INT(_hw_igc, OID_AUTO, tx_abs_int_delay, CTLFLAG_RDTUN,
&igc_tx_abs_int_delay_dflt, 0,
"Default transmit interrupt delay limit in usecs");
SYSCTL_INT(_hw_igc, OID_AUTO, rx_abs_int_delay, CTLFLAG_RDTUN,
&igc_rx_abs_int_delay_dflt, 0,
"Default receive interrupt delay limit in usecs");
static int igc_smart_pwr_down = false;
SYSCTL_INT(_hw_igc, OID_AUTO, smart_pwr_down, CTLFLAG_RDTUN, &igc_smart_pwr_down,
0, "Set to true to leave smart power down enabled on newer adapters");
@ -536,29 +511,6 @@ igc_if_attach_pre(if_ctx_t ctx)
igc_setup_msix(ctx);
igc_get_bus_info(hw);
/* Set up some sysctls for the tunable interrupt delays */
igc_add_int_delay_sysctl(adapter, "rx_int_delay",
"receive interrupt delay in usecs", &adapter->rx_int_delay,
IGC_REGISTER(hw, IGC_RDTR), igc_rx_int_delay_dflt);
igc_add_int_delay_sysctl(adapter, "tx_int_delay",
"transmit interrupt delay in usecs", &adapter->tx_int_delay,
IGC_REGISTER(hw, IGC_TIDV), igc_tx_int_delay_dflt);
igc_add_int_delay_sysctl(adapter, "rx_abs_int_delay",
"receive interrupt delay limit in usecs",
&adapter->rx_abs_int_delay,
IGC_REGISTER(hw, IGC_RADV),
igc_rx_abs_int_delay_dflt);
igc_add_int_delay_sysctl(adapter, "tx_abs_int_delay",
"transmit interrupt delay limit in usecs",
&adapter->tx_abs_int_delay,
IGC_REGISTER(hw, IGC_TADV),
igc_tx_abs_int_delay_dflt);
igc_add_int_delay_sysctl(adapter, "itr",
"interrupt delay limit in usecs/4",
&adapter->tx_itr,
IGC_REGISTER(hw, IGC_ITR),
DEFAULT_ITR);
hw->mac.autoneg = DO_AUTO_NEG;
hw->phy.autoneg_wait_to_complete = false;
hw->phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
@ -2015,12 +1967,6 @@ igc_initialize_receive_unit(if_ctx_t ctx)
if (!igc_disable_crc_stripping)
rctl |= IGC_RCTL_SECRC;
/*
* Set the interrupt throttling rate. Value is calculated
* as DEFAULT_ITR = 1/(MAX_INTS_PER_SEC * 256ns)
*/
IGC_WRITE_REG(hw, IGC_ITR, DEFAULT_ITR);
rxcsum = IGC_READ_REG(hw, IGC_RXCSUM);
if (if_getcapenable(ifp) & IFCAP_RXCSUM) {
rxcsum |= IGC_RXCSUM_CRCOFL;
@ -2717,61 +2663,6 @@ igc_print_nvm_info(struct igc_adapter *adapter)
printf("\n");
}
static int
igc_sysctl_int_delay(SYSCTL_HANDLER_ARGS)
{
struct igc_int_delay_info *info;
struct igc_adapter *adapter;
u32 regval;
int error, usecs, ticks;
info = (struct igc_int_delay_info *) arg1;
usecs = info->value;
error = sysctl_handle_int(oidp, &usecs, 0, req);
if (error != 0 || req->newptr == NULL)
return (error);
if (usecs < 0 || usecs > IGC_TICKS_TO_USECS(65535))
return (EINVAL);
info->value = usecs;
ticks = IGC_USECS_TO_TICKS(usecs);
if (info->offset == IGC_ITR) /* units are 256ns here */
ticks *= 4;
adapter = info->adapter;
regval = IGC_READ_OFFSET(&adapter->hw, info->offset);
regval = (regval & ~0xffff) | (ticks & 0xffff);
/* Handle a few special cases. */
switch (info->offset) {
case IGC_RDTR:
break;
case IGC_TIDV:
if (ticks == 0) {
adapter->txd_cmd &= ~IGC_TXD_CMD_IDE;
/* Don't write 0 into the TIDV register. */
regval++;
} else
adapter->txd_cmd |= IGC_TXD_CMD_IDE;
break;
}
IGC_WRITE_OFFSET(&adapter->hw, info->offset, regval);
return (0);
}
static void
igc_add_int_delay_sysctl(struct igc_adapter *adapter, const char *name,
const char *description, struct igc_int_delay_info *info,
int offset, int value)
{
info->adapter = adapter;
info->offset = offset;
info->value = value;
SYSCTL_ADD_PROC(device_get_sysctl_ctx(adapter->dev),
SYSCTL_CHILDREN(device_get_sysctl_tree(adapter->dev)),
OID_AUTO, name, CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT,
info, 0, igc_sysctl_int_delay, "I", description);
}
/*
* Set flow control using sysctl:
* Flow control values:

View File

@ -131,65 +131,6 @@
#define IGC_DEFAULT_MULTI_RXD 4096
#define IGC_MAX_RXD 4096
/*
* IGC_TIDV_VAL - Transmit Interrupt Delay Value
* Valid Range: 0-65535 (0=off)
* Default Value: 64
* This value delays the generation of transmit interrupts in units of
* 1.024 microseconds. Transmit interrupt reduction can improve CPU
* efficiency if properly tuned for specific network traffic. If the
* system is reporting dropped transmits, this value may be set too high
* causing the driver to run out of available transmit descriptors.
*/
#define IGC_TIDV_VAL 64
/*
* IGC_TADV_VAL - Transmit Absolute Interrupt Delay Value
* Valid Range: 0-65535 (0=off)
* Default Value: 64
* This value, in units of 1.024 microseconds, limits the delay in which a
* transmit interrupt is generated. Useful only if IGC_TIDV is non-zero,
* this value ensures that an interrupt is generated after the initial
* packet is sent on the wire within the set amount of time. Proper tuning,
* along with IGC_TIDV_VAL, may improve traffic throughput in specific
* network conditions.
*/
#define IGC_TADV_VAL 64
/*
* IGC_RDTR_VAL - Receive Interrupt Delay Timer (Packet Timer)
* Valid Range: 0-65535 (0=off)
* Default Value: 0
* This value delays the generation of receive interrupts in units of 1.024
* microseconds. Receive interrupt reduction can improve CPU efficiency if
* properly tuned for specific network traffic. Increasing this value adds
* extra latency to frame reception and can end up decreasing the throughput
* of TCP traffic. If the system is reporting dropped receives, this value
* may be set too high, causing the driver to run out of available receive
* descriptors.
*
* CAUTION: When setting IGC_RDTR to a value other than 0, adapters
* may hang (stop transmitting) under certain network conditions.
* If this occurs a WATCHDOG message is logged in the system
* event log. In addition, the controller is automatically reset,
* restoring the network connection. To eliminate the potential
* for the hang ensure that IGC_RDTR is set to 0.
*/
#define IGC_RDTR_VAL 0
/*
* Receive Interrupt Absolute Delay Timer
* Valid Range: 0-65535 (0=off)
* Default Value: 64
* This value, in units of 1.024 microseconds, limits the delay in which a
* receive interrupt is generated. Useful only if IGC_RDTR is non-zero,
* this value ensures that an interrupt is generated after the initial
* packet is received within the set amount of time. Proper tuning,
* along with IGC_RDTR, may improve traffic throughput in specific network
* conditions.
*/
#define IGC_RADV_VAL 64
/*
* This parameter controls whether or not autonegotation is enabled.
* 0 - Disable autonegotiation

View File

@ -27,7 +27,6 @@
#define IGC_CONNSW 0x00034 /* Copper/Fiber switch control - RW */
#define IGC_VET 0x00038 /* VLAN Ether Type - RW */
#define IGC_ICR 0x01500 /* Intr Cause Read - RC/W1C */
#define IGC_ITR 0x000C4 /* Interrupt Throttling Rate - RW */
#define IGC_ICS 0x01504 /* Intr Cause Set - WO */
#define IGC_IMS 0x01508 /* Intr Mask Set/Read - RW */
#define IGC_IMC 0x0150C /* Intr Mask Clear - WO */
@ -78,8 +77,6 @@
#define IGC_FCRTV 0x02460 /* Flow Control Refresh Timer Value - RW */
/* Split and Replication Rx Control - RW */
#define IGC_RXPBS 0x02404 /* Rx Packet Buffer Size - RW */
#define IGC_RDTR 0x02820 /* Rx Delay Timer - RW */
#define IGC_RADV 0x0282C /* Rx Interrupt Absolute Delay Timer - RW */
/* Shadow Ram Write Register - RW */
#define IGC_SRWR 0x12018
#define IGC_EEC_REG 0x12010
@ -148,8 +145,6 @@
#define IGC_FFVT_REG(_i) (0x09800 + ((_i) * 8))
#define IGC_FFLT_REG(_i) (0x05F00 + ((_i) * 8))
#define IGC_TXPBS 0x03404 /* Tx Packet Buffer Size - RW */
#define IGC_TIDV 0x03820 /* Tx Interrupt Delay Value - RW */
#define IGC_TADV 0x0382C /* Tx Interrupt Absolute Delay Val - RW */
/* Statistics Register Descriptions */
#define IGC_CRCERRS 0x04000 /* CRC Error Count - R/clr */
#define IGC_ALGNERRC 0x04004 /* Alignment Error Count - R/clr */