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Fix typos (dexktop, ot)
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=41538
@ -28,7 +28,7 @@
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.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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.\" THE POSSIBILITY OF SUCH DAMAGE.
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.\" THE POSSIBILITY OF SUCH DAMAGE.
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.\"
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.\"
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.\" $Id: xl.4,v 1.1 1998/08/16 17:19:58 wpaul Exp $
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.\" $Id: xl.4,v 1.2 1998/12/05 09:31:25 rnordier Exp $
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.\"
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.\"
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.Dd August 16, 1998
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.Dd August 16, 1998
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.Dt XL 4 i386
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.Dt XL 4 i386
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@ -47,7 +47,7 @@ controllers based on the 3Com "boomerang" and "cyclone" bus-master
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Etherlink XL chips. This includes the 3c900-TP, 3c900-COMBO, 3c905-TX,
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Etherlink XL chips. This includes the 3c900-TP, 3c900-COMBO, 3c905-TX,
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3c905-T4, 3c905B-TP, 3c905B-T4 and 3c905B-TX, and embedded 3c905-TX
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3c905-T4, 3c905B-TP, 3c905B-T4 and 3c905B-TX, and embedded 3c905-TX
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and 3c905B-TX ethernet hardware in certain Dell Optiplex and Dell
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and 3c905B-TX ethernet hardware in certain Dell Optiplex and Dell
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Precision dexktop machines, and certain Dell Latitude laptop docking
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Precision desktop machines, and certain Dell Latitude laptop docking
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stations.
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stations.
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.Pp
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.Pp
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The Etherlink XL chips support built-in 10baseT, 10base2 and 10base5
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The Etherlink XL chips support built-in 10baseT, 10base2 and 10base5
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@ -124,7 +124,7 @@ The driver failed to allocate an mbuf for the receiver ring.
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The driver failed to allocate an mbuf for the transmitter ring when
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The driver failed to allocate an mbuf for the transmitter ring when
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allocating a pad buffer or collapsing an mbuf chain into a cluster.
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allocating a pad buffer or collapsing an mbuf chain into a cluster.
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.It "xl%d: command never completed!"
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.It "xl%d: command never completed!"
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Some commands issued ot the 3c90x ASIC take time to complete: the
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Some commands issued to the 3c90x ASIC take time to complete: the
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driver is supposed to wait until the 'command in progress' bit in
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driver is supposed to wait until the 'command in progress' bit in
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the status register clears before continuing. In rare instances, this
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the status register clears before continuing. In rare instances, this
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bit may not clear. To avoid getting caught in an infinite wait loop,
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bit may not clear. To avoid getting caught in an infinite wait loop,
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@ -28,7 +28,7 @@
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.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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.\" THE POSSIBILITY OF SUCH DAMAGE.
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.\" THE POSSIBILITY OF SUCH DAMAGE.
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.\"
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.\"
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.\" $Id: xl.4,v 1.1 1998/08/16 17:19:58 wpaul Exp $
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.\" $Id: xl.4,v 1.2 1998/12/05 09:31:25 rnordier Exp $
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.\"
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.\"
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.Dd August 16, 1998
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.Dd August 16, 1998
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.Dt XL 4 i386
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.Dt XL 4 i386
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@ -47,7 +47,7 @@ controllers based on the 3Com "boomerang" and "cyclone" bus-master
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Etherlink XL chips. This includes the 3c900-TP, 3c900-COMBO, 3c905-TX,
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Etherlink XL chips. This includes the 3c900-TP, 3c900-COMBO, 3c905-TX,
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3c905-T4, 3c905B-TP, 3c905B-T4 and 3c905B-TX, and embedded 3c905-TX
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3c905-T4, 3c905B-TP, 3c905B-T4 and 3c905B-TX, and embedded 3c905-TX
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and 3c905B-TX ethernet hardware in certain Dell Optiplex and Dell
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and 3c905B-TX ethernet hardware in certain Dell Optiplex and Dell
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Precision dexktop machines, and certain Dell Latitude laptop docking
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Precision desktop machines, and certain Dell Latitude laptop docking
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stations.
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stations.
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.Pp
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.Pp
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The Etherlink XL chips support built-in 10baseT, 10base2 and 10base5
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The Etherlink XL chips support built-in 10baseT, 10base2 and 10base5
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@ -124,7 +124,7 @@ The driver failed to allocate an mbuf for the receiver ring.
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The driver failed to allocate an mbuf for the transmitter ring when
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The driver failed to allocate an mbuf for the transmitter ring when
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allocating a pad buffer or collapsing an mbuf chain into a cluster.
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allocating a pad buffer or collapsing an mbuf chain into a cluster.
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.It "xl%d: command never completed!"
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.It "xl%d: command never completed!"
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Some commands issued ot the 3c90x ASIC take time to complete: the
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Some commands issued to the 3c90x ASIC take time to complete: the
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driver is supposed to wait until the 'command in progress' bit in
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driver is supposed to wait until the 'command in progress' bit in
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the status register clears before continuing. In rare instances, this
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the status register clears before continuing. In rare instances, this
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bit may not clear. To avoid getting caught in an infinite wait loop,
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bit may not clear. To avoid getting caught in an infinite wait loop,
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