1
0
mirror of https://git.FreeBSD.org/src.git synced 2025-01-30 16:51:41 +00:00

Try an experiment with using DMA to load firmware into a 2200- VERIFY

CHECKSUM fails. Oh well, but keep a couple of the changes.

Avoid overflow in usec counters when waiting for mailbox completion.
This commit is contained in:
Matt Jacob 2006-12-17 16:59:19 +00:00
parent 4573b928f8
commit a4f3a2bef4
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=165308
3 changed files with 39 additions and 25 deletions

View File

@ -6369,7 +6369,7 @@ static const uint32_t mbpfc[] = {
ISPOPMAP(0xff, 0xff), /* 0x06: MBOX_MAILBOX_REG_TEST */
ISPOPMAP(0x03, 0x07), /* 0x07: MBOX_VERIFY_CHECKSUM */
ISPOPMAP(0x01, 0x4f), /* 0x08: MBOX_ABOUT_FIRMWARE */
ISPOPMAP(0xdf, 0x01), /* 0x09: LOAD RAM */
ISPOPMAP(0xdf, 0x01), /* 0x09: MBOX_LOAD_RISC_RAM_2100 */
ISPOPMAP(0xdf, 0x01), /* 0x0a: DUMP RAM */
ISPOPMAP(0x1ff, 0x01), /* 0x0b: MBOX_LOAD_RISC_RAM */
ISPOPMAP(0x00, 0x00), /* 0x0c: */

View File

@ -3458,42 +3458,52 @@ isp_mbox_acquire(ispsoftc_t *isp)
void
isp_mbox_wait_complete(ispsoftc_t *isp, mbreg_t *mbp)
{
int usecs = mbp->timeout;
int j;
unsigned int usecs = mbp->timeout;
unsigned int max, olim, ilim;
if (usecs == 0) {
usecs = MBCMD_DEFAULT_TIMEOUT;
}
if (isp->isp_mbxwrk0) {
usecs *= isp->isp_mbxwrk0;
}
max = isp->isp_mbxwrk0 + 1;
if (isp->isp_osinfo.mbox_sleep_ok) {
int ms = usecs / 1000;
unsigned int ms = (usecs + 999) / 1000;
isp->isp_osinfo.mbox_sleep_ok = 0;
isp->isp_osinfo.mbox_sleeping = 1;
for (olim = 0; olim < max; olim++) {
#if __FreeBSD_version < 500000 || !defined(ISP_SMPLOCK)
tsleep(&isp->isp_mbxworkp, PRIBIO, "ispmbx_sleep",
isp_mstohz(ms));
tsleep(&isp->isp_mbxworkp, PRIBIO, "ispmbx_sleep",
isp_mstohz(ms));
#else
msleep(&isp->isp_mbxworkp, &isp->isp_mtx, PRIBIO,
"ispmbx_sleep", isp_mstohz(ms));
msleep(&isp->isp_mbxworkp, &isp->isp_mtx, PRIBIO,
"ispmbx_sleep", isp_mstohz(ms));
#endif
isp->isp_osinfo.mbox_sleep_ok = 1;
isp->isp_osinfo.mbox_sleeping = 0;
} else {
for (j = 0; j < usecs; j += 100) {
uint32_t isr;
uint16_t sema, mbox;
if (isp->isp_osinfo.mboxcmd_done) {
break;
}
if (ISP_READ_ISR(isp, &isr, &sema, &mbox)) {
isp_intr(isp, isr, sema, mbox);
}
isp->isp_osinfo.mbox_sleep_ok = 1;
isp->isp_osinfo.mbox_sleeping = 0;
} else {
for (olim = 0; olim < max; olim++) {
for (ilim = 0; ilim < usecs; ilim += 100) {
uint32_t isr;
uint16_t sema, mbox;
if (isp->isp_osinfo.mboxcmd_done) {
break;
}
if (ISP_READ_ISR(isp, &isr, &sema, &mbox)) {
isp_intr(isp, isr, sema, mbox);
if (isp->isp_osinfo.mboxcmd_done) {
break;
}
}
USEC_DELAY(100);
}
if (isp->isp_osinfo.mboxcmd_done) {
break;
}
USEC_DELAY(100);
}
}
if (isp->isp_osinfo.mboxcmd_done == 0) {
@ -3524,12 +3534,16 @@ isp_mbox_release(ispsoftc_t *isp)
int
isp_mstohz(int ms)
{
int hz;
struct timeval t;
t.tv_sec = ms / 1000;
t.tv_usec = (ms % 1000) * 1000;
ms = tvtohz(&t);
if (ms < 0) {
ms = 0x7fffffff;
hz = tvtohz(&t);
if (hz < 0) {
hz = 0x7fffffff;
}
return (ms);
if (hz == 0) {
hz = 1;
}
return (hz);
}

View File

@ -42,7 +42,7 @@
#define MBOX_MAILBOX_REG_TEST 0x0006
#define MBOX_VERIFY_CHECKSUM 0x0007
#define MBOX_ABOUT_FIRMWARE 0x0008
/* 9 */
#define MBOX_LOAD_RISC_RAM_2100 0x0009
/* a */
#define MBOX_LOAD_RISC_RAM 0x000b
/* c */