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Try an experiment with using DMA to load firmware into a 2200- VERIFY
CHECKSUM fails. Oh well, but keep a couple of the changes. Avoid overflow in usec counters when waiting for mailbox completion.
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=165308
@ -6369,7 +6369,7 @@ static const uint32_t mbpfc[] = {
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ISPOPMAP(0xff, 0xff), /* 0x06: MBOX_MAILBOX_REG_TEST */
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ISPOPMAP(0x03, 0x07), /* 0x07: MBOX_VERIFY_CHECKSUM */
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ISPOPMAP(0x01, 0x4f), /* 0x08: MBOX_ABOUT_FIRMWARE */
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ISPOPMAP(0xdf, 0x01), /* 0x09: LOAD RAM */
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ISPOPMAP(0xdf, 0x01), /* 0x09: MBOX_LOAD_RISC_RAM_2100 */
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ISPOPMAP(0xdf, 0x01), /* 0x0a: DUMP RAM */
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ISPOPMAP(0x1ff, 0x01), /* 0x0b: MBOX_LOAD_RISC_RAM */
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ISPOPMAP(0x00, 0x00), /* 0x0c: */
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@ -3458,42 +3458,52 @@ isp_mbox_acquire(ispsoftc_t *isp)
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void
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isp_mbox_wait_complete(ispsoftc_t *isp, mbreg_t *mbp)
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{
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int usecs = mbp->timeout;
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int j;
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unsigned int usecs = mbp->timeout;
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unsigned int max, olim, ilim;
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if (usecs == 0) {
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usecs = MBCMD_DEFAULT_TIMEOUT;
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}
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if (isp->isp_mbxwrk0) {
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usecs *= isp->isp_mbxwrk0;
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}
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max = isp->isp_mbxwrk0 + 1;
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if (isp->isp_osinfo.mbox_sleep_ok) {
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int ms = usecs / 1000;
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unsigned int ms = (usecs + 999) / 1000;
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isp->isp_osinfo.mbox_sleep_ok = 0;
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isp->isp_osinfo.mbox_sleeping = 1;
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for (olim = 0; olim < max; olim++) {
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#if __FreeBSD_version < 500000 || !defined(ISP_SMPLOCK)
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tsleep(&isp->isp_mbxworkp, PRIBIO, "ispmbx_sleep",
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isp_mstohz(ms));
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tsleep(&isp->isp_mbxworkp, PRIBIO, "ispmbx_sleep",
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isp_mstohz(ms));
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#else
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msleep(&isp->isp_mbxworkp, &isp->isp_mtx, PRIBIO,
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"ispmbx_sleep", isp_mstohz(ms));
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msleep(&isp->isp_mbxworkp, &isp->isp_mtx, PRIBIO,
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"ispmbx_sleep", isp_mstohz(ms));
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#endif
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isp->isp_osinfo.mbox_sleep_ok = 1;
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isp->isp_osinfo.mbox_sleeping = 0;
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} else {
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for (j = 0; j < usecs; j += 100) {
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uint32_t isr;
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uint16_t sema, mbox;
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if (isp->isp_osinfo.mboxcmd_done) {
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break;
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}
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if (ISP_READ_ISR(isp, &isr, &sema, &mbox)) {
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isp_intr(isp, isr, sema, mbox);
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}
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isp->isp_osinfo.mbox_sleep_ok = 1;
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isp->isp_osinfo.mbox_sleeping = 0;
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} else {
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for (olim = 0; olim < max; olim++) {
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for (ilim = 0; ilim < usecs; ilim += 100) {
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uint32_t isr;
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uint16_t sema, mbox;
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if (isp->isp_osinfo.mboxcmd_done) {
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break;
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}
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if (ISP_READ_ISR(isp, &isr, &sema, &mbox)) {
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isp_intr(isp, isr, sema, mbox);
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if (isp->isp_osinfo.mboxcmd_done) {
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break;
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}
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}
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USEC_DELAY(100);
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}
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if (isp->isp_osinfo.mboxcmd_done) {
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break;
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}
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USEC_DELAY(100);
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}
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}
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if (isp->isp_osinfo.mboxcmd_done == 0) {
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@ -3524,12 +3534,16 @@ isp_mbox_release(ispsoftc_t *isp)
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int
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isp_mstohz(int ms)
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{
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int hz;
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struct timeval t;
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t.tv_sec = ms / 1000;
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t.tv_usec = (ms % 1000) * 1000;
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ms = tvtohz(&t);
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if (ms < 0) {
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ms = 0x7fffffff;
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hz = tvtohz(&t);
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if (hz < 0) {
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hz = 0x7fffffff;
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}
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return (ms);
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if (hz == 0) {
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hz = 1;
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}
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return (hz);
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}
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@ -42,7 +42,7 @@
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#define MBOX_MAILBOX_REG_TEST 0x0006
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#define MBOX_VERIFY_CHECKSUM 0x0007
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#define MBOX_ABOUT_FIRMWARE 0x0008
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/* 9 */
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#define MBOX_LOAD_RISC_RAM_2100 0x0009
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/* a */
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#define MBOX_LOAD_RISC_RAM 0x000b
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/* c */
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