mirror of
https://git.FreeBSD.org/src.git
synced 2025-01-18 15:30:21 +00:00
New AMD family ethernet driver. Should support BICC,NE2100, TNIC,
AT1500 and anything else that uses a Lance/PCnet type chip. Only been tested with the BICC so far though. Still work to do on performance and MULTICAST support needs to be added but it's basically working and I want the revision history from this point on
This commit is contained in:
Paul Richards
parent
ce1e23b99c
commit
a57c5abbd5
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=3317
1659
sys/dev/lnc/if_lnc.c
Normal file
1659
sys/dev/lnc/if_lnc.c
Normal file
File diff suppressed because it is too large
Load Diff
178
sys/dev/lnc/if_lncvar.h
Normal file
178
sys/dev/lnc/if_lncvar.h
Normal file
@ -0,0 +1,178 @@
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/*
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* Copyright (c) 1994, Paul Richards. This software may be used, modified,
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* copied, distributed, and sold, in both source and binary form provided
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* that the above copyright and these terms are retained. Under no
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* circumstances is the author responsible for the proper functioning
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||||||
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* of this software, nor does the author assume any responsibility
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* for damages incurred with its use.
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*
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*/
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#include "ic/Am7990.h"
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/*
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* Initialize multicast address hashing registers to accept
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* all multicasts (only used when in promiscuous mode)
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*/
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#if NBPFILTER > 0
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#define MULTI_INIT_ADDR 0xff
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#else
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#define MULTI_INIT_ADDR 0
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#endif
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#define NORMAL 0
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#define NRDRE 3
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#define NTDRE 3
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#define RECVBUFSIZE 1518 /* Packet size rounded to dword boundary */
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#define TRANSBUFSIZE 1518
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#define MBUF_CACHE_LIMIT 0
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#define MEM_SLEW 8
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/* BICC port addresses */
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#define BICC_IOSIZE 16
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#define BICC_RDP 0x0c /* Register Data Port */
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#define BICC_RAP 0x0e /* Register Address Port */
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/* NE2100 port addresses */
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#define NE2100_IOSIZE 24
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#define PCNET_RDP 0x10 /* Register Data Port */
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#define PCNET_RAP 0x12 /* Register Address Port */
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#define PCNET_RESET 0x14
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#define PCNET_IDP 0x16
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#define PCNET_VSW 0x18
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/* DEPCA port addresses */
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#define DEPCA_IOSIZE 16
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#define DEPCA_CTRL 0x00 /* NIC Control and status register */
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#define DEPCA_RDP 0x04 /* Register Data Port */
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#define DEPCA_RAP 0x06 /* Register Address Port */
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#define DEPCA_ADP 0x0c
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/* DEPCA specific defines */
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#define DEPCA_ADDR_ROM_SIZE 32
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/* Chip types */
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#define LANCE 1 /* Am7990 */
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#define C_LANCE 2 /* Am79C90 */
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#define PCnet_ISA 3 /* Am79C960 */
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#define PCnet_ISAplus 4 /* Am79C961 */
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#define PCnet_32 5 /* Am79C965 */
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#define PCnet_PCI 6 /* Am79C970 */
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/* CSR88-89: Chip ID masks */
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#define AMD_MASK 0x003
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#define PART_MASK 0xffff
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#define Am79C960 0x0003
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#define Am79C961 0x2260
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#define Am79C965 0x2430
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#define Am79C970 0x0242
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/* Board types */
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#define UNKNOWN 0
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#define BICC 1
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#define NE2100 2
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#define DEPCA 3
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/* mem_mode values */
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#define DMA_FIXED 1
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#define DMA_MBUF 2
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#define SHMEM 4
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#define MEM_MODES \
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"\20\3SHMEM\2DMA_MBUF\1DMA_FIXED"
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#define CSR0_FLAGS \
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"\20\20ERR\17BABL\16CERR\15MISS\14MERR\13RINT\12TINT\11IDON\
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\10INTR\07INEA\06RXON\05TXON\04TDMD\03STOP\02STRT\01INIT"
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#define INIT_MODE \
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"\20\20PROM\07INTL\06DRTY\05COLL\04DTCR\03LOOP\02DTX\01DRX"
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#define RECV_MD1 \
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"\20\10OWN\7ERR\6FRAM\5OFLO\4CRC\3BUFF\2STP\1ENP"
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#define TRANS_MD1 \
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"\20\10OWN\7ERR\6RES\5MORE\4ONE\3DEF\2STP\1ENP"
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#define TRANS_MD3 \
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"\20\6BUFF\5UFLO\4RES\3LCOL\2LCAR\1RTRY"
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char *nic_ident[] = {"Unknown",
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"BICC",
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"NE2100",
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"DEPCA"};
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char *ic_ident[] = {"Unknown",
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"LANCE, Am7990",
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"C-LANCE, Am79C90",
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"PCnet-ISA, Am79C960",
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"PCnet-ISA+, Am79C961",
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"PCnet-32, Am79C965",
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"PCnet-PCI, Am79C970"};
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struct nic_info {
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int ident; /* Type of card */
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int ic; /* Type of ic, Am7990, Am79C960 etc. */
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int mem_mode;
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int iobase;
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int mode; /* Mode setting at initialisation */
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};
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struct host_ring_entry {
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struct mds *md;
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union {
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struct mbuf *mbuf;
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char *data;
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}buff;
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};
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#ifdef LNC_KEEP_STATS
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#define LNCSTATS_STRUCT \
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struct lnc_stats { \
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int idon; \
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int rint; \
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int tint; \
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int cerr; \
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int babl; \
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int miss; \
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int merr; \
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int rxoff; \
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int txoff; \
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int terr; \
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int lcol; \
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int lcar; \
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int tbuff; \
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int def; \
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int more; \
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int one; \
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int uflo; \
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int rtry; \
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int rerr; \
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int fram; \
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int oflo; \
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int crc; \
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int rbuff; \
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int drop_packet; \
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int trans_ring_full; \
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} lnc_stats;
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#define LNCSTATS(X) ++(sc->lnc_stats.X);
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#else
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#define LNCSTATS_STRUCT
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#define LNCSTATS(X)
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#endif
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#define NDESC(len2) (1 << len2)
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#define INC_MD_PTR(ptr, no_entries) \
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if (++ptr >= NDESC(no_entries)) \
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ptr = 0;
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#define DEC_MD_PTR(ptr, no_entries) \
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if (--ptr < 0) \
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ptr = NDESC(no_entries) - 1;
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#define RECV_NEXT (sc->recv_ring->base + sc->recv_next)
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#define TRANS_NEXT (sc->trans_ring->base + sc->trans_next)
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1659
sys/i386/isa/if_lnc.c
Normal file
1659
sys/i386/isa/if_lnc.c
Normal file
File diff suppressed because it is too large
Load Diff
178
sys/i386/isa/if_lnc.h
Normal file
178
sys/i386/isa/if_lnc.h
Normal file
@ -0,0 +1,178 @@
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/*
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* Copyright (c) 1994, Paul Richards. This software may be used, modified,
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* copied, distributed, and sold, in both source and binary form provided
|
||||||
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* that the above copyright and these terms are retained. Under no
|
||||||
|
* circumstances is the author responsible for the proper functioning
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||||||
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* of this software, nor does the author assume any responsibility
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||||||
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* for damages incurred with its use.
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*
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*/
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#include "ic/Am7990.h"
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/*
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* Initialize multicast address hashing registers to accept
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* all multicasts (only used when in promiscuous mode)
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*/
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#if NBPFILTER > 0
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#define MULTI_INIT_ADDR 0xff
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#else
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#define MULTI_INIT_ADDR 0
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#endif
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#define NORMAL 0
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#define NRDRE 3
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#define NTDRE 3
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#define RECVBUFSIZE 1518 /* Packet size rounded to dword boundary */
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#define TRANSBUFSIZE 1518
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#define MBUF_CACHE_LIMIT 0
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#define MEM_SLEW 8
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/* BICC port addresses */
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#define BICC_IOSIZE 16
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#define BICC_RDP 0x0c /* Register Data Port */
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#define BICC_RAP 0x0e /* Register Address Port */
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/* NE2100 port addresses */
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#define NE2100_IOSIZE 24
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#define PCNET_RDP 0x10 /* Register Data Port */
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#define PCNET_RAP 0x12 /* Register Address Port */
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#define PCNET_RESET 0x14
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#define PCNET_IDP 0x16
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#define PCNET_VSW 0x18
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/* DEPCA port addresses */
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#define DEPCA_IOSIZE 16
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#define DEPCA_CTRL 0x00 /* NIC Control and status register */
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#define DEPCA_RDP 0x04 /* Register Data Port */
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#define DEPCA_RAP 0x06 /* Register Address Port */
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#define DEPCA_ADP 0x0c
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/* DEPCA specific defines */
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#define DEPCA_ADDR_ROM_SIZE 32
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/* Chip types */
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#define LANCE 1 /* Am7990 */
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#define C_LANCE 2 /* Am79C90 */
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#define PCnet_ISA 3 /* Am79C960 */
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#define PCnet_ISAplus 4 /* Am79C961 */
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#define PCnet_32 5 /* Am79C965 */
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#define PCnet_PCI 6 /* Am79C970 */
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/* CSR88-89: Chip ID masks */
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#define AMD_MASK 0x003
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#define PART_MASK 0xffff
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#define Am79C960 0x0003
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#define Am79C961 0x2260
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#define Am79C965 0x2430
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#define Am79C970 0x0242
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/* Board types */
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#define UNKNOWN 0
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#define BICC 1
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#define NE2100 2
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#define DEPCA 3
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/* mem_mode values */
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#define DMA_FIXED 1
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#define DMA_MBUF 2
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#define SHMEM 4
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#define MEM_MODES \
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"\20\3SHMEM\2DMA_MBUF\1DMA_FIXED"
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|
|
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#define CSR0_FLAGS \
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"\20\20ERR\17BABL\16CERR\15MISS\14MERR\13RINT\12TINT\11IDON\
|
||||||
|
\10INTR\07INEA\06RXON\05TXON\04TDMD\03STOP\02STRT\01INIT"
|
||||||
|
|
||||||
|
#define INIT_MODE \
|
||||||
|
"\20\20PROM\07INTL\06DRTY\05COLL\04DTCR\03LOOP\02DTX\01DRX"
|
||||||
|
|
||||||
|
#define RECV_MD1 \
|
||||||
|
"\20\10OWN\7ERR\6FRAM\5OFLO\4CRC\3BUFF\2STP\1ENP"
|
||||||
|
|
||||||
|
#define TRANS_MD1 \
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||||||
|
"\20\10OWN\7ERR\6RES\5MORE\4ONE\3DEF\2STP\1ENP"
|
||||||
|
|
||||||
|
#define TRANS_MD3 \
|
||||||
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"\20\6BUFF\5UFLO\4RES\3LCOL\2LCAR\1RTRY"
|
||||||
|
|
||||||
|
char *nic_ident[] = {"Unknown",
|
||||||
|
"BICC",
|
||||||
|
"NE2100",
|
||||||
|
"DEPCA"};
|
||||||
|
|
||||||
|
char *ic_ident[] = {"Unknown",
|
||||||
|
"LANCE, Am7990",
|
||||||
|
"C-LANCE, Am79C90",
|
||||||
|
"PCnet-ISA, Am79C960",
|
||||||
|
"PCnet-ISA+, Am79C961",
|
||||||
|
"PCnet-32, Am79C965",
|
||||||
|
"PCnet-PCI, Am79C970"};
|
||||||
|
|
||||||
|
struct nic_info {
|
||||||
|
int ident; /* Type of card */
|
||||||
|
int ic; /* Type of ic, Am7990, Am79C960 etc. */
|
||||||
|
int mem_mode;
|
||||||
|
int iobase;
|
||||||
|
int mode; /* Mode setting at initialisation */
|
||||||
|
};
|
||||||
|
|
||||||
|
struct host_ring_entry {
|
||||||
|
struct mds *md;
|
||||||
|
union {
|
||||||
|
struct mbuf *mbuf;
|
||||||
|
char *data;
|
||||||
|
}buff;
|
||||||
|
};
|
||||||
|
|
||||||
|
#ifdef LNC_KEEP_STATS
|
||||||
|
#define LNCSTATS_STRUCT \
|
||||||
|
struct lnc_stats { \
|
||||||
|
int idon; \
|
||||||
|
int rint; \
|
||||||
|
int tint; \
|
||||||
|
int cerr; \
|
||||||
|
int babl; \
|
||||||
|
int miss; \
|
||||||
|
int merr; \
|
||||||
|
int rxoff; \
|
||||||
|
int txoff; \
|
||||||
|
int terr; \
|
||||||
|
int lcol; \
|
||||||
|
int lcar; \
|
||||||
|
int tbuff; \
|
||||||
|
int def; \
|
||||||
|
int more; \
|
||||||
|
int one; \
|
||||||
|
int uflo; \
|
||||||
|
int rtry; \
|
||||||
|
int rerr; \
|
||||||
|
int fram; \
|
||||||
|
int oflo; \
|
||||||
|
int crc; \
|
||||||
|
int rbuff; \
|
||||||
|
int drop_packet; \
|
||||||
|
int trans_ring_full; \
|
||||||
|
} lnc_stats;
|
||||||
|
#define LNCSTATS(X) ++(sc->lnc_stats.X);
|
||||||
|
#else
|
||||||
|
#define LNCSTATS_STRUCT
|
||||||
|
#define LNCSTATS(X)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define NDESC(len2) (1 << len2)
|
||||||
|
|
||||||
|
#define INC_MD_PTR(ptr, no_entries) \
|
||||||
|
if (++ptr >= NDESC(no_entries)) \
|
||||||
|
ptr = 0;
|
||||||
|
|
||||||
|
#define DEC_MD_PTR(ptr, no_entries) \
|
||||||
|
if (--ptr < 0) \
|
||||||
|
ptr = NDESC(no_entries) - 1;
|
||||||
|
|
||||||
|
#define RECV_NEXT (sc->recv_ring->base + sc->recv_next)
|
||||||
|
#define TRANS_NEXT (sc->trans_ring->base + sc->trans_next)
|
||||||
555
sys/i386/isa/npx.c.orig
Normal file
555
sys/i386/isa/npx.c.orig
Normal file
@ -0,0 +1,555 @@
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|
/*-
|
||||||
|
* Copyright (c) 1990 William Jolitz.
|
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|
* Copyright (c) 1991 The Regents of the University of California.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
* 3. All advertising materials mentioning features or use of this software
|
||||||
|
* must display the following acknowledgement:
|
||||||
|
* This product includes software developed by the University of
|
||||||
|
* California, Berkeley and its contributors.
|
||||||
|
* 4. Neither the name of the University nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||||
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||||
|
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||||
|
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||||
|
* SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* from: @(#)npx.c 7.2 (Berkeley) 5/12/91
|
||||||
|
* $Id: npx.c,v 1.11 1994/09/09 23:12:32 wollman Exp $
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "npx.h"
|
||||||
|
#if NNPX > 0
|
||||||
|
|
||||||
|
#include <sys/param.h>
|
||||||
|
#include <sys/systm.h>
|
||||||
|
#include <sys/conf.h>
|
||||||
|
#include <sys/file.h>
|
||||||
|
#include <sys/proc.h>
|
||||||
|
#include <machine/cpu.h>
|
||||||
|
#include <machine/pcb.h>
|
||||||
|
#include <machine/trap.h>
|
||||||
|
#include <sys/ioctl.h>
|
||||||
|
#include <machine/specialreg.h>
|
||||||
|
#include <i386/isa/icu.h>
|
||||||
|
#include <i386/isa/isa_device.h>
|
||||||
|
#include <i386/isa/isa.h>
|
||||||
|
|
||||||
|
/*
|
||||||
|
* 387 and 287 Numeric Coprocessor Extension (NPX) Driver.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef __GNUC__
|
||||||
|
|
||||||
|
#define disable_intr() __asm("cli")
|
||||||
|
#define enable_intr() __asm("sti")
|
||||||
|
#define fldcw(addr) __asm("fldcw %0" : : "m" (*addr))
|
||||||
|
#define fnclex() __asm("fnclex")
|
||||||
|
#define fninit() __asm("fninit")
|
||||||
|
#define fnsave(addr) __asm("fnsave %0" : "=m" (*addr) : "0" (*addr))
|
||||||
|
#define fnstcw(addr) __asm("fnstcw %0" : "=m" (*addr) : "0" (*addr))
|
||||||
|
#define fnstsw(addr) __asm("fnstsw %0" : "=m" (*addr) : "0" (*addr))
|
||||||
|
#define fp_divide_by_0() __asm("fldz; fld1; fdiv %st,%st(1); fwait")
|
||||||
|
#define frstor(addr) __asm("frstor %0" : : "m" (*addr))
|
||||||
|
#define fwait() __asm("fwait")
|
||||||
|
#define read_eflags() ({u_long ef; \
|
||||||
|
__asm("pushf; popl %0" : "=a" (ef)); \
|
||||||
|
ef; })
|
||||||
|
#define start_emulating() __asm("smsw %%ax; orb %0,%%al; lmsw %%ax" \
|
||||||
|
: : "n" (CR0_TS) : "ax")
|
||||||
|
#define stop_emulating() __asm("clts")
|
||||||
|
#define write_eflags(ef) __asm("pushl %0; popf" : : "a" ((u_long) ef))
|
||||||
|
|
||||||
|
#else /* not __GNUC__ */
|
||||||
|
|
||||||
|
void disable_intr __P((void));
|
||||||
|
void enable_intr __P((void));
|
||||||
|
void fldcw __P((caddr_t addr));
|
||||||
|
void fnclex __P((void));
|
||||||
|
void fninit __P((void));
|
||||||
|
void fnsave __P((caddr_t addr));
|
||||||
|
void fnstcw __P((caddr_t addr));
|
||||||
|
void fnstsw __P((caddr_t addr));
|
||||||
|
void fp_divide_by_0 __P((void));
|
||||||
|
void frstor __P((caddr_t addr));
|
||||||
|
void fwait __P((void));
|
||||||
|
u_long read_eflags __P((void));
|
||||||
|
void start_emulating __P((void));
|
||||||
|
void stop_emulating __P((void));
|
||||||
|
void write_eflags __P((u_long ef));
|
||||||
|
|
||||||
|
#endif /* __GNUC__ */
|
||||||
|
|
||||||
|
typedef u_char bool_t;
|
||||||
|
|
||||||
|
extern struct gate_descriptor idt[];
|
||||||
|
|
||||||
|
int npxdna __P((void));
|
||||||
|
void npxexit __P((struct proc *p));
|
||||||
|
void npxinit __P((u_int control));
|
||||||
|
void npxintr __P((struct intrframe frame));
|
||||||
|
void npxsave __P((struct save87 *addr));
|
||||||
|
static int npxattach __P((struct isa_device *dvp));
|
||||||
|
static int npxprobe __P((struct isa_device *dvp));
|
||||||
|
static int npxprobe1 __P((struct isa_device *dvp));
|
||||||
|
|
||||||
|
struct isa_driver npxdriver = {
|
||||||
|
npxprobe, npxattach, "npx",
|
||||||
|
};
|
||||||
|
|
||||||
|
u_int npx0_imask;
|
||||||
|
struct proc *npxproc;
|
||||||
|
|
||||||
|
static bool_t npx_ex16;
|
||||||
|
static bool_t npx_exists;
|
||||||
|
int hw_float;
|
||||||
|
static struct gate_descriptor npx_idt_probeintr;
|
||||||
|
static int npx_intrno;
|
||||||
|
static volatile u_int npx_intrs_while_probing;
|
||||||
|
static bool_t npx_irq13;
|
||||||
|
static volatile u_int npx_traps_while_probing;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Special interrupt handlers. Someday intr0-intr15 will be used to count
|
||||||
|
* interrupts. We'll still need a special exception 16 handler. The busy
|
||||||
|
* latch stuff in probintr() can be moved to npxprobe().
|
||||||
|
*/
|
||||||
|
void probeintr(void);
|
||||||
|
asm
|
||||||
|
("
|
||||||
|
.text
|
||||||
|
_probeintr:
|
||||||
|
ss
|
||||||
|
incl _npx_intrs_while_probing
|
||||||
|
pushl %eax
|
||||||
|
movb $0x20,%al # EOI (asm in strings loses cpp features)
|
||||||
|
outb %al,$0xa0 # IO_ICU2
|
||||||
|
outb %al,$0x20 #IO_ICU1
|
||||||
|
movb $0,%al
|
||||||
|
outb %al,$0xf0 # clear BUSY# latch
|
||||||
|
popl %eax
|
||||||
|
iret
|
||||||
|
");
|
||||||
|
|
||||||
|
void probetrap(void);
|
||||||
|
asm
|
||||||
|
("
|
||||||
|
.text
|
||||||
|
_probetrap:
|
||||||
|
ss
|
||||||
|
incl _npx_traps_while_probing
|
||||||
|
fnclex
|
||||||
|
iret
|
||||||
|
");
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Probe routine. Initialize cr0 to give correct behaviour for [f]wait
|
||||||
|
* whether the device exists or not (XXX should be elsewhere). Set flags
|
||||||
|
* to tell npxattach() what to do. Modify device struct if npx doesn't
|
||||||
|
* need to use interrupts. Return 1 if device exists.
|
||||||
|
*/
|
||||||
|
static int
|
||||||
|
npxprobe(dvp)
|
||||||
|
struct isa_device *dvp;
|
||||||
|
{
|
||||||
|
int result;
|
||||||
|
u_long save_eflags;
|
||||||
|
u_char save_icu1_mask;
|
||||||
|
u_char save_icu2_mask;
|
||||||
|
struct gate_descriptor save_idt_npxintr;
|
||||||
|
struct gate_descriptor save_idt_npxtrap;
|
||||||
|
/*
|
||||||
|
* This routine is now just a wrapper for npxprobe1(), to install
|
||||||
|
* special npx interrupt and trap handlers, to enable npx interrupts
|
||||||
|
* and to disable other interrupts. Someday isa_configure() will
|
||||||
|
* install suitable handlers and run with interrupts enabled so we
|
||||||
|
* won't need to do so much here.
|
||||||
|
*/
|
||||||
|
npx_intrno = NRSVIDT + ffs(dvp->id_irq) - 1;
|
||||||
|
save_eflags = read_eflags();
|
||||||
|
disable_intr();
|
||||||
|
save_icu1_mask = inb(IO_ICU1 + 1);
|
||||||
|
save_icu2_mask = inb(IO_ICU2 + 1);
|
||||||
|
save_idt_npxintr = idt[npx_intrno];
|
||||||
|
save_idt_npxtrap = idt[16];
|
||||||
|
outb(IO_ICU1 + 1, ~(IRQ_SLAVE | dvp->id_irq));
|
||||||
|
outb(IO_ICU2 + 1, ~(dvp->id_irq >> 8));
|
||||||
|
setidt(16, probetrap, SDT_SYS386TGT, SEL_KPL);
|
||||||
|
setidt(npx_intrno, probeintr, SDT_SYS386IGT, SEL_KPL);
|
||||||
|
npx_idt_probeintr = idt[npx_intrno];
|
||||||
|
enable_intr();
|
||||||
|
result = npxprobe1(dvp);
|
||||||
|
disable_intr();
|
||||||
|
outb(IO_ICU1 + 1, save_icu1_mask);
|
||||||
|
outb(IO_ICU2 + 1, save_icu2_mask);
|
||||||
|
idt[npx_intrno] = save_idt_npxintr;
|
||||||
|
idt[16] = save_idt_npxtrap;
|
||||||
|
write_eflags(save_eflags);
|
||||||
|
return (result);
|
||||||
|
}
|
||||||
|
|
||||||
|
static int
|
||||||
|
npxprobe1(dvp)
|
||||||
|
struct isa_device *dvp;
|
||||||
|
{
|
||||||
|
int control;
|
||||||
|
int status;
|
||||||
|
#ifdef lint
|
||||||
|
npxintr();
|
||||||
|
#endif
|
||||||
|
/*
|
||||||
|
* Partially reset the coprocessor, if any. Some BIOS's don't reset
|
||||||
|
* it after a warm boot.
|
||||||
|
*/
|
||||||
|
outb(0xf1, 0); /* full reset on some systems, NOP on others */
|
||||||
|
outb(0xf0, 0); /* clear BUSY# latch */
|
||||||
|
/*
|
||||||
|
* Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
|
||||||
|
* instructions. We must set the CR0_MP bit and use the CR0_TS
|
||||||
|
* bit to control the trap, because setting the CR0_EM bit does
|
||||||
|
* not cause WAIT instructions to trap. It's important to trap
|
||||||
|
* WAIT instructions - otherwise the "wait" variants of no-wait
|
||||||
|
* control instructions would degenerate to the "no-wait" variants
|
||||||
|
* after FP context switches but work correctly otherwise. It's
|
||||||
|
* particularly important to trap WAITs when there is no NPX -
|
||||||
|
* otherwise the "wait" variants would always degenerate.
|
||||||
|
*
|
||||||
|
* Try setting CR0_NE to get correct error reporting on 486DX's.
|
||||||
|
* Setting it should fail or do nothing on lesser processors.
|
||||||
|
*/
|
||||||
|
load_cr0(rcr0() | CR0_MP | CR0_NE);
|
||||||
|
/*
|
||||||
|
* But don't trap while we're probing.
|
||||||
|
*/
|
||||||
|
stop_emulating();
|
||||||
|
/*
|
||||||
|
* Finish resetting the coprocessor, if any. If there is an error
|
||||||
|
* pending, then we may get a bogus IRQ13, but probeintr() will handle
|
||||||
|
* it OK. Bogus halts have never been observed, but we enabled
|
||||||
|
* IRQ13 and cleared the BUSY# latch early to handle them anyway.
|
||||||
|
*/
|
||||||
|
fninit();
|
||||||
|
DELAY(1000); /* wait for any IRQ13 (fwait might hang) */
|
||||||
|
#ifdef DIAGNOSTIC
|
||||||
|
if (npx_intrs_while_probing != 0)
|
||||||
|
printf("fninit caused %u bogus npx interrupt(s)\n",
|
||||||
|
npx_intrs_while_probing);
|
||||||
|
if (npx_traps_while_probing != 0)
|
||||||
|
printf("fninit caused %u bogus npx trap(s)\n",
|
||||||
|
npx_traps_while_probing);
|
||||||
|
#endif
|
||||||
|
/*
|
||||||
|
* Check for a status of mostly zero.
|
||||||
|
*/
|
||||||
|
status = 0x5a5a;
|
||||||
|
fnstsw(&status);
|
||||||
|
if ((status & 0xb8ff) == 0) {
|
||||||
|
/*
|
||||||
|
* Good, now check for a proper control word.
|
||||||
|
*/
|
||||||
|
control = 0x5a5a;
|
||||||
|
fnstcw(&control);
|
||||||
|
if ((control & 0x1f3f) == 0x033f) {
|
||||||
|
hw_float = npx_exists = 1;
|
||||||
|
/*
|
||||||
|
* We have an npx, now divide by 0 to see if exception
|
||||||
|
* 16 works.
|
||||||
|
*/
|
||||||
|
control &= ~(1 << 2); /* enable divide by 0 trap */
|
||||||
|
fldcw(&control);
|
||||||
|
npx_traps_while_probing = npx_intrs_while_probing = 0;
|
||||||
|
fp_divide_by_0();
|
||||||
|
if (npx_traps_while_probing != 0) {
|
||||||
|
/*
|
||||||
|
* Good, exception 16 works.
|
||||||
|
*/
|
||||||
|
npx_ex16 = 1;
|
||||||
|
dvp->id_irq = 0; /* zap the interrupt */
|
||||||
|
/*
|
||||||
|
* special return value to flag that we do not
|
||||||
|
* actually use any I/O registers
|
||||||
|
*/
|
||||||
|
return (-1);
|
||||||
|
}
|
||||||
|
if (npx_intrs_while_probing != 0) {
|
||||||
|
/*
|
||||||
|
* Bad, we are stuck with IRQ13.
|
||||||
|
*/
|
||||||
|
npx_irq13 = 1;
|
||||||
|
npx0_imask = dvp->id_irq; /* npxattach too late */
|
||||||
|
return (IO_NPXSIZE);
|
||||||
|
}
|
||||||
|
/*
|
||||||
|
* Worse, even IRQ13 is broken. Use emulator.
|
||||||
|
*/
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/*
|
||||||
|
* Probe failed, but we want to get to npxattach to initialize the
|
||||||
|
* emulator and say that it has been installed. XXX handle devices
|
||||||
|
* that aren't really devices better.
|
||||||
|
*/
|
||||||
|
dvp->id_irq = 0;
|
||||||
|
/*
|
||||||
|
* special return value to flag that we do not
|
||||||
|
* actually use any I/O registers
|
||||||
|
*/
|
||||||
|
return (-1);
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Attach routine - announce which it is, and wire into system
|
||||||
|
*/
|
||||||
|
int
|
||||||
|
npxattach(dvp)
|
||||||
|
struct isa_device *dvp;
|
||||||
|
{
|
||||||
|
if (!npx_ex16 && !npx_irq13) {
|
||||||
|
if (npx_exists) {
|
||||||
|
printf("npx%d: Error reporting broken, using 387 emulator\n",dvp->id_unit);
|
||||||
|
hw_float = npx_exists = 0;
|
||||||
|
} else {
|
||||||
|
printf("npx%d: 387 Emulator\n",dvp->id_unit);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
npxinit(__INITIAL_NPXCW__);
|
||||||
|
return (1); /* XXX unused */
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Initialize floating point unit.
|
||||||
|
*/
|
||||||
|
void
|
||||||
|
npxinit(control)
|
||||||
|
u_int control;
|
||||||
|
{
|
||||||
|
struct save87 dummy;
|
||||||
|
|
||||||
|
if (!npx_exists)
|
||||||
|
return;
|
||||||
|
/*
|
||||||
|
* fninit has the same h/w bugs as fnsave. Use the detoxified
|
||||||
|
* fnsave to throw away any junk in the fpu. fnsave initializes
|
||||||
|
* the fpu and sets npxproc = NULL as important side effects.
|
||||||
|
*/
|
||||||
|
npxsave(&dummy);
|
||||||
|
stop_emulating();
|
||||||
|
fldcw(&control);
|
||||||
|
if (curpcb != NULL)
|
||||||
|
fnsave(&curpcb->pcb_savefpu);
|
||||||
|
start_emulating();
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Free coprocessor (if we have it).
|
||||||
|
*/
|
||||||
|
void
|
||||||
|
npxexit(p)
|
||||||
|
struct proc *p;
|
||||||
|
{
|
||||||
|
|
||||||
|
if (p == npxproc) {
|
||||||
|
start_emulating();
|
||||||
|
npxproc = NULL;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Record the FPU state and reinitialize it all except for the control word.
|
||||||
|
* Then generate a SIGFPE.
|
||||||
|
*
|
||||||
|
* Reinitializing the state allows naive SIGFPE handlers to longjmp without
|
||||||
|
* doing any fixups.
|
||||||
|
*
|
||||||
|
* XXX there is currently no way to pass the full error state to signal
|
||||||
|
* handlers, and if this is a nested interrupt there is no way to pass even
|
||||||
|
* a status code! So there is no way to have a non-naive SIGFPE handler. At
|
||||||
|
* best a handler could do an fninit followed by an fldcw of a static value.
|
||||||
|
* fnclex would be of little use because it would leave junk on the FPU stack.
|
||||||
|
* Returning from the handler would be even less safe than usual because
|
||||||
|
* IRQ13 exception handling makes exceptions even less precise than usual.
|
||||||
|
*/
|
||||||
|
void
|
||||||
|
npxintr(frame)
|
||||||
|
struct intrframe frame;
|
||||||
|
{
|
||||||
|
int code;
|
||||||
|
|
||||||
|
if (npxproc == NULL || !npx_exists) {
|
||||||
|
/* XXX no %p in stand/printf.c. Cast to quiet gcc -Wall. */
|
||||||
|
printf("npxintr: npxproc = %lx, curproc = %lx, npx_exists = %d\n",
|
||||||
|
(u_long) npxproc, (u_long) curproc, npx_exists);
|
||||||
|
panic("npxintr from nowhere");
|
||||||
|
}
|
||||||
|
if (npxproc != curproc) {
|
||||||
|
printf("npxintr: npxproc = %lx, curproc = %lx, npx_exists = %d\n",
|
||||||
|
(u_long) npxproc, (u_long) curproc, npx_exists);
|
||||||
|
panic("npxintr from non-current process");
|
||||||
|
}
|
||||||
|
/*
|
||||||
|
* Save state. This does an implied fninit. It had better not halt
|
||||||
|
* the cpu or we'll hang.
|
||||||
|
*/
|
||||||
|
outb(0xf0, 0);
|
||||||
|
fnsave(&curpcb->pcb_savefpu);
|
||||||
|
fwait();
|
||||||
|
/*
|
||||||
|
* Restore control word (was clobbered by fnsave).
|
||||||
|
*/
|
||||||
|
fldcw(&curpcb->pcb_savefpu.sv_env.en_cw);
|
||||||
|
fwait();
|
||||||
|
/*
|
||||||
|
* Remember the exception status word and tag word. The current
|
||||||
|
* (almost fninit'ed) fpu state is in the fpu and the exception
|
||||||
|
* state just saved will soon be junk. However, the implied fninit
|
||||||
|
* doesn't change the error pointers or register contents, and we
|
||||||
|
* preserved the control word and will copy the status and tag
|
||||||
|
* words, so the complete exception state can be recovered.
|
||||||
|
*/
|
||||||
|
curpcb->pcb_savefpu.sv_ex_sw = curpcb->pcb_savefpu.sv_env.en_sw;
|
||||||
|
curpcb->pcb_savefpu.sv_ex_tw = curpcb->pcb_savefpu.sv_env.en_tw;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Pass exception to process.
|
||||||
|
*/
|
||||||
|
if (ISPL(frame.if_cs) == SEL_UPL) {
|
||||||
|
/*
|
||||||
|
* Interrupt is essentially a trap, so we can afford to call
|
||||||
|
* the SIGFPE handler (if any) as soon as the interrupt
|
||||||
|
* returns.
|
||||||
|
*
|
||||||
|
* XXX little or nothing is gained from this, and plenty is
|
||||||
|
* lost - the interrupt frame has to contain the trap frame
|
||||||
|
* (this is otherwise only necessary for the rescheduling trap
|
||||||
|
* in doreti, and the frame for that could easily be set up
|
||||||
|
* just before it is used).
|
||||||
|
*/
|
||||||
|
curproc->p_md.md_regs = (int *)&frame.if_es;
|
||||||
|
#ifdef notyet
|
||||||
|
/*
|
||||||
|
* Encode the appropriate code for detailed information on
|
||||||
|
* this exception.
|
||||||
|
*/
|
||||||
|
code = XXX_ENCODE(curpcb->pcb_savefpu.sv_ex_sw);
|
||||||
|
#else
|
||||||
|
code = 0; /* XXX */
|
||||||
|
#endif
|
||||||
|
trapsignal(curproc, SIGFPE, code);
|
||||||
|
} else {
|
||||||
|
/*
|
||||||
|
* Nested interrupt. These losers occur when:
|
||||||
|
* o an IRQ13 is bogusly generated at a bogus time, e.g.:
|
||||||
|
* o immediately after an fnsave or frstor of an
|
||||||
|
* error state.
|
||||||
|
* o a couple of 386 instructions after
|
||||||
|
* "fstpl _memvar" causes a stack overflow.
|
||||||
|
* These are especially nasty when combined with a
|
||||||
|
* trace trap.
|
||||||
|
* o an IRQ13 occurs at the same time as another higher-
|
||||||
|
* priority interrupt.
|
||||||
|
*
|
||||||
|
* Treat them like a true async interrupt.
|
||||||
|
*/
|
||||||
|
psignal(npxproc, SIGFPE);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Implement device not available (DNA) exception
|
||||||
|
*
|
||||||
|
* It would be better to switch FP context here (only). This would require
|
||||||
|
* saving the state in the proc table instead of in the pcb.
|
||||||
|
*/
|
||||||
|
int
|
||||||
|
npxdna()
|
||||||
|
{
|
||||||
|
if (!npx_exists)
|
||||||
|
return (0);
|
||||||
|
if (npxproc != NULL) {
|
||||||
|
printf("npxdna: npxproc = %lx, curproc = %lx\n",
|
||||||
|
(u_long) npxproc, (u_long) curproc);
|
||||||
|
panic("npxdna");
|
||||||
|
}
|
||||||
|
stop_emulating();
|
||||||
|
/*
|
||||||
|
* Record new context early in case frstor causes an IRQ13.
|
||||||
|
*/
|
||||||
|
npxproc = curproc;
|
||||||
|
/*
|
||||||
|
* The following frstor may cause an IRQ13 when the state being
|
||||||
|
* restored has a pending error. The error will appear to have been
|
||||||
|
* triggered by the current (npx) user instruction even when that
|
||||||
|
* instruction is a no-wait instruction that should not trigger an
|
||||||
|
* error (e.g., fnclex). On at least one 486 system all of the
|
||||||
|
* no-wait instructions are broken the same as frstor, so our
|
||||||
|
* treatment does not amplify the breakage. On at least one
|
||||||
|
* 386/Cyrix 387 system, fnclex works correctly while frstor and
|
||||||
|
* fnsave are broken, so our treatment breaks fnclex if it is the
|
||||||
|
* first FPU instruction after a context switch.
|
||||||
|
*/
|
||||||
|
frstor(&curpcb->pcb_savefpu);
|
||||||
|
|
||||||
|
return (1);
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Wrapper for fnsave instruction to handle h/w bugs. If there is an error
|
||||||
|
* pending, then fnsave generates a bogus IRQ13 on some systems. Force
|
||||||
|
* any IRQ13 to be handled immediately, and then ignore it. This routine is
|
||||||
|
* often called at splhigh so it must not use many system services. In
|
||||||
|
* particular, it's much easier to install a special handler than to
|
||||||
|
* guarantee that it's safe to use npxintr() and its supporting code.
|
||||||
|
*/
|
||||||
|
void
|
||||||
|
npxsave(addr)
|
||||||
|
struct save87 *addr;
|
||||||
|
{
|
||||||
|
u_char icu1_mask;
|
||||||
|
u_char icu2_mask;
|
||||||
|
u_char old_icu1_mask;
|
||||||
|
u_char old_icu2_mask;
|
||||||
|
struct gate_descriptor save_idt_npxintr;
|
||||||
|
|
||||||
|
disable_intr();
|
||||||
|
old_icu1_mask = inb(IO_ICU1 + 1);
|
||||||
|
old_icu2_mask = inb(IO_ICU2 + 1);
|
||||||
|
save_idt_npxintr = idt[npx_intrno];
|
||||||
|
outb(IO_ICU1 + 1, old_icu1_mask & ~(IRQ_SLAVE | npx0_imask));
|
||||||
|
outb(IO_ICU2 + 1, old_icu2_mask & ~(npx0_imask >> 8));
|
||||||
|
idt[npx_intrno] = npx_idt_probeintr;
|
||||||
|
enable_intr();
|
||||||
|
stop_emulating();
|
||||||
|
fnsave(addr);
|
||||||
|
fwait();
|
||||||
|
start_emulating();
|
||||||
|
npxproc = NULL;
|
||||||
|
disable_intr();
|
||||||
|
icu1_mask = inb(IO_ICU1 + 1); /* masks may have changed */
|
||||||
|
icu2_mask = inb(IO_ICU2 + 1);
|
||||||
|
outb(IO_ICU1 + 1,
|
||||||
|
(icu1_mask & ~npx0_imask) | (old_icu1_mask & npx0_imask));
|
||||||
|
outb(IO_ICU2 + 1,
|
||||||
|
(icu2_mask & ~(npx0_imask >> 8))
|
||||||
|
| (old_icu2_mask & (npx0_imask >> 8)));
|
||||||
|
idt[npx_intrno] = save_idt_npxintr;
|
||||||
|
enable_intr(); /* back to usual state */
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* NNPX > 0 */
|
||||||
Loading…
Reference in New Issue
Block a user