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Advance Systems SCSI Host Adapter driver for CAM. Currently only support

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the 8bit SCSI AdvanSys products.
This commit is contained in:
Justin T. Gibbs 1998-09-15 07:03:43 +00:00
parent c61d88e026
commit a5a2d1bfe9
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=39217
10 changed files with 3791 additions and 1065 deletions
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264
sys/dev/advansys/adv_isa.c
View File

@ -2,30 +2,34 @@
* Device probe and attach routines for the following
* Advanced Systems Inc. SCSI controllers:
*
* Connectivity Products:
* ABP5140 - Bus-Master PnP ISA 16 CDB
* Connectivity Products:
* ABP510/5150 - Bus-Master ISA (240 CDB) *
* ABP5140 - Bus-Master ISA PnP (16 CDB) * **
* ABP5142 - Bus-Master ISA PnP with floppy (16 CDB) ***
*
* Single Channel Products:
* ABP542 - Bus-Master ISA 240 CDB
* ABP5150 - Bus-Master ISA 240 CDB (shipped by HP with the 4020i CD-R drive)
* ABP842 - Bus-Master VL 240 CDB
* Single Channel Products:
* ABP542 - Bus-Master ISA with floppy (240 CDB)
* ABP842 - Bus-Master VL (240 CDB)
*
* Dual Channel Products:
* ABP852 - Dual Channel Bus-Master VL 240 CDB Per Channel
* Dual Channel Products:
* ABP852 - Dual Channel Bus-Master VL (240 CDB Per Channel)
*
* Copyright (c) 1996 Justin T. Gibbs.
* * This board has been shipped by HP with the 4020i CD-R drive.
* The board has no BIOS so it cannot control a boot device, but
* it can control any secondary SCSI device.
* ** This board has been sold by SIIG as the i540 SpeedMaster.
* *** This board has been sold by SIIG as the i542 SpeedMaster.
*
* Copyright (c) 1996, 1997 Justin T. Gibbs.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* notice, this list of conditions, and the following disclaimer,
* without modification, immediately at the beginning of the file.
* 2. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
@ -40,16 +44,22 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id$
* $Id: adv_isa.c,v 1.3 1997/02/22 09:35:51 peter Exp $
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/malloc.h>
#include <machine/bus_pio.h>
#include <machine/bus.h>
#include <i386/isa/isa.h>
#include <i386/isa/isa_device.h>
#include <i386/scsi/advansys.h>
#include <dev/advansys/advansys.h>
#include <cam/scsi/scsi_all.h>
#define ADV_ISA_MAX_DMA_ADDR (0x00FFFFFFL)
#define ADV_ISA_MAX_DMA_COUNT (0x00FFFFFFL)
@ -57,6 +67,14 @@
#define ADV_VL_MAX_DMA_ADDR (0x07FFFFFFL)
#define ADV_VL_MAX_DMA_COUNT (0x07FFFFFFL)
/*
* The overrun buffer shared amongst all ISA/VL adapters.
*/
static u_int8_t* overrun_buf;
bus_dma_tag_t overrun_dmat;
bus_dmamap_t overrun_dmamap;
bus_addr_t overrun_physbase;
/* Possible port addresses an ISA or VL adapter can live at */
u_int16_t adv_isa_ioports[] =
{
@ -73,14 +91,15 @@ u_int16_t adv_isa_ioports[] =
0x330 /* Eighth and default selection in BIOS setup */
};
#define MAX_ISA_IOPORT_INDEX (sizeof(adv_isa_ioports)/sizeof(u_short) - 1)
#define MAX_ISA_IOPORT_INDEX (sizeof(adv_isa_ioports)/sizeof(u_int16_t) - 1)
static int advisaprobe __P((struct isa_device *id));
static int advisaattach __P((struct isa_device *id));
static void adv_set_isapnp_wait_for_key __P((void));
static int adv_find_signature __P((u_int16_t iobase));
static int advisaprobe(struct isa_device *id);
static int advisaattach(struct isa_device *id);
static void adv_set_isapnp_wait_for_key(void);
static int adv_get_isa_dma_channel(struct adv_softc *adv);
static int adv_set_isa_dma_settings(struct adv_softc *adv);
void adv_isa_intr __P((int unit));
void adv_isa_intr(void *unit);
struct isa_driver advdriver =
{
@ -90,8 +109,7 @@ struct isa_driver advdriver =
};
static int
advisaprobe(id)
struct isa_device *id;
advisaprobe(struct isa_device *id)
{
int port_index;
int max_port_index;
@ -123,65 +141,173 @@ advisaprobe(id)
adv_set_isapnp_wait_for_key();
for (;port_index <= max_port_index; port_index++) {
u_int16_t port_addr = adv_isa_ioports[port_index];
bus_size_t maxsegsz;
bus_size_t maxsize;
bus_addr_t lowaddr;
int error;
if (port_addr == 0)
/* Already been attached */
continue;
if (adv_find_signature(port_addr)) {
if (adv_find_signature(I386_BUS_SPACE_IO, port_addr)) {
/*
* Got one. Now allocate our softc
* and see if we can initialize the card.
*/
struct adv_softc *adv;
adv = adv_alloc(id->id_unit, port_addr);
adv = adv_alloc(id->id_unit, I386_BUS_SPACE_IO,
port_addr);
if (adv == NULL)
return (0);
id->id_iobase = adv->iobase;
adv_unit++;
id->id_iobase = adv->bsh;
/*
* Stop the chip.
*/
ADV_OUTB(adv, ADV_CHIP_CTRL, ADV_CC_HALT);
ADV_OUTW(adv, ADV_CHIP_STATUS, 0);
/*
* Determine the chip version.
*/
adv->chip_version = ADV_INB(adv,
ADV_NONEISA_CHIP_REVISION);
if ((adv->chip_version >= ADV_CHIP_MIN_VER_VL)
&& (adv->chip_version <= ADV_CHIP_MAX_VER_VL)) {
adv->type = ADV_VL;
maxsegsz = ADV_VL_MAX_DMA_COUNT;
maxsize = BUS_SPACE_MAXSIZE_32BIT;
lowaddr = ADV_VL_MAX_DMA_ADDR;
id->id_drq = -1;
} else if ((adv->chip_version >= ADV_CHIP_MIN_VER_ISA)
&& (adv->chip_version <= ADV_CHIP_MAX_VER_ISA)) {
if (adv->chip_version >= ADV_CHIP_MIN_VER_ISA_PNP) {
adv->type = ADV_ISAPNP;
ADV_OUTB(adv, ADV_REG_IFC,
ADV_IFC_INIT_DEFAULT);
} else {
adv->type = ADV_ISA;
}
maxsegsz = ADV_ISA_MAX_DMA_COUNT;
maxsize = BUS_SPACE_MAXSIZE_24BIT;
lowaddr = ADV_ISA_MAX_DMA_ADDR;
adv->isa_dma_speed = ADV_DEF_ISA_DMA_SPEED;
adv->isa_dma_channel =
adv_get_isa_dma_channel(adv);
id->id_drq = adv->isa_dma_channel;
} else {
panic("advisaprobe: Unknown card revision\n");
}
/*
* Allocate a parent dmatag for all tags created
* by the MI portions of the advansys driver
*/
/* XXX Should be a child of the ISA bus dma tag */
error =
bus_dma_tag_create(/*parent*/NULL,
/*alignemnt*/0,
/*boundary*/0,
lowaddr,
/*highaddr*/BUS_SPACE_MAXADDR,
/*filter*/NULL,
/*filterarg*/NULL,
maxsize,
/*nsegs*/BUS_SPACE_UNRESTRICTED,
maxsegsz,
/*flags*/0,
&adv->parent_dmat);
if (error != 0) {
printf("%s: Could not allocate DMA tag - error %d\n",
adv_name(adv), error);
adv_free(adv);
return (0);
}
adv->init_level++;
if (overrun_buf == NULL) {
/* Need to allocate our overrun buffer */
if (bus_dma_tag_create(adv->parent_dmat,
/*alignment*/8,
/*boundary*/0,
ADV_ISA_MAX_DMA_ADDR,
BUS_SPACE_MAXADDR,
/*filter*/NULL,
/*filterarg*/NULL,
ADV_OVERRUN_BSIZE,
/*nsegments*/1,
BUS_SPACE_MAXSIZE_32BIT,
/*flags*/0,
&overrun_dmat) != 0) {
adv_free(adv);
return (0);
}
if (bus_dmamem_alloc(overrun_dmat,
(void **)&overrun_buf,
BUS_DMA_NOWAIT,
&overrun_dmamap) != 0) {
bus_dma_tag_destroy(overrun_dmat);
adv_free(adv);
return (0);
}
/* And permanently map it in */
bus_dmamap_load(overrun_dmat, overrun_dmamap,
overrun_buf, ADV_OVERRUN_BSIZE,
adv_map, &overrun_physbase,
/*flags*/0);
}
adv->overrun_physbase = overrun_physbase;
if (adv_init(adv) != 0) {
adv_free(adv);
return (0);
}
switch (adv->type) {
case ADV_ISAPNP:
if (adv->chip_version == ADV_CHIP_VER_ASYN_BUG)
adv->needs_async_bug_fix = TARGET_BIT_VECTOR_SET;
if (adv->chip_version == ADV_CHIP_VER_ASYN_BUG){
adv->bug_fix_control
|= ADV_BUG_FIX_ASYN_USE_SYN;
adv->fix_asyn_xfer = ~0;
}
/* Fall Through */
case ADV_ISA:
adv->max_dma_count = ADV_ISA_MAX_DMA_COUNT;
adv->max_dma_addr = ADV_ISA_MAX_DMA_ADDR;
adv_set_isa_dma_settings(adv);
break;
case ADV_VL:
adv->max_dma_count = ADV_VL_MAX_DMA_COUNT;
adv->max_dma_addr = ADV_VL_MAX_DMA_ADDR;
break;
default:
panic("advisaprobe: Invalid card type\n");
}
if ((adv->type & ADV_ISAPNP) == ADV_ISAPNP) {
}
/* Determine our IRQ */
if (id->id_irq == 0 /* irq ? */)
id->id_irq = 1 << adv_get_chip_irq(adv);
else
adv_set_chip_irq(adv, ffs(id->id_irq) - 1);
id->id_intr = adv_isa_intr;
/* Mark as probed */
adv_isa_ioports[port_index] = 0;
break;
return 1;
}
}
return 1;
return 0;
}
static int
advisaattach(id)
struct isa_device *id;
advisaattach(struct isa_device *id)
{
struct adv_softc *adv;
@ -189,6 +315,44 @@ advisaattach(id)
return (adv_attach(adv));
}
static int
adv_get_isa_dma_channel(struct adv_softc *adv)
{
int channel;
channel = ADV_INW(adv, ADV_CONFIG_LSW) & ADV_CFG_LSW_ISA_DMA_CHANNEL;
if (channel == 0x03)
return (0);
else if (channel == 0x00)
return (7);
return (channel + 4);
}
static int
adv_set_isa_dma_settings(struct adv_softc *adv)
{
u_int16_t cfg_lsw;
u_int8_t value;
if ((adv->isa_dma_channel >= 5) && (adv->isa_dma_channel <= 7)) {
if (adv->isa_dma_channel == 7)
value = 0x00;
else
value = adv->isa_dma_channel - 4;
cfg_lsw = ADV_INW(adv, ADV_CONFIG_LSW)
& ~ADV_CFG_LSW_ISA_DMA_CHANNEL;
cfg_lsw |= value;
ADV_OUTW(adv, ADV_CONFIG_LSW, cfg_lsw);
adv->isa_dma_speed &= 0x07;
adv_set_bank(adv, 1);
ADV_OUTB(adv, ADV_DMA_SPEED, adv->isa_dma_speed);
adv_set_bank(adv, 0);
isa_dmacascade(adv->isa_dma_channel);
}
return (0);
}
static void
adv_set_isapnp_wait_for_key(void)
{
@ -201,36 +365,14 @@ adv_set_isapnp_wait_for_key(void)
return;
}
/*
* Determine if there is a board at "iobase" by looking
* for the AdvanSys signatures. Return 1 if a board is
* found, 0 otherwise.
*/
static int
adv_find_signature(iobase)
u_int16_t iobase;
{
u_int16_t signature;
if (inb(iobase + ADV_SIGNATURE_BYTE) == ADV_1000_ID1B) {
signature = inw(iobase + ADV_SIGNATURE_WORD );
if ((signature == ADV_1000_ID0W)
|| (signature == ADV_1000_ID0W_FIX))
return (1);
}
return (0);
}
/*
* Handle an ISA interrupt.
* XXX should go away as soon as ISA interrupt handlers
* take a (void *) arg.
*/
void
adv_isa_intr(unit)
int unit;
adv_isa_intr(void *unit)
{
struct adv_softc *arg = advsoftcs[unit];
struct adv_softc *arg = advsoftcs[(int)unit];
adv_intr((void *)arg);
}

275
sys/dev/advansys/adv_pci.c Normal file
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@ -0,0 +1,275 @@
/*
* Device probe and attach routines for the following
* Advanced Systems Inc. SCSI controllers:
*
* Connectivity Products:
* ABP920 - Bus-Master PCI (16 CDB)
* ABP930 - Bus-Master PCI (16 CDB) *
* ABP930U - Bus-Master PCI Ultra (16 CDB)
* ABP930UA - Bus-Master PCI Ultra (16 CDB)
* ABP960 - Bus-Master PCI MAC/PC (16 CDB) **
* ABP960U - Bus-Master PCI MAC/PC Ultra (16 CDB)
*
* Single Channel Products:
* ABP940 - Bus-Master PCI (240 CDB)
* ABP940U - Bus-Master PCI Ultra (240 CDB)
* ABP970 - Bus-Master PCI MAC/PC (240 CDB)
* ABP970U - Bus-Master PCI MAC/PC Ultra (240 CDB)
*
* Dual Channel Products:
* ABP950 - Dual Channel Bus-Master PCI (240 CDB Per Channel)
*
* Footnotes:
* * This board has been sold by SIIG as the Fast SCSI Pro PCI.
* ** This board has been sold by Iomega as a Jaz Jet PCI adapter.
*
* Copyright (c) 1997 Justin Gibbs.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions, and the following disclaimer,
* without modification, immediately at the beginning of the file.
* 2. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id$
*/
#include <pci.h>
#if NPCI > 0
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <machine/bus_pio.h>
#include <machine/bus.h>
#include <pci/pcireg.h>
#include <pci/pcivar.h>
#include <dev/advansys/advansys.h>
#define PCI_BASEADR0 PCI_MAP_REG_START /* I/O Address */
#define PCI_BASEADR1 PCI_MAP_REG_START + 4 /* Mem I/O Address */
#define PCI_DEVICE_ID_ADVANSYS_1200A 0x110010CD
#define PCI_DEVICE_ID_ADVANSYS_1200B 0x120010CD
#define PCI_DEVICE_ID_ADVANSYS_ULTRA 0x130010CD
#define PCI_DEVICE_REV_ADVANSYS_3150 0x02
#define PCI_DEVICE_REV_ADVANSYS_3050 0x03
#define ADV_PCI_MAX_DMA_ADDR (0xFFFFFFFFL)
#define ADV_PCI_MAX_DMA_COUNT (0xFFFFFFFFL)
static char* advpciprobe(pcici_t tag, pcidi_t type);
static void advpciattach(pcici_t config_id, int unit);
/*
* The overrun buffer shared amongst all PCI adapters.
*/
static u_int8_t* overrun_buf;
bus_dma_tag_t overrun_dmat;
bus_dmamap_t overrun_dmamap;
bus_addr_t overrun_physbase;
static struct pci_device adv_pci_driver = {
"adv",
advpciprobe,
advpciattach,
&adv_unit,
NULL
};
DATA_SET (pcidevice_set, adv_pci_driver);
static char*
advpciprobe(pcici_t tag, pcidi_t type)
{
int rev = pci_conf_read(tag, PCI_CLASS_REG) & 0xff;
switch (type) {
case PCI_DEVICE_ID_ADVANSYS_1200A:
return ("AdvanSys ASC1200A SCSI controller");
case PCI_DEVICE_ID_ADVANSYS_1200B:
return ("AdvanSys ASC1200B SCSI controller");
case PCI_DEVICE_ID_ADVANSYS_ULTRA:
if (rev == PCI_DEVICE_REV_ADVANSYS_3150)
return ("AdvanSys ASC3150 Ultra SCSI controller");
else
return ("AdvanSys ASC3050 Ultra SCSI controller");
break;
default:
break;
}
return (NULL);
}
static void
advpciattach(pcici_t config_id, int unit)
{
u_int16_t io_port;
u_int16_t config_msw;
struct adv_softc *adv;
u_int32_t id;
u_int32_t command;
int error;
/*
* Determine the chip version.
*/
id = pci_cfgread(config_id, PCI_ID_REG, /*bytes*/4);
command = pci_cfgread(config_id, PCIR_COMMAND, /*bytes*/1);
/*
* These cards do not allow memory mapped accesses, so we must
* ensure that I/O accesses are available or we won't be able
* to talk to them.
*/
if ((command & (PCIM_CMD_PORTEN|PCIM_CMD_BUSMASTEREN))
!= (PCIM_CMD_PORTEN|PCIM_CMD_BUSMASTEREN)) {
command |= PCIM_CMD_PORTEN|PCIM_CMD_BUSMASTEREN;
pci_cfgwrite(config_id, PCIR_COMMAND, command, /*bytes*/1);
}
/*
* Early chips can't handle non-zero latency timer settings.
*/
if (id == PCI_DEVICE_ID_ADVANSYS_1200A
|| id == PCI_DEVICE_ID_ADVANSYS_1200B) {
pci_cfgwrite(config_id, PCIR_LATTIMER, /*value*/0, /*bytes*/1);
}
if (pci_map_port(config_id, PCI_BASEADR0, &io_port) == 0)
return;
if (adv_find_signature(I386_BUS_SPACE_IO, io_port) == 0)
return;
adv = adv_alloc(unit, I386_BUS_SPACE_IO, io_port);
if (adv == NULL)
return;
/* Allocate a dmatag for our transfer DMA maps */
/* XXX Should be a child of the PCI bus dma tag */
error = bus_dma_tag_create(/*parent*/NULL, /*alignment*/0,
/*boundary*/0,
/*lowaddr*/ADV_PCI_MAX_DMA_ADDR,
/*highaddr*/BUS_SPACE_MAXADDR,
/*filter*/NULL, /*filterarg*/NULL,
/*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
/*nsegments*/BUS_SPACE_UNRESTRICTED,
/*maxsegsz*/ADV_PCI_MAX_DMA_COUNT,
/*flags*/0,
&adv->parent_dmat);
if (error != 0) {
printf("%s: Could not allocate DMA tag - error %d\n",
adv_name(adv), error);
adv_free(adv);
return;
}
adv->init_level++;
if (overrun_buf == NULL) {
/* Need to allocate our overrun buffer */
if (bus_dma_tag_create(adv->parent_dmat,
/*alignment*/8, /*boundary*/0,
ADV_PCI_MAX_DMA_ADDR, BUS_SPACE_MAXADDR,
/*filter*/NULL, /*filterarg*/NULL,
ADV_OVERRUN_BSIZE, /*nsegments*/1,
BUS_SPACE_MAXSIZE_32BIT, /*flags*/0,
&overrun_dmat) != 0) {
bus_dma_tag_destroy(adv->parent_dmat);
adv_free(adv);
return;
}
if (bus_dmamem_alloc(overrun_dmat,
(void **)&overrun_buf,
BUS_DMA_NOWAIT,
&overrun_dmamap) != 0) {
bus_dma_tag_destroy(overrun_dmat);
bus_dma_tag_destroy(adv->parent_dmat);
adv_free(adv);
return;
}
/* And permanently map it in */
bus_dmamap_load(overrun_dmat, overrun_dmamap,
overrun_buf, ADV_OVERRUN_BSIZE,
adv_map, &overrun_physbase,
/*flags*/0);
}
adv->overrun_physbase = overrun_physbase;
/*
* Stop the chip.
*/
ADV_OUTB(adv, ADV_CHIP_CTRL, ADV_CC_HALT);
ADV_OUTW(adv, ADV_CHIP_STATUS, 0);
adv->chip_version = ADV_INB(adv, ADV_NONEISA_CHIP_REVISION);
adv->type = ADV_PCI;
/*
* Setup active negation and signal filtering.
*/
{
u_int8_t extra_cfg;
if (adv->chip_version >= ADV_CHIP_VER_PCI_ULTRA_3150)
adv->type |= ADV_ULTRA;
if (adv->chip_version == ADV_CHIP_VER_PCI_ULTRA_3150)
extra_cfg = ADV_IFC_ACT_NEG | ADV_IFC_SLEW_RATE;
else if (adv->chip_version == ADV_CHIP_VER_PCI_ULTRA_3050)
extra_cfg = ADV_IFC_ACT_NEG | ADV_IFC_WR_EN_FILTER;
else
extra_cfg = ADV_IFC_ACT_NEG | ADV_IFC_SLEW_RATE;
ADV_OUTB(adv, ADV_REG_IFC, extra_cfg);
}
if (adv_init(adv) != 0) {
adv_free(adv);
return;
}
adv->max_dma_count = ADV_PCI_MAX_DMA_COUNT;
adv->max_dma_addr = ADV_PCI_MAX_DMA_ADDR;
#if CC_DISABLE_PCI_PARITY_INT
config_msw = ADV_INW(adv, ADV_CONFIG_MSW);
config_msw &= 0xFFC0;
ADV_OUTW(adv, ADV_CONFIG_MSW, config_msw);
#endif
if (id == PCI_DEVICE_ID_ADVANSYS_1200A
|| id == PCI_DEVICE_ID_ADVANSYS_1200B) {
adv->bug_fix_control |= ADV_BUG_FIX_IF_NOT_DWB;
adv->bug_fix_control |= ADV_BUG_FIX_ASYN_USE_SYN;
adv->fix_asyn_xfer = ~0;
}
if ((pci_map_int(config_id, adv_intr, (void *)adv, &cam_imask)) == 0) {
adv_free(adv);
return;
}
adv_attach(adv);
}
#endif /* NPCI > 0 */

1281
sys/dev/advansys/advansys.c Normal file
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59
sys/dev/advansys/advansys.h Normal file
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@ -0,0 +1,59 @@
/*
* Generic driver definitions and exported functions for the Advanced
* Systems Inc. SCSI controllers
*
* Copyright (c) 1996-1997 Justin Gibbs.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions, and the following disclaimer,
* without modification, immediately at the beginning of the file.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
* All rights reserved.
*
* $Id: advansys.h,v 1.3 1997/02/22 09:38:38 peter Exp $
*/
#ifndef _ADVANSYS_H_
#define _ADVANSYS_H_
#include "adv.h"
#include <dev/advansys/advlib.h>
struct adv_softc * adv_alloc(int unit, bus_space_tag_t tag,
bus_space_handle_t bsh);
char * adv_name(struct adv_softc *adv);
void adv_map(void *arg, bus_dma_segment_t *segs,
int nseg, int error);
void adv_free(struct adv_softc *adv);
int adv_init(struct adv_softc *adv);
void adv_intr(void *arg);
int adv_attach(struct adv_softc *adv);
void adv_done(struct adv_softc *adv, union ccb* ccb,
u_int done_stat, u_int host_stat,
u_int scsi_stat, u_int q_no);
timeout_t adv_timeout;
extern struct adv_softc *advsoftcs[NADV]; /* XXX Config should handle this */
extern u_long adv_unit;
#endif /* _ADVANSYS_H_ */

1516
sys/dev/advansys/advlib.c
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File diff suppressed because it is too large Load Diff

560
sys/dev/advansys/advlib.h
View File

@ -2,15 +2,15 @@
* Definitions for low level routines and data structures
* for the Advanced Systems Inc. SCSI controllers chips.
*
* Copyright (c) 1996 Justin T. Gibbs.
* Copyright (c) 1996-1997 Justin T. Gibbs.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
* notice, this list of conditions, and the following disclaimer,
* without modification, immediately at the beginning of the file.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
@ -29,7 +29,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id$
* $Id: advlib.h,v 1.3 1997/02/22 09:28:47 peter Exp $
*/
/*
* Ported from:
@ -44,61 +44,70 @@
* modification.
*/
#ifndef _ADVLIB_H_
#define _ADVLIB_H_
#include <sys/queue.h>
struct cam_path;
typedef u_int8_t target_bit_vector;
#define TARGET_BIT_VECTOR_SET -1
#define ADV_SCSI_ID_BITS 3
#define ADV_MAX_TID 7
#define ADV_SCSI_ID_BITS 3
#define ADV_MAX_TID 7
#define ADV_MAX_LUN 7
/* Enumeration of board types */
typedef enum {
ADV_NONE = 0x000,
ADV_ISA = 0x001,
ADV_ISAPNP = 0x003,
ADV_VL = 0x004,
ADV_EISA = 0x008,
ADV_PCI = 0x010
}adv_btype;
ADV_ISA = 0x001,
ADV_ISAPNP = 0x003,
ADV_VL = 0x004,
ADV_EISA = 0x008,
ADV_PCI = 0x010,
ADV_MCA = 0x020,
ADV_PCMCIA = 0x040,
ADV_ULTRA = 0x100,
ADV_WIDE = 0x200,
ADV_WIDE32 = 0x400
} adv_btype;
typedef enum {
ADV_STATE_NONE = 0x000
}adv_state;
ADV_STATE_NONE = 0x00
} adv_state;
typedef enum {
ACCB_FREE = 0x00,
ACCB_ACTIVE = 0x01,
ACCB_ABORT_QUEUED = 0x02,
ACCB_RECOVERY_CCB = 0x04,
ACCB_RELEASE_SIMQ = 0x08
} adv_ccb_state;
struct adv_ccb_info {
adv_ccb_state state;
bus_dmamap_t dmamap;
SLIST_ENTRY(adv_ccb_info) links;
};
#define ccb_cinfo_ptr spriv_ptr0
#define ADV_SYN_XFER_NO 8
#define ADV_SYN_MAX_OFFSET 0x0F
#define ADV_DEF_SDTR_OFFSET 0x0F
#define ADV_DEF_SDTR_INDEX 0x00
#define ADV_OVERRUN_BSIZE 0x00000048
#define ADV_OVERRUN_BSIZE 0x00000040
#define ADV_MAX_CDB_LEN 12
#define ADV_MAX_SENSE_LEN 32
#define ADV_MIN_SENSE_LEN 14
#define ADV_TIDLUN_TO_IX(tid, lun) ((tid) | ((lun) << ADV_SCSI_ID_BITS) )
#define ADV_TID_TO_TARGET_ID(tid) (0x01 << (tid))
#define ADV_TIX_TO_TARGET_ID(tix) (0x01 << ((tix) & ADV_MAX_TID))
#define ADV_TID_TO_TARGET_MASK(tid) (0x01 << (tid))
#define ADV_TIX_TO_TARGET_MASK(tix) (0x01 << ((tix) & ADV_MAX_TID))
#define ADV_TIX_TO_TID(tix) ((tix) & ADV_MAX_TID)
#define ADV_TID_TO_TIX(tid) ((tid) & ADV_MAX_TID)
#define ADV_TIX_TO_LUN(tix) (((tix) >> ADV_SCSI_ID_BITS) & ADV_MAX_LUN )
#define ADV_INB(adv, offset) \
inb((adv)->iobase + (offset))
#define ADV_INW(adv, offset) \
inw((adv)->iobase + (offset))
#define ADV_INSB(adv, offset, valp, size) \
insb((adv)->iobase + (offset), (valp), (size))
#define ADV_INSW(adv, offset, valp, size) \
insw((adv)->iobase + (offset), (valp), (size))
#define ADV_INSL(adv, offset, valp, size) \
insl((adv)->iobase + (offset), (valp), (size))
#define ADV_OUTB(adv, offset, val) \
outb((adv)->iobase + (offset), (val))
#define ADV_OUTW(adv, offset, val) \
outw((adv)->iobase + (offset), (val))
#define ADV_OUTSB(adv, offset, valp, size) \
outsb((adv)->iobase + (offset), (valp), (size))
#define ADV_OUTSW(adv, offset, valp, size) \
outsw((adv)->iobase + (offset), (valp), (size))
#define ADV_OUTSL(adv, offset, valp, size) \
outsl((adv)->iobase + (offset), (valp), (size))
/*
* XXX
@ -108,53 +117,89 @@ typedef enum {
*/
#define ADV_ISA_PNP_PORT_ADDR (0x279)
#define ADV_ISA_PNP_PORT_WRITE (ADV_ISA_PNP_PORT_ADDR+0x800)
/*
* Board Signatures
*/
#define ADV_SIGNATURE_WORD 0x0000
#define ADV_1000_ID0W 0x04C1
#define ADV_1000_ID0W_FIX 0x00C1
#define ADV_SIGNATURE_WORD 0x0000
#define ADV_1000_ID0W 0x04C1
#define ADV_1000_ID0W_FIX 0x00C1
#define ADV_SIGNATURE_BYTE 0x0001
#define ADV_1000_ID1B 0x25
#define ADV_SIGNATURE_BYTE 0x0001
#define ADV_1000_ID1B 0x25
#define ADV_REG_IH 0x0002
#define ADV_INS_HALTINT 0x6281
#define ADV_INS_HALT 0x6280
#define ADV_INS_SINT 0x6200
#define ADV_INS_RFLAG_WTM 0x7380
#define ADV_CONFIG_LSW 0x0002
#define ADV_CFG_LSW_ISA_DMA_CHANNEL 0x0003
#define ADV_CFG_LSW_HOST_INT_ON 0x0020
#define ADV_CFG_LSW_BIOS_ON 0x0040
#define ADV_CFG_LSW_VERA_BURST_ON 0x0080
#define ADV_CFG_LSW_SCSI_PARITY_ON 0x0800
#define ADV_CFG_LSW_SCSIID 0x0700
#define ADV_CFG_LSW_SCSIID_SHIFT 8
#define ADV_CONFIG_SCSIID(cfg) ((cfg >> ADV_CFG_LSW_SCSIID_SHIFT) & ADV_MAX_TID)
/*
* Chip Revision Number
*/
#define ADV_NONEISA_CHIP_REVISION 0x0003
#define ADV_CHIP_MIN_VER_VL 0x01
#define ADV_CHIP_MAX_VER_VL 0x07
#define ADV_CHIP_MIN_VER_PCI 0x09
#define ADV_CHIP_MAX_VER_PCI 0x0F
#define ADV_CHIP_VER_PCI_BIT 0x08
#define ADV_CHIP_VER_PCI_ULTRA_3150 (ADV_CHIP_VER_PCI_BIT | 0x02)
#define ADV_CHIP_VER_PCI_ULTRA_3050 (ADV_CHIP_VER_PCI_BIT | 0x03)
#define ADV_CHIP_MIN_VER_ISA 0x11
#define ADV_CHIP_MIN_VER_ISA_PNP 0x21
#define ADV_CHIP_MAX_VER_ISA 0x27
#define ADV_CHIP_VER_ISA_BIT 0x30
#define ADV_CHIP_VER_ISAPNP_BIT 0x20
#define ADV_CHIP_VER_ASYN_BUG 0x21
#define ADV_CHIP_MIN_VER_EISA 0x41
#define ADV_CHIP_MAX_VER_EISA 0x47
#define ADV_CHIP_VER_EISA_BIT 0x40
#define ADV_HALTCODE_W 0x0040
#define ADV_STOP_CODE_B 0x0034
#define ADV_STOP_REQ_RISC_STOP 0x01
#define ADV_STOP_ACK_RISC_STOP 0x03
#define ADV_CONFIG_MSW 0x0004
#define ADV_CFG_MSW_SCSI_TARGET_ON 0x0080
#define ADV_CFG_MSW_LRAM_8BITS_ON 0x0800
#define ADV_CFG_MSW_CLR_MASK 0x30C0
#define ADV_CHIP_CTRL 0x000F
#define ADV_CC_CHIP_RESET 0x80
#define ADV_CC_SCSI_RESET 0x40
#define ADV_CC_HALT 0x20
#define ADV_CC_SINGLE_STEP 0x10
#define ADV_CC_TEST 0x04
#define ADV_CC_BANK_ONE 0x02
#define ADV_CC_DIAG 0x01
#define ADV_EEPROM_DATA 0x0006
#define ADV_EEPROM_CMD 0x0007
#define ADV_EEPROM_CMD_READ 0x80
#define ADV_EEPROM_CMD_WRITE 0x40
#define ADV_EEPROM_CMD_WRITE_ENABLE 0x30
#define ADV_EEPROM_CMD_WRITE_DISABLE 0x00
#define ADV_DMA_SPEED 0x0007
#define ADV_DEF_ISA_DMA_SPEED 4
#define ADV_REG_FLAG 0x0007
#define ADV_LRAM_DATA 0x0008
#define ADV_LRAM_ADDR 0x000A
#define ADV_SYN_OFFSET 0x000B
#define ADV_REG_PROG_COUNTER 0x000C
#define ADV_MCODE_START_ADDR 0x0080
#define ADV_REG_IFC 0x000D
#define ADV_IFC_REG_LOCK 0x00
#define ADV_IFC_REG_UNLOCK 0x09
#define ADV_IFC_WR_EN_FILTER 0x10
#define ADV_IFC_RD_NO_EEPROM 0x10
#define ADV_IFC_SLEW_RATE 0x20
#define ADV_IFC_ACT_NEG 0x40
#define ADV_IFC_INP_FILTER 0x80
#define ADV_IFC_INIT_DEFAULT (ADV_IFC_ACT_NEG | ADV_IFC_REG_UNLOCK)
#define ADV_CHIP_STATUS 0x000E
#define ADV_CSW_TEST1 0x8000
@ -184,38 +229,25 @@ typedef enum {
#define ADV_CIW_TEST2 0x0400
#define ADV_CIW_SEL_33MHZ 0x0800
#define ADV_CIW_IRQ_ACT 0x1000
#define ADV_CIW_CLR_SCSI_RESET_INT 0x1000
#define ADV_CHIP_CTRL 0x000F
#define ADV_CC_CHIP_RESET 0x80
#define ADV_CC_SCSI_RESET 0x40
#define ADV_CC_HALT 0x20
#define ADV_CC_SINGLE_STEP 0x10
#define ADV_CC_DMA_ENABLE 0x08
#define ADV_CC_TEST 0x04
#define ADV_CC_BANK_ONE 0x02
#define ADV_CC_DIAG 0x01
#define ADV_REG_IH 0x0002
#define ADV_INS_HALTINT 0x6281
#define ADV_INS_HALT 0x6280
#define ADV_INS_SINT 0x6200
#define ADV_INS_RFLAG_WTM 0x7380
#define ADV_REG_SC 0x0009
#define ADV_REG_PROG_COUNTER 0x000C
#define ADV_MCODE_START_ADDR 0x0080
#define ADV_CONFIG_LSW 0x0002
#define ADV_CFG_LSW_HOST_INT_ON 0x0020
#define ADV_CFG_LSW_BIOS_ON 0x0040
#define ADV_CFG_LSW_VERA_BURST_ON 0x0080
#define ADV_CFG_LSW_SCSI_PARITY_ON 0x0800
#define ADV_CONFIG_MSW 0x0004
#define ADV_CFG_MSW_SCSI_TARGET_ON 0x0080
#define ADV_CFG_MSW__LRAM_8BITS_ON 0x0800
#define ADV_CFG_MSW_CLR_MASK 0xF0C0
#define ADV_EEPROM_DATA 0x0006
#define ADV_EEPROM_CMD 0x0007
#define ADV_EEPROM_CMD_READ 0x80
#define ADV_EEPROM_CMD_WRITE 0x40
#define ADV_EEPROM_CMD_WRITE_ENABLE 0x30
#define ADV_EEPROM_CMD_WRITE_DISABLE 0x00
#define ADV_HALTCODE_W 0x0040
#define ADV_STOP_CODE_B 0x0034
#define ADV_STOP_REQ_RISC_STOP 0x01
#define ADV_STOP_ACK_RISC_STOP 0x03
#define ADV_STOP_CLEAN_UP_BUSY_Q 0x10
#define ADV_STOP_CLEAN_UP_DISC_Q 0x20
#define ADV_STOP_HOST_REQ_RISC_HALT 0x40
/*
* EEPROM routine constants
@ -249,10 +281,16 @@ struct adv_eeprom_config {
u_int8_t scsi_id_dma_speed;
#define EEPROM_SCSI_ID_MASK 0x0F
#define EEPROM_DMA_SPEED_MASK 0xF0
#define EEPROM_DMA_SPEED(ep) (((ep).scsi_id_dma_speed & EEPROM_DMA_SPEED_MASK) >> 8)
#define EEPROM_DMA_SPEED(ep) \
(((ep).scsi_id_dma_speed & EEPROM_DMA_SPEED_MASK) >> 4)
#define EEPROM_SET_DMA_SPEED(ep, speed) \
(ep).scsi_id_dma_speed &= ~EEPROM_DMA_SPEED_MASK; \
(ep).scsi_id_dma_speed |= \
(((speed) << 4) & EEPROM_DMA_SPEED_MASK)
#define EEPROM_SCSIID(ep) ((ep).scsi_id_dma_speed & EEPROM_SCSI_ID_MASK)
#define EEPROM_SET_SCSIID(ep, id) ((ep).scsi_id_dma_speed &= EEPROM_SCSI_ID_MASK; \
(ep).scsi_id_dma_speed |= ((id) & EEPROM_SCSI_ID_MASK))
#define EEPROM_SET_SCSIID(ep, id) \
(ep).scsi_id_dma_speed &= ~EEPROM_SCSI_ID_MASK; \
(ep).scsi_id_dma_speed |= ((id) & EEPROM_SCSI_ID_MASK)
/* XXX What about wide controllers??? */
u_int8_t sdtr_data[8];
u_int8_t adapter_info[6];
@ -262,6 +300,27 @@ struct adv_eeprom_config {
u_int16_t chksum;
};
/* Bank 1 */
#define ADV_SEQ_ACCUM 0x0000
#define ADV_QUEUE_ELEMENT_INDEX 0x0001
#define ADV_SEQ_INSTRUCTION_HOLD 0x0002
#define ADV_QUEUE_ELEMENT_POINTER 0x0003
#define ADV_HOST_DATA_FIFO_L 0x0004
#define ADV_HOST_SCSIID 0x0005
#define ADV_HOST_DATA_FIFO_H 0x0006
#define ADV_SCSI_CONTROL 0x0009
#define SC_SEL 0x80
#define SC_BSY 0x40
#define SC_ACK 0x20
#define SC_REQ 0x10
#define SC_ATN 0x08
#define SC_IO 0x04
#define SC_CD 0x02
#define SC_MSG 0x01
#define ADV_SCSIDATL 0x000B
#define ADV_DMA_TRANSFER_CNT 0x000C
#define ADV_DMA_TRANSFER_CNT1 0x000E
/*
* Instruction data and code segment addresses,
* and transaction address translation (queues).
@ -288,7 +347,7 @@ struct adv_eeprom_config {
#define ADV_MAX_SG_LIST (1 + ((ADV_SG_LIST_PER_Q) * (ADV_MAX_SG_QUEUE)))
#define ADV_MIN_REMAIN_Q 0x02
#define ADV_DEF_MAX_TOTAL_QNG 0x40
#define ADV_DEF_MAX_TOTAL_QNG 0xF0
#define ADV_MIN_TAG_Q_PER_DVC 0x04
#define ADV_DEF_TAG_Q_PER_DVC 0x04
#define ADV_MIN_FREE_Q ADV_MIN_REMAIN_Q
@ -296,6 +355,8 @@ struct adv_eeprom_config {
#define ADV_MAX_TOTAL_QNG 240
#define ADV_MAX_INRAM_TAG_QNG 16
#define ADV_MAX_PCI_INRAM_TOTAL_QNG 20
#define ADV_MAX_PCI_ULTRA_INRAM_TOTAL_QNG 16
#define ADV_MAX_PCI_ULTRA_INRAM_TAG_QNG 8
#define ADV_DEF_IRQ_NO 10
#define ADV_MAX_IRQ_NO 15
@ -304,25 +365,41 @@ struct adv_eeprom_config {
#define ADV_SCSIQ_CPY_BEG 4
#define ADV_SCSIQ_SGHD_CPY_BEG 2
/* SCSIQ Microcode representation offsets */
#define ADV_SCSIQ_B_FWD 0
#define ADV_SCSIQ_B_BWD 1
#define ADV_SCSIQ_B_STATUS 2
#define ADV_SCSIQ_B_QNO 3
#define ADV_SCSIQ_B_CNTL 4
#define ADV_SCSIQ_B_SG_QUEUE_CNT 5
#define ADV_LRAM_ADDR 0x000A
#define ADV_LRAM_DATA 0x0008
#define ADV_SYN_OFFSET 0x000B
#define ADV_SCSIQ_B_LIST_CNT 6
#define ADV_SCSIQ_B_CUR_LIST_CNT 7
#define ADV_SCSIQ_D_DATA_ADDR 8
#define ADV_SCSIQ_D_DATA_CNT 12
#define ADV_SCSIQ_B_SENSE_LEN 20
#define ADV_SCSIQ_DONE_INFO_BEG 22
#define ADV_SCSIQ_D_CCBPTR 22
#define ADV_SCSIQ_B_TARGET_IX 26
#define ADV_SCSIQ_B_CDB_LEN 28
#define ADV_SCSIQ_B_TAG_CODE 29
#define ADV_SCSIQ_W_VM_ID 30
#define ADV_SCSIQ_DONE_STATUS 32
#define ADV_SCSIQ_HOST_STATUS 33
#define ADV_SCSIQ_SCSI_STATUS 34
#define ADV_SCSIQ_CDB_BEG 36
#define ADV_SCSIQ_B_SG_WK_QP 49
#define ADV_SCSIQ_B_SG_WK_IX 50
#define ADV_SCSIQ_W_REQ_COUNT 52
#define ADV_SCSIQ_DW_REMAIN_XFER_ADDR 56
#define ADV_SCSIQ_DW_REMAIN_XFER_CNT 60
/* LRAM Offsets */
#define ADVV_MSGOUT_BEG 0x0000
#define ADVV_MSGOUT_SDTR_PERIOD (ADVV_MSGOUT_BEG+3)
#define ADVV_MSGOUT_SDTR_OFFSET (ADVV_MSGOUT_BEG+4)
#define ADVV_BREAK_SAVED_CODE 0x0006
#define ADVV_MSGIN_BEG (ADVV_MSGOUT_BEG+8)
#define ADVV_MSGIN_SDTR_PERIOD (ADVV_MSGIN_BEG+3)
#define ADVV_MSGIN_SDTR_OFFSET (ADVV_MSGIN_BEG+4)
@ -331,6 +408,11 @@ struct adv_eeprom_config {
#define ADVV_SDTR_DONE_BEG (ADVV_SDTR_DATA_BEG+8)
#define ADVV_MAX_DVC_QNG_BEG 0x0020
#define ADVV_BREAK_ADDR 0x0028
#define ADVV_BREAK_NOTIFY_COUNT 0x002A
#define ADVV_BREAK_CONTROL 0x002C
#define ADVV_BREAK_HIT_COUNT 0x002E
#define ADVV_ASCDVC_ERR_CODE_W 0x0030
#define ADVV_MCODE_CHKSUM_W 0x0032
#define ADVV_MCODE_SIZE_W 0x0034
@ -341,10 +423,12 @@ struct adv_eeprom_config {
#define ADVV_OVERRUN_BSIZE_D 0x003C
#define ADVV_HALTCODE_W 0x0040
#define ADV_HALT_EXTMSG_IN 0x8000
#define ADV_HALT_CHK_CONDITION 0x8100
#define ADV_HALT_SS_QUEUE_FULL 0x8200
#define ADV_HALT_SDTR_REJECTED 0x4000
#define ADV_HALT_EXTMSG_IN 0x8000
#define ADV_HALT_CHK_CONDITION 0x8100
#define ADV_HALT_SS_QUEUE_FULL 0x8200
#define ADV_HALT_DISABLE_ASYN_USE_SYN_FIX 0x8300
#define ADV_HALT_ENABLE_ASYN_USE_SYN_FIX 0x8400
#define ADV_HALT_SDTR_REJECTED 0x4000
#define ADVV_CHKSUM_W 0x0042
#define ADVV_MC_DATE_W 0x0044
@ -353,7 +437,7 @@ struct adv_eeprom_config {
#define ADVV_DONENEXT_B 0x0049
#define ADVV_USE_TAGGED_QNG_B 0x004A
#define ADVV_SCSIBUSY_B 0x004B
#define ADVV_CDBCNT_B 0x004C
#define ADVV_Q_DONE_IN_PROGRESS_B 0x004C
#define ADVV_CURCDB_B 0x004D
#define ADVV_RCLUN_B 0x004E
#define ADVV_BUSY_QHEAD_B 0x004F
@ -384,28 +468,48 @@ struct adv_eeprom_config {
#define ADV_RISC_FLAG_REQ_SG_LIST 0x02
#define ADVV_REQ_SG_LIST_QP 0x006B
#define ADV_TRANS_CUR 0x01 /* Modify current neogtiation status */
#define ADV_TRANS_ACTIVE 0x03 /* Assume this is the active target */
#define ADV_TRANS_GOAL 0x04 /* Modify negotiation goal */
#define ADV_TRANS_USER 0x08 /* Modify user negotiation settings */
struct adv_transinfo {
u_int8_t period;
u_int8_t offset;
};
struct adv_target_transinfo {
struct adv_transinfo current;
struct adv_transinfo goal;
struct adv_transinfo user;
};
struct adv_softc
{
/* The overrun buffer must be quad word aligned */
u_int8_t overrun_buf[ADV_OVERRUN_BSIZE];
int unit;
u_int32_t iobase;
bus_space_tag_t tag;
bus_space_handle_t bsh;
bus_dma_tag_t parent_dmat;
bus_dma_tag_t buffer_dmat;
bus_dma_tag_t sense_dmat;
bus_dmamap_t sense_dmamap;
struct scsi_sense_data *sense_buffers;
bus_addr_t sense_physbase;
bus_addr_t overrun_physbase;
adv_btype type;
target_bit_vector needs_async_bug_fix;
target_bit_vector initiate_sdtr;
target_bit_vector sdtr_done;
target_bit_vector cmd_qng_enabled;
target_bit_vector unit_not_ready;
target_bit_vector start_motor;
target_bit_vector no_scam;
struct adv_target_transinfo tinfo[8];
target_bit_vector fix_asyn_xfer;
target_bit_vector fix_asyn_xfer_always;
target_bit_vector disc_enable;
target_bit_vector user_disc_enable;
target_bit_vector cmd_qng_enabled;
target_bit_vector user_cmd_qng_enabled;
u_int16_t control;
#define ADV_CNTL_INITIATOR 0x0001
#define ADV_CNTL_BIOS_GT_1GB 0x0002
#define ADV_CNTL_BIOS_GT_2_DISK 0x0004
#define ADV_CNTL_BIOS_REMOVABLE 0x0008
#define ADV_CNTL_NO_SCAM 0x0010
#define ADV_CNTL_NO_PCI_FIX_ASYN_XFER 0x0020
#define ADV_CNTL_INT_MULTI_Q 0x0080
#define ADV_CNTL_NO_LUN_SUPPORT 0x0040
#define ADV_CNTL_NO_VERIFY_COPY 0x0100
@ -414,22 +518,31 @@ struct adv_softc
#define ADV_CNTL_INIT_VERBOSE 0x0800
#define ADV_CNTL_SCSI_PARITY 0x1000
#define ADV_CNTL_BURST_MODE 0x2000
#define ADV_CNTL_USE_8_IOP_BASE 0x4000
#define ADV_CNTL_SDTR_ENABLE_ULTRA 0x4000
u_int16_t bug_fix_control;
#define ADV_BUG_FIX_ADD_ONE_BYTE 0x0001
#define ADV_BUG_FIX_IF_NOT_DWB 0x0001
#define ADV_BUG_FIX_ASYN_USE_SYN 0x0002
adv_state state;
struct cam_path *path;
int unit;
int init_level;
u_int32_t max_dma_addr;
u_int32_t max_dma_count;
u_int8_t isa_dma_speed;
u_int8_t isa_dma_channel;
u_int8_t scsi_id;
u_int8_t chip_version;
u_int8_t max_tags_per_target;
u_int8_t max_openings;
u_int8_t cur_active;
u_int8_t openings_needed;
u_int8_t sdtr_data[16];
struct scsi_sense_data *sense_buffers;
u_int8_t *sdtr_period_tbl;
u_int8_t sdtr_period_tbl_size;
struct cam_sim *sim;
LIST_HEAD(, ccb_hdr) pending_ccbs;
SLIST_HEAD(, adv_ccb_info) free_ccb_infos;
};
/*
@ -479,11 +592,11 @@ struct adv_scsiq_1 {
* buffer.
*/
u_int8_t sense_len; /* length of sense buffer */
u_int8_t user_def;
u_int8_t extra_bytes;
};
struct adv_scsiq_2 {
u_int32_t xs_ptr; /* Pointer to our scsi_xfer */
u_int32_t ccb_ptr; /* Pointer to our CCB */
u_int8_t target_ix; /* Combined TID and LUN */
u_int8_t flag;
@ -495,8 +608,10 @@ struct adv_scsiq_2 {
* Tag type for this transaction
* (SIMPLE, ORDERED, HEAD )
*/
#define ADV_TAG_FLAG_ADD_ONE_BYTE 0x10
#define ADV_TAG_FLAG_ISAPNP_ADD_BYTES 0x40
#define ADV_TAG_FLAG_EXTRA_BYTES 0x10
#define ADV_TAG_FLAG_DISABLE_DISCONNECT 0x04
#define ADV_TAG_FLAG_DISABLE_ASYN_USE_SYN_FIX 0x08
#define ADV_TAG_FLAG_DISABLE_CHK_COND_INT_HOST 0x40
u_int16_t vm_id;
};
@ -535,6 +650,7 @@ struct adv_scsiq_3 {
#define QHSTA_M_BAD_TAG_CODE 0x46
#define QHSTA_M_BAD_QUEUE_FULL_OR_BUSY 0x47
#define QHSTA_M_HUNG_REQ_SCSI_BUS_RESET 0x48
#define QHSTA_D_LRAM_CMP_ERROR 0x81
@ -549,7 +665,7 @@ struct adv_scsiq_4 {
u_int8_t y_first_sg_list_qp;
u_int8_t y_working_sg_qp;
u_int8_t y_working_sg_ix;
u_int8_t y_cntl;
u_int8_t y_res;
u_int16_t x_req_count;
u_int16_t x_reconnect_rtn;
u_int32_t x_saved_data_addr;
@ -563,7 +679,7 @@ struct adv_q_done_info {
u_int8_t q_no;
u_int8_t cntl;
u_int8_t sense_len;
u_int8_t user_def;
u_int8_t extra_bytes;
u_int8_t res;
u_int32_t remain_bytes;
};
@ -574,53 +690,32 @@ struct adv_sg_entry {
};
struct adv_sg_head {
u_int8_t entry_cnt; /* Number of SG entries in this list */
u_int8_t queue_cnt; /*
* Number of queues required to store
* entry_cnt SG entries.
u_int16_t entry_cnt; /*
* Number of SG entries
* in this list
*/
u_int8_t entry_to_copy; /*
* Number of SG entries to copy to the
* board.
u_int16_t queue_cnt; /*
* Number of queues required
* to store entry_cnt
* SG entries.
*/
u_int8_t res;
struct adv_sg_entry sg_list[ADV_MAX_SG_LIST];
};
#define ADV_MIN_SG_LIST 2
struct adv_min_sg_head {
u_int8_t entry_cnt;
u_int8_t queue_cnt;
u_int8_t entry_to_copy;
u_int8_t res;
struct adv_sg_entry sg_list[ADV_MIN_SG_LIST];
u_int16_t entry_to_copy; /*
* Number of SG entries to
* copy to the board.
*/
u_int16_t res;
struct adv_sg_entry *sg_list;
};
#define QCX_SORT (0x0001)
#define QCX_COALEASE (0x0002)
#if CC_LINK_BUSY_Q
struct asc_ext_scsi_q {
u_int32_t lba;
u_int16_t lba_len;
struct adv_scsi_q *next;
struct adv_scsi_q *join;
u_int16_t cntl;
u_int16_t buffer_id;
u_int8_t q_required;
u_int8_t res;
};
#endif
struct adv_scsi_q {
struct adv_scsiq_1 q1;
struct adv_scsiq_2 q2;
struct scsi_generic *cdbptr; /*
u_int8_t *cdbptr; /*
* Pointer to the SCSI command
* to execute.
*/
@ -628,45 +723,14 @@ struct adv_scsi_q {
struct adv_sg_head *sg_head; /*
* Pointer to possible SG list
*/
#if CC_LINK_BUSY_Q
struct adv_ext_scsi_q ext;
#endif
};
#define ADV_SCSIQ_D_DATA_ADDR 8
#define ADV_SCSIQ_D_DATA_CNT 12
#define ADV_SCSIQ_B_SENSE_LEN 20
#define ADV_SCSIQ_DONE_INFO_BEG 22
#define ADV_SCSIQ_D_SRBPTR 22
#define ADV_SCSIQ_B_TARGET_IX 26
#define ADV_SCSIQ_B_CDB_LEN 28
#define ADV_SCSIQ_B_TAG_CODE 29
#define ADV_SCSIQ_W_VM_ID 30
#define ADV_SCSIQ_DONE_STATUS 32
#define ADV_SCSIQ_HOST_STATUS 33
#define ADV_SCSIQ_SCSI_STATUS 34
#define ADV_SCSIQ_CDB_BEG 36
#define ADV_SCSIQ_DW_REMAIN_XFER_ADDR 56
#define ADV_SCSIQ_DW_REMAIN_XFER_CNT 60
#define ADV_SCSIQ_B_SG_WK_QP 49
#define ADV_SCSIQ_B_SG_WK_IX 50
#define ADV_SCSIQ_W_REQ_COUNT 52
#define ADV_SCSIQ_B_LIST_CNT 6
#define ADV_SCSIQ_B_CUR_LIST_CNT 7
struct adv_scsi_req_q {
struct adv_scsiq_1 r1;
struct adv_scsiq_2 r2;
u_int8_t *cdbptr;
struct adv_sg_head *sg_head;
#if CC_LINK_BUSY_Q
struct adv_ext_scsi_q ext;
#endif
u_int8_t *sense_ptr;
struct adv_scsiq_3 r3;
u_int8_t cdb[ADV_MAX_CDB_LEN];
u_int8_t sense[ADV_MIN_SENSE_LEN];
@ -703,39 +767,99 @@ struct asc_risc_sg_list_q {
u_int8_t fwd;
u_int8_t bwd;
struct adv_sg_list_q sg;
struct adv_sg_entry sg_list[7];
struct adv_sg_entry sg_list[ADV_SG_LIST_PER_Q];
};
/* Chip Register functions */
void adv_set_bank(struct adv_softc *adv, u_int8_t bank);
/* LRAM routines */
u_int8_t adv_read_lram_8 __P((struct adv_softc *adv, u_int16_t addr));
void adv_write_lram_8 __P((struct adv_softc *adv, u_int16_t addr,
u_int8_t value));
u_int16_t adv_read_lram_16 __P((struct adv_softc *adv, u_int16_t addr));
void adv_write_lram_16 __P((struct adv_softc *adv, u_int16_t addr,
u_int16_t value));
u_int8_t adv_read_lram_8(struct adv_softc *adv, u_int16_t addr);
void adv_write_lram_8(struct adv_softc *adv, u_int16_t addr,
u_int8_t value);
u_int16_t adv_read_lram_16(struct adv_softc *adv, u_int16_t addr);
void adv_write_lram_16(struct adv_softc *adv, u_int16_t addr,
u_int16_t value);
/* Intialization */
void adv_get_board_type __P((struct adv_softc *adv));
u_int16_t adv_get_eeprom_config __P((struct adv_softc *adv,
struct adv_eeprom_config *eeprom_config));
int adv_set_eeprom_config __P((struct adv_softc *adv,
struct adv_eeprom_config *eeprom_config));
int adv_reset_chip_and_scsi_bus __P((struct adv_softc *adv));
int adv_test_external_lram __P((struct adv_softc* adv));
int adv_init_lram_and_mcode __P((struct adv_softc *adv));
u_int8_t adv_get_chip_irq __P((struct adv_softc *adv));
u_int8_t adv_set_chip_irq __P((struct adv_softc *adv, u_int8_t irq_no));
int adv_find_signature(bus_space_tag_t tag, bus_space_handle_t bsh);
void adv_lib_init(struct adv_softc *adv);
u_int16_t adv_get_eeprom_config(struct adv_softc *adv,
struct adv_eeprom_config *eeprom_config);
int adv_set_eeprom_config(struct adv_softc *adv,
struct adv_eeprom_config *eeprom_config);
int adv_reset_chip_and_scsi_bus(struct adv_softc *adv);
int adv_test_external_lram(struct adv_softc* adv);
int adv_init_lram_and_mcode(struct adv_softc *adv);
u_int8_t adv_get_chip_irq(struct adv_softc *adv);
u_int8_t adv_set_chip_irq(struct adv_softc *adv, u_int8_t irq_no);
void adv_set_chip_scsiid(struct adv_softc *adv, int new_id);
/* Queue handling and execution */
int adv_execute_scsi_queue __P((struct adv_softc *adv, struct adv_scsi_q *scsiq));
u_int8_t adv_copy_lram_doneq __P((struct adv_softc *adv, u_int16_t q_addr,
struct adv_q_done_info *scsiq, u_int32_t max_dma_count));
int adv_execute_scsi_queue(struct adv_softc *adv,
struct adv_scsi_q *scsiq,
u_int32_t datalen);
u_int8_t adv_copy_lram_doneq(struct adv_softc *adv, u_int16_t q_addr,
struct adv_q_done_info *scsiq, u_int32_t max_dma_count);
/* Chip Control */
int adv_stop_execution __P((struct adv_softc *adv));
int adv_is_chip_halted __P((struct adv_softc *adv));
int adv_start_chip(struct adv_softc *adv);
void adv_start_execution(struct adv_softc *adv);
int adv_stop_execution(struct adv_softc *adv);
int adv_is_chip_halted(struct adv_softc *adv);
/* Interrupt processing */
void adv_ack_interrupt __P((struct adv_softc *adv));
void adv_isr_chip_halted __P((struct adv_softc *adv));
void adv_ack_interrupt(struct adv_softc *adv);
void adv_isr_chip_halted(struct adv_softc *adv);
/* SDTR Conversion */
void adv_set_syncrate(struct adv_softc *adv, struct cam_path *path,
u_int target_id, u_int period, u_int offset,
u_int type);
void adv_sdtr_to_period_offset(struct adv_softc *adv,
u_int8_t sync_data, u_int8_t *period,
u_int8_t *offset, int tid);
u_int8_t adv_period_offset_to_sdtr(struct adv_softc *adv, u_int *period,
u_int *offset, int tid);
/* Error recovery */
int adv_abort_ccb(struct adv_softc *adv, int target, int lun,
union ccb *ccb, u_int32_t status, int queued_only);
int adv_reset_bus(struct adv_softc *adv);
/* Async event callback */
void advasync(void *callback_arg, u_int32_t code,
struct cam_path *path, void *arg);
#define ADV_INB(adv, offset) \
bus_space_read_1((adv)->tag, (adv)->bsh, offset)
#define ADV_INW(adv, offset) \
bus_space_read_2((adv)->tag, (adv)->bsh, offset)
#define ADV_INSB(adv, offset, valp, count) \
bus_space_read_multi_1((adv)->tag, (adv)->bsh, offset, valp, count)
/* These controllers seem to have problems with PIO on some fast processors */
static __inline void ADV_INSW(struct adv_softc *, u_int, u_int16_t *, u_int);
static __inline void
ADV_INSW(struct adv_softc *adv, u_int offset, u_int16_t *valp, u_int count)
{
while (count--)
*valp++ = bus_space_read_2(adv->tag, adv->bsh, offset);
}
#define ADV_OUTB(adv, offset, val) \
bus_space_write_1((adv)->tag, (adv)->bsh, offset, val)
#define ADV_OUTW(adv, offset, val) \
bus_space_write_2((adv)->tag, (adv)->bsh, offset, val)
/* These controllers seem to have problems with PIO on some fast processors */
static __inline void ADV_OUTSW(struct adv_softc *, u_int, u_int16_t *, u_int);
static __inline void
ADV_OUTSW(struct adv_softc *adv, u_int offset, u_int16_t *valp, u_int count)
{
while (count--)
bus_space_write_2(adv->tag, adv->bsh, offset, *valp++);
}
#endif /* _ADVLIB_H_ */

358
sys/dev/advansys/advmcode.c
View File

@ -1,14 +1,14 @@
/*
* Downloadable microcode for Advanced Systems Inc. SCSI controllers
*
* $Id$
* $Id: advmcode.c,v 1.3 1997/02/22 09:28:48 peter Exp $
*
* Obtained from:
* advansys.c - Linux Host Driver for AdvanSys SCSI Adapters
*
* Copyright (c) 1995-1996 Advanced System Products, Inc.
*
* Copyright (c) 1995-1997 Advanced System Products, Inc.
* All Rights Reserved.
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that redistributions of source
* code retain the above copyright notice and this comment without
@ -20,147 +20,215 @@
u_int8_t adv_mcode[] =
{
0x01, 0x03, 0x01, 0x19, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0xDD, 0x0A, 0x01, 0x05, 0x01, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0xFF, 0x80, 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x23, 0x00, 0x16, 0x00, 0x00, 0x00, 0x07, 0x00, 0xFF, 0x00, 0x00, 0x00, 0x00,
0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA4, 0x88, 0x00, 0x00, 0x00, 0x00,
0x80, 0x73, 0x48, 0x04, 0x36, 0x00, 0x00, 0xA2, 0xC8, 0x00, 0x80, 0x73, 0x03, 0x23, 0x36, 0x40,
0xB6, 0x00, 0x36, 0x00, 0x06, 0xD6, 0x0D, 0xD2, 0x15, 0xDE, 0x12, 0xDA, 0x00, 0xA2, 0xC8, 0x00,
0x92, 0x80, 0xE0, 0x97, 0x50, 0x00, 0xF5, 0x00, 0x0A, 0x98, 0xDF, 0x23, 0x36, 0x60, 0xB6, 0x00,
0x92, 0x80, 0x4F, 0x00, 0xF5, 0x00, 0x0A, 0x98, 0xEF, 0x23, 0x36, 0x60, 0xB6, 0x00, 0x92, 0x80,
0x80, 0x62, 0x92, 0x80, 0x00, 0x62, 0x92, 0x80, 0x00, 0x46, 0x17, 0xEE, 0x13, 0xEA, 0x02, 0x01,
0x09, 0xD8, 0xCD, 0x04, 0x4D, 0x00, 0x00, 0xA3, 0xDC, 0x00, 0x68, 0x97, 0x7F, 0x23, 0x04, 0x61,
0x84, 0x01, 0xB2, 0x84, 0xCF, 0xC1, 0x80, 0x73, 0xCD, 0x04, 0x4D, 0x00, 0x00, 0xA3, 0xE8, 0x01,
0x68, 0x97, 0xD4, 0x81, 0x00, 0x33, 0x02, 0x00, 0x82, 0x88, 0x80, 0x73, 0x80, 0x77, 0x00, 0x01,
0x01, 0xA1, 0x08, 0x01, 0x4F, 0x00, 0x46, 0x97, 0x07, 0xA6, 0x12, 0x01, 0x00, 0x33, 0x03, 0x00,
0x82, 0x88, 0x03, 0x03, 0x03, 0xDE, 0x00, 0x33, 0x05, 0x00, 0x82, 0x88, 0xCE, 0x00, 0x69, 0x60,
0xCE, 0x00, 0x02, 0x03, 0x4A, 0x60, 0x00, 0xA2, 0x86, 0x01, 0x80, 0x63, 0x07, 0xA6, 0x32, 0x01,
0x86, 0x81, 0x03, 0x03, 0x80, 0x63, 0xE2, 0x00, 0x07, 0xA6, 0x42, 0x01, 0x00, 0x33, 0x04, 0x00,
0x82, 0x88, 0x03, 0x07, 0x02, 0x01, 0x04, 0xCA, 0x0D, 0x23, 0x2A, 0x98, 0x4D, 0x04, 0xD0, 0x84,
0x05, 0xD8, 0x0D, 0x23, 0x2A, 0x98, 0xCD, 0x04, 0x15, 0x23, 0xB8, 0x88, 0xFB, 0x23, 0x02, 0x61,
0x82, 0x01, 0x80, 0x63, 0x02, 0x03, 0x06, 0xA3, 0x70, 0x01, 0x00, 0x33, 0x0A, 0x00, 0x82, 0x88,
0x4E, 0x00, 0x07, 0xA3, 0x7C, 0x01, 0x00, 0x33, 0x0B, 0x00, 0x82, 0x88, 0xCD, 0x04, 0x36, 0x2D,
0x00, 0x33, 0x1A, 0x00, 0x82, 0x88, 0x50, 0x04, 0x96, 0x81, 0x06, 0xAB, 0x90, 0x01, 0x96, 0x81,
0x4E, 0x00, 0x07, 0xA3, 0xA0, 0x01, 0x50, 0x00, 0x00, 0xA3, 0x4A, 0x01, 0x00, 0x05, 0x8A, 0x81,
0x08, 0x97, 0x02, 0x01, 0x05, 0xC6, 0x04, 0x23, 0xA0, 0x01, 0x15, 0x23, 0xA1, 0x01, 0xCC, 0x81,
0xFD, 0x23, 0x02, 0x61, 0x82, 0x01, 0x0A, 0xDA, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA0, 0xC2, 0x01,
0x80, 0x63, 0xCD, 0x04, 0x36, 0x2D, 0x00, 0x33, 0x1B, 0x00, 0x82, 0x88, 0x06, 0x23, 0x2A, 0x98,
0xCD, 0x04, 0xB2, 0x84, 0x06, 0x01, 0x00, 0xA2, 0xE2, 0x01, 0x57, 0x60, 0x00, 0xA0, 0xE8, 0x01,
0xB2, 0x84, 0x80, 0x23, 0xA0, 0x01, 0xB2, 0x84, 0x80, 0x73, 0x4B, 0x00, 0x06, 0x61, 0x00, 0xA2,
0x10, 0x02, 0x04, 0x01, 0x0D, 0xDE, 0x02, 0x01, 0x03, 0xCC, 0x4F, 0x00, 0x46, 0x97, 0x0A, 0x82,
0x08, 0x23, 0x02, 0x41, 0x82, 0x01, 0x4F, 0x00, 0x24, 0x97, 0x48, 0x04, 0xFF, 0x23, 0x84, 0x80,
0xB2, 0x97, 0x00, 0x46, 0x56, 0x00, 0x03, 0xC0, 0x01, 0x23, 0xE8, 0x00, 0x81, 0x73, 0x06, 0x29,
0x03, 0x42, 0x06, 0xE2, 0x03, 0xEE, 0x66, 0xEB, 0x11, 0x23, 0xB8, 0x88, 0xC6, 0x97, 0xFA, 0x80,
0x80, 0x73, 0x80, 0x77, 0x06, 0xA6, 0x3E, 0x02, 0x00, 0x33, 0x31, 0x00, 0x82, 0x88, 0x04, 0x01,
0x03, 0xD8, 0x74, 0x98, 0x02, 0x96, 0x50, 0x82, 0xA2, 0x95, 0x80, 0x67, 0x83, 0x03, 0x80, 0x63,
0xB6, 0x2D, 0x02, 0xA6, 0x7A, 0x02, 0x07, 0xA6, 0x68, 0x02, 0x06, 0xA6, 0x6C, 0x02, 0x03, 0xA6,
0x70, 0x02, 0x00, 0x33, 0x10, 0x00, 0x82, 0x88, 0x4A, 0x95, 0x52, 0x82, 0xF8, 0x95, 0x52, 0x82,
0x04, 0x23, 0xA0, 0x01, 0x14, 0x23, 0xA1, 0x01, 0x16, 0x84, 0x04, 0x01, 0x0C, 0xDC, 0xE0, 0x23,
0x25, 0x61, 0xEF, 0x00, 0x14, 0x01, 0x4F, 0x04, 0xA8, 0x01, 0x6F, 0x00, 0xA5, 0x01, 0x03, 0x23,
0xA4, 0x01, 0x06, 0x23, 0x9C, 0x01, 0x24, 0x2B, 0x1C, 0x01, 0x02, 0xA6, 0xAC, 0x02, 0x07, 0xA6,
0x68, 0x02, 0x06, 0xA6, 0x6C, 0x02, 0x00, 0x33, 0x12, 0x00, 0x82, 0x88, 0x00, 0x0E, 0x80, 0x63,
0x00, 0x43, 0x00, 0xA0, 0x9A, 0x02, 0x4D, 0x04, 0x04, 0x01, 0x0B, 0xDC, 0xE7, 0x23, 0x04, 0x61,
0x84, 0x01, 0x10, 0x31, 0x12, 0x35, 0x14, 0x01, 0xEC, 0x00, 0x6C, 0x38, 0x00, 0x3F, 0x00, 0x00,
0xEC, 0x82, 0x18, 0x23, 0x04, 0x61, 0x18, 0xA0, 0xE4, 0x02, 0x04, 0x01, 0x8E, 0xC8, 0x00, 0x33,
0x1F, 0x00, 0x82, 0x88, 0x08, 0x31, 0x0A, 0x35, 0x0C, 0x39, 0x0E, 0x3D, 0x40, 0x98, 0xB6, 0x2D,
0x01, 0xA6, 0x0E, 0x03, 0x00, 0xA6, 0x1C, 0x03, 0x07, 0xA6, 0x2A, 0x03, 0x06, 0xA6, 0x2E, 0x03,
0x03, 0xA6, 0xFA, 0x03, 0x02, 0xA6, 0x7A, 0x02, 0x00, 0x33, 0x33, 0x00, 0x82, 0x88, 0x08, 0x23,
0xB3, 0x01, 0x04, 0x01, 0x0E, 0xD0, 0x00, 0x33, 0x14, 0x00, 0x82, 0x88, 0x10, 0x23, 0xB3, 0x01,
0x04, 0x01, 0x07, 0xCC, 0x00, 0x33, 0x15, 0x00, 0x82, 0x88, 0x4A, 0x95, 0xF0, 0x82, 0xF8, 0x95,
0xF0, 0x82, 0x44, 0x98, 0x80, 0x42, 0x40, 0x98, 0x48, 0xE4, 0x04, 0x01, 0x29, 0xC8, 0x31, 0x05,
0x07, 0x01, 0x00, 0xA2, 0x72, 0x03, 0x00, 0x43, 0x87, 0x01, 0x05, 0x05, 0x48, 0x98, 0x40, 0x98,
0x00, 0xA6, 0x34, 0x03, 0x07, 0xA6, 0x6A, 0x03, 0x03, 0xA6, 0x16, 0x04, 0x06, 0xA6, 0x6E, 0x03,
0x01, 0xA6, 0x34, 0x03, 0x00, 0x33, 0x25, 0x00, 0x82, 0x88, 0x4A, 0x95, 0x50, 0x83, 0xF8, 0x95,
0x50, 0x83, 0x04, 0x01, 0x0C, 0xCE, 0x03, 0xC8, 0x00, 0x33, 0x42, 0x00, 0x82, 0x88, 0x00, 0x01,
0x05, 0x05, 0xFF, 0xA2, 0x90, 0x03, 0xB1, 0x01, 0x08, 0x23, 0xB2, 0x01, 0x4C, 0x83, 0x05, 0x05,
0x01, 0xA6, 0x9A, 0x03, 0x00, 0xA6, 0xAA, 0x03, 0xF0, 0x83, 0x68, 0x98, 0x80, 0x42, 0x01, 0xA6,
0x9A, 0x03, 0xBA, 0x83, 0x00, 0x33, 0x2F, 0x00, 0x82, 0x88, 0x68, 0x98, 0x80, 0x42, 0x00, 0xA6,
0xAA, 0x03, 0xBA, 0x83, 0x00, 0x33, 0x26, 0x00, 0x82, 0x88, 0x38, 0x2B, 0x80, 0x32, 0x80, 0x36,
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0xC0, 0x20, 0x81, 0x62, 0x10, 0x82, 0x43, 0x23, 0xB8, 0x88, 0x04, 0x23, 0xA0, 0x01, 0x44, 0x23,
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0xFF, 0x23, 0x84, 0x80, 0x02, 0x01, 0x03, 0xDA, 0x80, 0x23, 0x82, 0x01, 0x02, 0x85, 0x02, 0x23,
0xA0, 0x01, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x0E, 0x05, 0x1D, 0x01, 0x04, 0xD6, 0xFF, 0x23,
0x86, 0x41, 0x4B, 0x60, 0xCB, 0x00, 0xFF, 0x23, 0x80, 0x01, 0x49, 0x00, 0x81, 0x01, 0x04, 0x01,
0x02, 0xC8, 0x30, 0x01, 0x80, 0x01, 0xF7, 0x04, 0x03, 0x01, 0x49, 0x04, 0x80, 0x01, 0xC9, 0x00,
0x00, 0x05, 0x00, 0x01, 0xFF, 0xA0, 0x2E, 0x05, 0x77, 0x04, 0x01, 0x23, 0xEA, 0x00, 0x5D, 0x00,
0xFE, 0xC7, 0x00, 0x62, 0x00, 0x23, 0xEA, 0x00, 0x00, 0x63, 0x07, 0xA4, 0xA0, 0x05, 0x03, 0x03,
0x02, 0xA0, 0x5C, 0x05, 0x9C, 0x85, 0x00, 0x33, 0x2D, 0x00, 0x82, 0x88, 0x04, 0xA0, 0x82, 0x05,
0x80, 0x63, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x6E, 0x05, 0x1D, 0x01, 0x06, 0xD6, 0x02, 0x23,
0x02, 0x41, 0x82, 0x01, 0x50, 0x00, 0x24, 0x97, 0xD0, 0x84, 0x04, 0x23, 0x02, 0x41, 0x82, 0x01,
0xD0, 0x84, 0x08, 0xA0, 0x88, 0x05, 0x9C, 0x85, 0x03, 0xA0, 0x8E, 0x05, 0x9C, 0x85, 0x01, 0xA0,
0x9A, 0x05, 0x88, 0x00, 0x80, 0x63, 0x78, 0x96, 0x4A, 0x85, 0x88, 0x86, 0x80, 0x63, 0x4A, 0x85,
0x00, 0x63, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA2, 0xDE, 0x05, 0x1D, 0x01, 0x18, 0xD4, 0xC0, 0x23,
0x07, 0x41, 0x83, 0x03, 0x80, 0x63, 0x06, 0xA6, 0xC0, 0x05, 0x00, 0x33, 0x37, 0x00, 0x82, 0x88,
0x1D, 0x01, 0x02, 0xD6, 0x46, 0x23, 0xB8, 0x88, 0x63, 0x60, 0x83, 0x03, 0x80, 0x63, 0x06, 0xA6,
0xD8, 0x05, 0x00, 0x33, 0x38, 0x00, 0x82, 0x88, 0xEF, 0x04, 0x6F, 0x00, 0x00, 0x63, 0x4B, 0x00,
0x06, 0x41, 0xCB, 0x00, 0x52, 0x00, 0x06, 0x61, 0x00, 0xA2, 0xF2, 0x05, 0xC0, 0x23, 0x07, 0x41,
0x00, 0x63, 0x80, 0x23, 0x07, 0x41, 0x00, 0x63, 0x80, 0x67, 0x08, 0x23, 0x83, 0x03, 0x80, 0x63,
0x00, 0x63, 0x06, 0xA6, 0x14, 0x06, 0x07, 0xA6, 0x64, 0x06, 0x02, 0xA6, 0xBC, 0x06, 0x00, 0x33,
0x39, 0x00, 0x82, 0x88, 0x00, 0x00, 0x01, 0xA0, 0xD6, 0x06, 0xA2, 0x95, 0x83, 0x03, 0x80, 0x63,
0x06, 0xA6, 0x28, 0x06, 0x07, 0xA6, 0x64, 0x06, 0x00, 0x00, 0x00, 0x2B, 0x40, 0x0E, 0x80, 0x63,
0x01, 0x00, 0x06, 0xA6, 0x40, 0x06, 0x07, 0xA6, 0x64, 0x06, 0x00, 0x33, 0x3A, 0x00, 0x82, 0x88,
0x40, 0x0E, 0x80, 0x63, 0x00, 0x43, 0x00, 0xA0, 0x32, 0x06, 0x06, 0xA6, 0x58, 0x06, 0x07, 0xA6,
0x64, 0x06, 0x00, 0x33, 0x3B, 0x00, 0x82, 0x88, 0x80, 0x67, 0x40, 0x0E, 0x80, 0x63, 0x07, 0xA6,
0x64, 0x06, 0x00, 0x63, 0x03, 0x03, 0x80, 0x63, 0x88, 0x00, 0x01, 0xA2, 0x78, 0x06, 0x07, 0xA2,
0xBC, 0x06, 0x00, 0x33, 0x35, 0x00, 0x82, 0x88, 0x07, 0xA6, 0x82, 0x06, 0x00, 0x33, 0x2A, 0x00,
0x82, 0x88, 0x03, 0x03, 0x03, 0xA2, 0x8E, 0x06, 0x07, 0x23, 0x80, 0x00, 0xC8, 0x86, 0x80, 0x63,
0x89, 0x00, 0x0A, 0x2B, 0x07, 0xA6, 0x9E, 0x06, 0x00, 0x33, 0x29, 0x00, 0x82, 0x88, 0x00, 0x43,
0x00, 0xA2, 0xAA, 0x06, 0xC0, 0x0E, 0x80, 0x63, 0x94, 0x86, 0xC0, 0x0E, 0x00, 0x33, 0x00, 0x80,
0xC0, 0x20, 0x81, 0x62, 0x04, 0x01, 0x08, 0xDA, 0x80, 0x63, 0x00, 0x63, 0x80, 0x67, 0x00, 0x33,
0x00, 0x40, 0xC0, 0x20, 0x81, 0x62, 0x00, 0x63, 0x80, 0x7B, 0x80, 0x63, 0x06, 0xA6, 0x20, 0x06,
0x00, 0x33, 0x2C, 0x00, 0x82, 0x88, 0x0C, 0xA2, 0xF0, 0x06, 0xA2, 0x95, 0x83, 0x03, 0x80, 0x63,
0x06, 0xA6, 0xEE, 0x06, 0x07, 0xA6, 0x64, 0x06, 0x00, 0x33, 0x3D, 0x00, 0x82, 0x88, 0x00, 0x00,
0x80, 0x67, 0x83, 0x03, 0x80, 0x63, 0x0C, 0xA0, 0x06, 0x07, 0x07, 0xA6, 0x64, 0x06, 0xBF, 0x23,
0x04, 0x61, 0x84, 0x01, 0xB2, 0x84, 0x00, 0x63, 0xF0, 0x04, 0x01, 0x01, 0xF1, 0x00, 0x00, 0x01,
0xF2, 0x00, 0x01, 0x05, 0x80, 0x01, 0x72, 0x04, 0x71, 0x00, 0x81, 0x01, 0x70, 0x04, 0x80, 0x05,
0x81, 0x05, 0x00, 0x63, 0xF0, 0x04, 0xF2, 0x00, 0x72, 0x04, 0x01, 0x01, 0xF1, 0x00, 0x70, 0x00,
0x81, 0x01, 0x70, 0x04, 0x71, 0x00, 0x81, 0x01, 0x72, 0x00, 0x80, 0x01, 0x71, 0x04, 0x70, 0x00,
0x80, 0x01, 0x70, 0x04, 0x00, 0x63, 0xF0, 0x04, 0xF2, 0x00, 0x72, 0x04, 0x00, 0x01, 0xF1, 0x00,
0x70, 0x00, 0x80, 0x01, 0x70, 0x04, 0x71, 0x00, 0x80, 0x01, 0x72, 0x00, 0x81, 0x01, 0x71, 0x04,
0x70, 0x00, 0x81, 0x01, 0x70, 0x04, 0x00, 0x63, 0x00, 0x23, 0xB3, 0x01, 0x83, 0x05, 0xA3, 0x01,
0xA2, 0x01, 0xA1, 0x01, 0x01, 0x23, 0xA0, 0x01, 0x00, 0x01, 0xC8, 0x00, 0x03, 0xA1, 0x86, 0x07,
0x00, 0x33, 0x07, 0x00, 0x82, 0x88, 0x80, 0x05, 0x81, 0x05, 0x04, 0x01, 0x11, 0xC8, 0x48, 0x00,
0xB0, 0x01, 0xB1, 0x01, 0x08, 0x23, 0xB2, 0x01, 0x05, 0x01, 0x48, 0x04, 0x00, 0x43, 0x00, 0xA2,
0xA6, 0x07, 0x00, 0x05, 0x9C, 0x87, 0x00, 0x01, 0xC8, 0x00, 0xFF, 0x23, 0x80, 0x01, 0x05, 0x05,
0x00, 0x63, 0xF7, 0x04, 0x1A, 0x09, 0xF6, 0x08, 0x6E, 0x04, 0x00, 0x02, 0x80, 0x43, 0x76, 0x08,
0x80, 0x02, 0x77, 0x04, 0x00, 0x63, 0xF7, 0x04, 0x1A, 0x09, 0xF6, 0x08, 0x6E, 0x04, 0x00, 0x02,
0x00, 0xA0, 0xD6, 0x07, 0xD8, 0x87, 0x00, 0x43, 0x76, 0x08, 0x80, 0x02, 0x77, 0x04, 0x00, 0x63,
0xF3, 0x04, 0x00, 0x23, 0xF4, 0x00, 0x74, 0x00, 0x80, 0x43, 0xF4, 0x00, 0xCF, 0x40, 0x00, 0xA2,
0x06, 0x08, 0x74, 0x04, 0x02, 0x01, 0xF7, 0xC9, 0xF6, 0xD9, 0x00, 0x01, 0x01, 0xA1, 0xE6, 0x07,
0xC6, 0x97, 0xF4, 0x94, 0xE6, 0x87, 0x73, 0x04, 0x00, 0x63, 0xF3, 0x04, 0x75, 0x04, 0x1C, 0x88,
0x02, 0x01, 0x04, 0xD8, 0x08, 0x97, 0xC6, 0x97, 0xF4, 0x94, 0x0C, 0x88, 0x75, 0x00, 0x00, 0xA3,
0x26, 0x08, 0x00, 0x05, 0x10, 0x88, 0x73, 0x04, 0x00, 0x63, 0x80, 0x7B, 0x80, 0x63, 0x06, 0xA6,
0x38, 0x08, 0x00, 0x33, 0x3E, 0x00, 0x82, 0x88, 0x80, 0x67, 0x83, 0x03, 0x80, 0x63, 0x00, 0x63,
0x38, 0x2B, 0x5E, 0x88, 0x38, 0x2B, 0x54, 0x88, 0x32, 0x09, 0x31, 0x05, 0x54, 0x98, 0x05, 0x05,
0xB2, 0x09, 0x00, 0x63, 0x00, 0x32, 0x00, 0x36, 0x00, 0x3A, 0x00, 0x3E, 0x00, 0x63, 0x80, 0x32,
0x80, 0x36, 0x80, 0x3A, 0x80, 0x3E, 0x00, 0x63, 0x38, 0x2B, 0x40, 0x32, 0x40, 0x36, 0x40, 0x3A,
0x40, 0x3E, 0x00, 0x63, 0x5A, 0x20, 0xC9, 0x40, 0x00, 0xA0, 0x74, 0x08, 0x5D, 0x00, 0xFE, 0xC3,
0x00, 0x63, 0x80, 0x73, 0xE6, 0x20, 0x02, 0x23, 0xE8, 0x00, 0x82, 0x73, 0xFF, 0xFD, 0x80, 0x73,
0x13, 0x23, 0xB8, 0x88, 0x66, 0x20, 0xC0, 0x20, 0x04, 0x23, 0xA0, 0x01, 0xA1, 0x23, 0xA1, 0x01,
0x81, 0x62, 0xA2, 0x88, 0x80, 0x73, 0x80, 0x77, 0x68, 0x00, 0x00, 0xA2, 0x80, 0x00, 0x03, 0xC2,
0xF1, 0xC7, 0x41, 0x23, 0xB8, 0x88, 0x11, 0x23, 0xA1, 0x01, 0x04, 0x23, 0xA0, 0x01, 0xB2, 0x84,
0x01, 0x03, 0x01, 0x19, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F,
0x0F, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x79, 0x0D, 0x09, 0x05, 0x01, 0x00, 0x00, 0x00, 0x00,
0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x80, 0xFF, 0xFF,
0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x23, 0x00, 0x22, 0x00, 0x00, 0x00, 0x07, 0x00, 0xFF, 0x00, 0x00,
0x00, 0x00, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0xCC, 0x88, 0x00, 0x00, 0x00, 0x00, 0x80, 0x73, 0x48, 0x04,
0x36, 0x00, 0x00, 0xA2, 0xC2, 0x00, 0x80, 0x73, 0x03, 0x23, 0x36,
0x40, 0xB6, 0x00, 0x36, 0x00, 0x05, 0xD6, 0x0C, 0xD2, 0x12, 0xDA,
0x00, 0xA2, 0xC2, 0x00, 0x92, 0x80, 0x08, 0x98, 0x50, 0x00, 0xF5,
0x00, 0x32, 0x98, 0xDF, 0x23, 0x36, 0x60, 0xB6, 0x00, 0x92, 0x80,
0x4F, 0x00, 0xF5, 0x00, 0x32, 0x98, 0xEF, 0x23, 0x36, 0x60, 0xB6,
0x00, 0x92, 0x80, 0x80, 0x62, 0x92, 0x80, 0x00, 0x46, 0x17, 0xEE,
0x13, 0xEA, 0x02, 0x01, 0x09, 0xD8, 0xCD, 0x04, 0x4D, 0x00, 0x00,
0xA3, 0xD6, 0x00, 0x90, 0x97, 0x7F, 0x23, 0x04, 0x61, 0x84, 0x01,
0xD8, 0x84, 0xD2, 0xC1, 0x80, 0x73, 0xCD, 0x04, 0x4D, 0x00, 0x00,
0xA3, 0xE2, 0x01, 0x90, 0x97, 0xCE, 0x81, 0x00, 0x33, 0x02, 0x00,
0xAA, 0x88, 0x80, 0x73, 0x80, 0x77, 0x00, 0x01, 0x01, 0xA1, 0x02,
0x01, 0x4F, 0x00, 0x6E, 0x97, 0x07, 0xA6, 0x0C, 0x01, 0x00, 0x33,
0x03, 0x00, 0xAA, 0x88, 0x03, 0x03, 0x03, 0xDE, 0x00, 0x33, 0x05,
0x00, 0xAA, 0x88, 0xCE, 0x00, 0x69, 0x60, 0xCE, 0x00, 0x02, 0x03,
0x4A, 0x60, 0x00, 0xA2, 0x80, 0x01, 0x80, 0x63, 0x07, 0xA6, 0x2C,
0x01, 0x80, 0x81, 0x03, 0x03, 0x80, 0x63, 0xE2, 0x00, 0x07, 0xA6,
0x3C, 0x01, 0x00, 0x33, 0x04, 0x00, 0xAA, 0x88, 0x03, 0x07, 0x02,
0x01, 0x04, 0xCA, 0x0D, 0x23, 0x52, 0x98, 0x4D, 0x04, 0xF6, 0x84,
0x05, 0xD8, 0x0D, 0x23, 0x52, 0x98, 0xCD, 0x04, 0x15, 0x23, 0xE0,
0x88, 0xFB, 0x23, 0x02, 0x61, 0x82, 0x01, 0x80, 0x63, 0x02, 0x03,
0x06, 0xA3, 0x6A, 0x01, 0x00, 0x33, 0x0A, 0x00, 0xAA, 0x88, 0x4E,
0x00, 0x07, 0xA3, 0x76, 0x01, 0x00, 0x33, 0x0B, 0x00, 0xAA, 0x88,
0xCD, 0x04, 0x36, 0x2D, 0x00, 0x33, 0x1A, 0x00, 0xAA, 0x88, 0x50,
0x04, 0x90, 0x81, 0x06, 0xAB, 0x8A, 0x01, 0x90, 0x81, 0x4E, 0x00,
0x07, 0xA3, 0x9A, 0x01, 0x50, 0x00, 0x00, 0xA3, 0x44, 0x01, 0x00,
0x05, 0x84, 0x81, 0x30, 0x97, 0x02, 0x01, 0x05, 0xC6, 0x04, 0x23,
0xA0, 0x01, 0x15, 0x23, 0xA1, 0x01, 0xC6, 0x81, 0xFD, 0x23, 0x02,
0x61, 0x82, 0x01, 0x0A, 0xDA, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA0,
0xBC, 0x01, 0x80, 0x63, 0xCD, 0x04, 0x36, 0x2D, 0x00, 0x33, 0x1B,
0x00, 0xAA, 0x88, 0x06, 0x23, 0x52, 0x98, 0xCD, 0x04, 0xD8, 0x84,
0x06, 0x01, 0x00, 0xA2, 0xDC, 0x01, 0x57, 0x60, 0x00, 0xA0, 0xE2,
0x01, 0xD8, 0x84, 0x80, 0x23, 0xA0, 0x01, 0xD8, 0x84, 0x80, 0x73,
0x4B, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x08, 0x02, 0x04, 0x01, 0x0C,
0xDE, 0x02, 0x01, 0x03, 0xCC, 0x4F, 0x00, 0x6E, 0x97, 0x04, 0x82,
0x08, 0x23, 0x02, 0x41, 0x82, 0x01, 0x4F, 0x00, 0x4C, 0x97, 0x48,
0x04, 0x84, 0x80, 0xDA, 0x97, 0x00, 0x46, 0x56, 0x00, 0x03, 0xC0,
0x01, 0x23, 0xE8, 0x00, 0x81, 0x73, 0x06, 0x29, 0x03, 0x42, 0x06,
0xE2, 0x03, 0xEE, 0x67, 0xEB, 0x11, 0x23, 0xE0, 0x88, 0xEE, 0x97,
0xF4, 0x80, 0x80, 0x73, 0x80, 0x77, 0x06, 0xA6, 0x36, 0x02, 0x00,
0x33, 0x31, 0x00, 0xAA, 0x88, 0x04, 0x01, 0x03, 0xD8, 0x9C, 0x98,
0x44, 0x96, 0x48, 0x82, 0xD4, 0x95, 0x80, 0x67, 0x83, 0x03, 0x80,
0x63, 0xB6, 0x2D, 0x02, 0xA6, 0x72, 0x02, 0x07, 0xA6, 0x60, 0x02,
0x06, 0xA6, 0x64, 0x02, 0x03, 0xA6, 0x68, 0x02, 0x00, 0x33, 0x10,
0x00, 0xAA, 0x88, 0x6E, 0x95, 0x4A, 0x82, 0x3A, 0x96, 0x4A, 0x82,
0x04, 0x23, 0xA0, 0x01, 0x14, 0x23, 0xA1, 0x01, 0x2E, 0x84, 0x04,
0x01, 0x0C, 0xDC, 0xE0, 0x23, 0x25, 0x61, 0xEF, 0x00, 0x14, 0x01,
0x4F, 0x04, 0xA8, 0x01, 0x6F, 0x00, 0xA5, 0x01, 0x03, 0x23, 0xA4,
0x01, 0x06, 0x23, 0x9C, 0x01, 0x24, 0x2B, 0x1C, 0x01, 0x02, 0xA6,
0xB0, 0x02, 0x07, 0xA6, 0x60, 0x02, 0x06, 0xA6, 0x64, 0x02, 0x03,
0xA6, 0x12, 0x04, 0x01, 0xA6, 0xBA, 0x02, 0x00, 0xA6, 0xBA, 0x02,
0x00, 0x33, 0x12, 0x00, 0xAA, 0x88, 0x00, 0x0E, 0x80, 0x63, 0x00,
0x43, 0x00, 0xA0, 0x92, 0x02, 0x4D, 0x04, 0x04, 0x01, 0x0B, 0xDC,
0xE7, 0x23, 0x04, 0x61, 0x84, 0x01, 0x10, 0x31, 0x12, 0x35, 0x14,
0x01, 0xEC, 0x00, 0x6C, 0x38, 0x00, 0x3F, 0x00, 0x00, 0xF0, 0x82,
0x18, 0x23, 0x04, 0x61, 0x18, 0xA0, 0xE8, 0x02, 0x04, 0x01, 0x98,
0xC8, 0x00, 0x33, 0x1F, 0x00, 0xAA, 0x88, 0x08, 0x31, 0x0A, 0x35,
0x0C, 0x39, 0x0E, 0x3D, 0x68, 0x98, 0xB6, 0x2D, 0x01, 0xA6, 0x1A,
0x03, 0x00, 0xA6, 0x1A, 0x03, 0x07, 0xA6, 0x12, 0x03, 0x06, 0xA6,
0x16, 0x03, 0x03, 0xA6, 0x12, 0x04, 0x02, 0xA6, 0x72, 0x02, 0x00,
0x33, 0x33, 0x00, 0xAA, 0x88, 0x6E, 0x95, 0xF4, 0x82, 0x3A, 0x96,
0xF4, 0x82, 0x6C, 0x98, 0x80, 0x42, 0x68, 0x98, 0x60, 0xE4, 0x04,
0x01, 0x29, 0xC8, 0x31, 0x05, 0x07, 0x01, 0x00, 0xA2, 0x5A, 0x03,
0x00, 0x43, 0x87, 0x01, 0x05, 0x05, 0x70, 0x98, 0x68, 0x98, 0x00,
0xA6, 0x1C, 0x03, 0x07, 0xA6, 0x52, 0x03, 0x03, 0xA6, 0x2E, 0x04,
0x06, 0xA6, 0x56, 0x03, 0x01, 0xA6, 0x1C, 0x03, 0x00, 0x33, 0x25,
0x00, 0xAA, 0x88, 0x6E, 0x95, 0x38, 0x83, 0x3A, 0x96, 0x38, 0x83,
0x04, 0x01, 0x0C, 0xCE, 0x03, 0xC8, 0x00, 0x33, 0x42, 0x00, 0xAA,
0x88, 0x00, 0x01, 0x05, 0x05, 0xFF, 0xA2, 0x78, 0x03, 0xB1, 0x01,
0x08, 0x23, 0xB2, 0x01, 0x34, 0x83, 0x05, 0x05, 0x15, 0x01, 0x00,
0xA2, 0x98, 0x03, 0xEC, 0x00, 0x6E, 0x00, 0x95, 0x01, 0x6C, 0x38,
0x00, 0x3F, 0x00, 0x00, 0x01, 0xA6, 0x94, 0x03, 0x00, 0xA6, 0x94,
0x03, 0x08, 0x84, 0x80, 0x42, 0x68, 0x98, 0x01, 0xA6, 0xA2, 0x03,
0x00, 0xA6, 0xBA, 0x03, 0x08, 0x84, 0x90, 0x98, 0x80, 0x42, 0x01,
0xA6, 0xA2, 0x03, 0x07, 0xA6, 0xB0, 0x03, 0xD2, 0x83, 0x6E, 0x95,
0xA6, 0x83, 0x00, 0x33, 0x2F, 0x00, 0xAA, 0x88, 0x90, 0x98, 0x80,
0x42, 0x00, 0xA6, 0xBA, 0x03, 0x07, 0xA6, 0xC8, 0x03, 0xD2, 0x83,
0x6E, 0x95, 0xBE, 0x83, 0x00, 0x33, 0x26, 0x00, 0xAA, 0x88, 0x38,
0x2B, 0x80, 0x32, 0x80, 0x36, 0x04, 0x23, 0xA0, 0x01, 0x12, 0x23,
0xA1, 0x01, 0x08, 0x84, 0x04, 0xF0, 0x80, 0x6B, 0x00, 0x33, 0x20,
0x00, 0xAA, 0x88, 0x03, 0xA6, 0x06, 0x04, 0x07, 0xA6, 0xFE, 0x03,
0x06, 0xA6, 0x02, 0x04, 0x00, 0x33, 0x17, 0x00, 0xAA, 0x88, 0x6E,
0x95, 0xEC, 0x83, 0x3A, 0x96, 0xEC, 0x83, 0x12, 0x84, 0x04, 0xF0,
0x80, 0x6B, 0x00, 0x33, 0x20, 0x00, 0xAA, 0x88, 0xB6, 0x2D, 0x03,
0xA6, 0x2E, 0x04, 0x07, 0xA6, 0x26, 0x04, 0x06, 0xA6, 0x2A, 0x04,
0x00, 0x33, 0x30, 0x00, 0xAA, 0x88, 0x6E, 0x95, 0x12, 0x84, 0x3A,
0x96, 0x12, 0x84, 0x1D, 0x01, 0x06, 0xCC, 0x00, 0x33, 0x00, 0x84,
0xC0, 0x20, 0x00, 0x23, 0xEA, 0x00, 0x81, 0x62, 0xA2, 0x0D, 0x80,
0x63, 0x07, 0xA6, 0x4C, 0x04, 0x00, 0x33, 0x18, 0x00, 0xAA, 0x88,
0x03, 0x03, 0x80, 0x63, 0xA3, 0x01, 0x07, 0xA4, 0x56, 0x04, 0x23,
0x01, 0x00, 0xA2, 0x78, 0x04, 0x0A, 0xA0, 0x68, 0x04, 0xE0, 0x00,
0x00, 0x33, 0x1D, 0x00, 0xAA, 0x88, 0x0B, 0xA0, 0x74, 0x04, 0xE0,
0x00, 0x00, 0x33, 0x1E, 0x00, 0xAA, 0x88, 0x42, 0x23, 0xE0, 0x88,
0x00, 0x23, 0x22, 0xA3, 0xD8, 0x04, 0x08, 0x23, 0x22, 0xA3, 0x94,
0x04, 0x28, 0x23, 0x22, 0xA3, 0xA0, 0x04, 0x02, 0x23, 0x22, 0xA3,
0xB6, 0x04, 0x42, 0x23, 0xE0, 0x88, 0x4A, 0x00, 0x06, 0x61, 0x00,
0xA0, 0xA0, 0x04, 0x45, 0x23, 0xE0, 0x88, 0xEE, 0x97, 0x00, 0xA2,
0xB2, 0x04, 0x9C, 0x98, 0x00, 0x33, 0x00, 0x82, 0xC0, 0x20, 0x81,
0x62, 0xF0, 0x81, 0x47, 0x23, 0xE0, 0x88, 0x04, 0x01, 0x0B, 0xDE,
0xEE, 0x97, 0x9C, 0x98, 0x00, 0x33, 0x00, 0x81, 0xC0, 0x20, 0x81,
0x62, 0x14, 0x01, 0x00, 0xA0, 0x08, 0x02, 0x43, 0x23, 0xE0, 0x88,
0x04, 0x23, 0xA0, 0x01, 0x44, 0x23, 0xA1, 0x01, 0x80, 0x73, 0x4D,
0x00, 0x03, 0xA3, 0xE6, 0x04, 0x00, 0x33, 0x27, 0x00, 0xAA, 0x88,
0x04, 0x01, 0x04, 0xDC, 0x02, 0x23, 0xA2, 0x01, 0x04, 0x23, 0xA0,
0x01, 0xEE, 0x97, 0x18, 0x95, 0x4B, 0x00, 0xF6, 0x00, 0x4F, 0x04,
0x4F, 0x00, 0x00, 0xA3, 0x14, 0x05, 0x00, 0x05, 0x76, 0x00, 0x06,
0x61, 0x00, 0xA2, 0x0E, 0x05, 0xFC, 0x84, 0x30, 0x97, 0xCD, 0x04,
0x16, 0x85, 0x48, 0x04, 0x84, 0x80, 0x02, 0x01, 0x03, 0xDA, 0x80,
0x23, 0x82, 0x01, 0x26, 0x85, 0x02, 0x23, 0xA0, 0x01, 0x4A, 0x00,
0x06, 0x61, 0x00, 0xA2, 0x32, 0x05, 0x1D, 0x01, 0x04, 0xD6, 0xFF,
0x23, 0x86, 0x41, 0x4B, 0x60, 0xCB, 0x00, 0xFF, 0x23, 0x80, 0x01,
0x49, 0x00, 0x81, 0x01, 0x04, 0x01, 0x02, 0xC8, 0x30, 0x01, 0x80,
0x01, 0xF7, 0x04, 0x03, 0x01, 0x49, 0x04, 0x80, 0x01, 0xC9, 0x00,
0x00, 0x05, 0x00, 0x01, 0xFF, 0xA0, 0x52, 0x05, 0x77, 0x04, 0x01,
0x23, 0xEA, 0x00, 0x5D, 0x00, 0xFE, 0xC7, 0x00, 0x62, 0x00, 0x23,
0xEA, 0x00, 0x00, 0x63, 0x07, 0xA4, 0xD2, 0x05, 0x03, 0x03, 0x02,
0xA0, 0x80, 0x05, 0xCE, 0x85, 0x00, 0x33, 0x2D, 0x00, 0xAA, 0x88,
0x04, 0xA0, 0xA6, 0x05, 0x80, 0x63, 0x4A, 0x00, 0x06, 0x61, 0x00,
0xA2, 0x92, 0x05, 0x1D, 0x01, 0x06, 0xD6, 0x02, 0x23, 0x02, 0x41,
0x82, 0x01, 0x50, 0x00, 0x4C, 0x97, 0xF6, 0x84, 0x04, 0x23, 0x02,
0x41, 0x82, 0x01, 0xF6, 0x84, 0x08, 0xA0, 0xAC, 0x05, 0xCE, 0x85,
0x03, 0xA0, 0xB2, 0x05, 0xCE, 0x85, 0x01, 0xA0, 0xBC, 0x05, 0x88,
0x00, 0x80, 0x63, 0xAA, 0x86, 0x07, 0xA0, 0xC8, 0x05, 0x06, 0x23,
0x52, 0x98, 0x48, 0x23, 0xE0, 0x88, 0x07, 0x23, 0x80, 0x00, 0xF0,
0x86, 0x80, 0x63, 0x6E, 0x85, 0x00, 0x63, 0x4A, 0x00, 0x06, 0x61,
0x00, 0xA2, 0x10, 0x06, 0x1D, 0x01, 0x18, 0xD4, 0xC0, 0x23, 0x07,
0x41, 0x83, 0x03, 0x80, 0x63, 0x06, 0xA6, 0xF2, 0x05, 0x00, 0x33,
0x37, 0x00, 0xAA, 0x88, 0x1D, 0x01, 0x02, 0xD6, 0x46, 0x23, 0xE0,
0x88, 0x63, 0x60, 0x83, 0x03, 0x80, 0x63, 0x06, 0xA6, 0x0A, 0x06,
0x00, 0x33, 0x38, 0x00, 0xAA, 0x88, 0xEF, 0x04, 0x6F, 0x00, 0x00,
0x63, 0x4B, 0x00, 0x06, 0x41, 0xCB, 0x00, 0x52, 0x00, 0x06, 0x61,
0x00, 0xA2, 0x28, 0x06, 0x1D, 0x01, 0x03, 0xCA, 0xC0, 0x23, 0x07,
0x41, 0x00, 0x63, 0x1D, 0x01, 0x04, 0xCC, 0x00, 0x33, 0x00, 0x83,
0xC0, 0x20, 0x81, 0x62, 0x80, 0x23, 0x07, 0x41, 0x00, 0x63, 0x80,
0x67, 0x08, 0x23, 0x83, 0x03, 0x80, 0x63, 0x00, 0x63, 0x06, 0xA6,
0x56, 0x06, 0x07, 0xA6, 0x6E, 0x05, 0x02, 0xA6, 0xE4, 0x06, 0x00,
0x33, 0x39, 0x00, 0xAA, 0x88, 0x00, 0x00, 0x01, 0xA0, 0xFE, 0x06,
0xD4, 0x95, 0x83, 0x03, 0x80, 0x63, 0x06, 0xA6, 0x6A, 0x06, 0x07,
0xA6, 0x6E, 0x05, 0x00, 0x00, 0x01, 0xA0, 0xFE, 0x06, 0x00, 0x2B,
0x40, 0x0E, 0x80, 0x63, 0x01, 0x00, 0x06, 0xA6, 0x86, 0x06, 0x07,
0xA6, 0x6E, 0x05, 0x00, 0x33, 0x3A, 0x00, 0xAA, 0x88, 0x40, 0x0E,
0x80, 0x63, 0x00, 0x43, 0x00, 0xA0, 0x78, 0x06, 0x06, 0xA6, 0x9E,
0x06, 0x07, 0xA6, 0x6E, 0x05, 0x00, 0x33, 0x3B, 0x00, 0xAA, 0x88,
0x80, 0x67, 0x40, 0x0E, 0x80, 0x63, 0x07, 0xA6, 0x6E, 0x05, 0x00,
0x63, 0x07, 0xA6, 0xB4, 0x06, 0x00, 0x33, 0x2A, 0x00, 0xAA, 0x88,
0x03, 0x03, 0x80, 0x63, 0x89, 0x00, 0x0A, 0x2B, 0x07, 0xA6, 0xC6,
0x06, 0x00, 0x33, 0x29, 0x00, 0xAA, 0x88, 0x00, 0x43, 0x00, 0xA2,
0xD2, 0x06, 0xC0, 0x0E, 0x80, 0x63, 0xBC, 0x86, 0xC0, 0x0E, 0x00,
0x33, 0x00, 0x80, 0xC0, 0x20, 0x81, 0x62, 0x04, 0x01, 0x08, 0xDA,
0x80, 0x63, 0x6E, 0x85, 0x80, 0x67, 0x00, 0x33, 0x00, 0x40, 0xC0,
0x20, 0x81, 0x62, 0x00, 0x63, 0x80, 0x7B, 0x80, 0x63, 0x06, 0xA6,
0x62, 0x06, 0x00, 0x33, 0x2C, 0x00, 0xAA, 0x88, 0x0C, 0xA2, 0x18,
0x07, 0xD4, 0x95, 0x83, 0x03, 0x80, 0x63, 0x06, 0xA6, 0x16, 0x07,
0x07, 0xA6, 0x6E, 0x05, 0x00, 0x33, 0x3D, 0x00, 0xAA, 0x88, 0x00,
0x00, 0x80, 0x67, 0x83, 0x03, 0x80, 0x63, 0x0C, 0xA0, 0x2E, 0x07,
0x07, 0xA6, 0x6E, 0x05, 0xBF, 0x23, 0x04, 0x61, 0x84, 0x01, 0xD8,
0x84, 0x00, 0x63, 0xF0, 0x04, 0x01, 0x01, 0xF1, 0x00, 0x00, 0x01,
0xF2, 0x00, 0x01, 0x05, 0x80, 0x01, 0x72, 0x04, 0x71, 0x00, 0x81,
0x01, 0x70, 0x04, 0x80, 0x05, 0x81, 0x05, 0x00, 0x63, 0xF0, 0x04,
0xF2, 0x00, 0x72, 0x04, 0x01, 0x01, 0xF1, 0x00, 0x70, 0x00, 0x81,
0x01, 0x70, 0x04, 0x71, 0x00, 0x81, 0x01, 0x72, 0x00, 0x80, 0x01,
0x71, 0x04, 0x70, 0x00, 0x80, 0x01, 0x70, 0x04, 0x00, 0x63, 0xF0,
0x04, 0xF2, 0x00, 0x72, 0x04, 0x00, 0x01, 0xF1, 0x00, 0x70, 0x00,
0x80, 0x01, 0x70, 0x04, 0x71, 0x00, 0x80, 0x01, 0x72, 0x00, 0x81,
0x01, 0x71, 0x04, 0x70, 0x00, 0x81, 0x01, 0x70, 0x04, 0x00, 0x63,
0x00, 0x23, 0xB3, 0x01, 0x83, 0x05, 0xA3, 0x01, 0xA2, 0x01, 0xA1,
0x01, 0x01, 0x23, 0xA0, 0x01, 0x00, 0x01, 0xC8, 0x00, 0x03, 0xA1,
0xAE, 0x07, 0x00, 0x33, 0x07, 0x00, 0xAA, 0x88, 0x80, 0x05, 0x81,
0x05, 0x04, 0x01, 0x11, 0xC8, 0x48, 0x00, 0xB0, 0x01, 0xB1, 0x01,
0x08, 0x23, 0xB2, 0x01, 0x05, 0x01, 0x48, 0x04, 0x00, 0x43, 0x00,
0xA2, 0xCE, 0x07, 0x00, 0x05, 0xC4, 0x87, 0x00, 0x01, 0xC8, 0x00,
0xFF, 0x23, 0x80, 0x01, 0x05, 0x05, 0x00, 0x63, 0xF7, 0x04, 0x1A,
0x09, 0xF6, 0x08, 0x6E, 0x04, 0x00, 0x02, 0x80, 0x43, 0x76, 0x08,
0x80, 0x02, 0x77, 0x04, 0x00, 0x63, 0xF7, 0x04, 0x1A, 0x09, 0xF6,
0x08, 0x6E, 0x04, 0x00, 0x02, 0x00, 0xA0, 0xFE, 0x07, 0x00, 0x88,
0x00, 0x43, 0x76, 0x08, 0x80, 0x02, 0x77, 0x04, 0x00, 0x63, 0xF3,
0x04, 0x00, 0x23, 0xF4, 0x00, 0x74, 0x00, 0x80, 0x43, 0xF4, 0x00,
0xCF, 0x40, 0x00, 0xA2, 0x2E, 0x08, 0x74, 0x04, 0x02, 0x01, 0xF7,
0xC9, 0xF6, 0xD9, 0x00, 0x01, 0x01, 0xA1, 0x0E, 0x08, 0xEE, 0x97,
0x18, 0x95, 0x0E, 0x88, 0x73, 0x04, 0x00, 0x63, 0xF3, 0x04, 0x75,
0x04, 0x44, 0x88, 0x02, 0x01, 0x04, 0xD8, 0x30, 0x97, 0xEE, 0x97,
0x18, 0x95, 0x34, 0x88, 0x75, 0x00, 0x00, 0xA3, 0x4E, 0x08, 0x00,
0x05, 0x38, 0x88, 0x73, 0x04, 0x00, 0x63, 0x80, 0x7B, 0x80, 0x63,
0x06, 0xA6, 0x60, 0x08, 0x00, 0x33, 0x3E, 0x00, 0xAA, 0x88, 0x80,
0x67, 0x83, 0x03, 0x80, 0x63, 0x00, 0x63, 0x38, 0x2B, 0x86, 0x88,
0x38, 0x2B, 0x7C, 0x88, 0x32, 0x09, 0x31, 0x05, 0x7C, 0x98, 0x05,
0x05, 0xB2, 0x09, 0x00, 0x63, 0x00, 0x32, 0x00, 0x36, 0x00, 0x3A,
0x00, 0x3E, 0x00, 0x63, 0x80, 0x32, 0x80, 0x36, 0x80, 0x3A, 0x80,
0x3E, 0x00, 0x63, 0x38, 0x2B, 0x40, 0x32, 0x40, 0x36, 0x40, 0x3A,
0x40, 0x3E, 0x00, 0x63, 0x5A, 0x20, 0xC9, 0x40, 0x00, 0xA0, 0x9C,
0x08, 0x5D, 0x00, 0xFE, 0xC3, 0x00, 0x63, 0x80, 0x73, 0xE6, 0x20,
0x02, 0x23, 0xE8, 0x00, 0x82, 0x73, 0xFF, 0xFD, 0x80, 0x73, 0x13,
0x23, 0xE0, 0x88, 0x66, 0x20, 0xC0, 0x20, 0x04, 0x23, 0xA0, 0x01,
0xA1, 0x23, 0xA1, 0x01, 0x81, 0x62, 0xCA, 0x88, 0x80, 0x73, 0x80,
0x77, 0x68, 0x00, 0x00, 0xA2, 0x80, 0x00, 0x03, 0xC2, 0xF1, 0xC7,
0x41, 0x23, 0xE0, 0x88, 0x11, 0x23, 0xA1, 0x01, 0x04, 0x23, 0xA0,
0x01, 0xD8, 0x84,
};
u_int16_t adv_mcode_size = sizeof(adv_mcode);
u_int32_t adv_mcode_chksum = 0x012258FB;
u_int32_t adv_mcode_chksum = 0x01297F32;

4
sys/dev/advansys/advmcode.h
View File

@ -1,11 +1,11 @@
/*
* Exported interface to downloadable microcode for AdvanSys SCSI Adapters
*
* $Id$
* $Id: advmcode.h,v 1.3 1997/02/22 09:28:48 peter Exp $
*
* Obtained from:
*
* Copyright (c) 1995-1996 Advanced System Products, Inc.
* Copyright (c) 1995-1997 Advanced System Products, Inc.
* All Rights Reserved.
*
* Redistribution and use in source and binary forms, with or without

264
sys/i386/isa/adv_isa.c
View File

@ -2,30 +2,34 @@
* Device probe and attach routines for the following
* Advanced Systems Inc. SCSI controllers:
*
* Connectivity Products:
* ABP5140 - Bus-Master PnP ISA 16 CDB
* Connectivity Products:
* ABP510/5150 - Bus-Master ISA (240 CDB) *
* ABP5140 - Bus-Master ISA PnP (16 CDB) * **
* ABP5142 - Bus-Master ISA PnP with floppy (16 CDB) ***
*
* Single Channel Products:
* ABP542 - Bus-Master ISA 240 CDB
* ABP5150 - Bus-Master ISA 240 CDB (shipped by HP with the 4020i CD-R drive)
* ABP842 - Bus-Master VL 240 CDB
* Single Channel Products:
* ABP542 - Bus-Master ISA with floppy (240 CDB)
* ABP842 - Bus-Master VL (240 CDB)
*
* Dual Channel Products:
* ABP852 - Dual Channel Bus-Master VL 240 CDB Per Channel
* Dual Channel Products:
* ABP852 - Dual Channel Bus-Master VL (240 CDB Per Channel)
*
* Copyright (c) 1996 Justin T. Gibbs.
* * This board has been shipped by HP with the 4020i CD-R drive.
* The board has no BIOS so it cannot control a boot device, but
* it can control any secondary SCSI device.
* ** This board has been sold by SIIG as the i540 SpeedMaster.
* *** This board has been sold by SIIG as the i542 SpeedMaster.
*
* Copyright (c) 1996, 1997 Justin T. Gibbs.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* notice, this list of conditions, and the following disclaimer,
* without modification, immediately at the beginning of the file.
* 2. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
@ -40,16 +44,22 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id$
* $Id: adv_isa.c,v 1.3 1997/02/22 09:35:51 peter Exp $
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/malloc.h>
#include <machine/bus_pio.h>
#include <machine/bus.h>
#include <i386/isa/isa.h>
#include <i386/isa/isa_device.h>
#include <i386/scsi/advansys.h>
#include <dev/advansys/advansys.h>
#include <cam/scsi/scsi_all.h>
#define ADV_ISA_MAX_DMA_ADDR (0x00FFFFFFL)
#define ADV_ISA_MAX_DMA_COUNT (0x00FFFFFFL)
@ -57,6 +67,14 @@
#define ADV_VL_MAX_DMA_ADDR (0x07FFFFFFL)
#define ADV_VL_MAX_DMA_COUNT (0x07FFFFFFL)
/*
* The overrun buffer shared amongst all ISA/VL adapters.
*/
static u_int8_t* overrun_buf;
bus_dma_tag_t overrun_dmat;
bus_dmamap_t overrun_dmamap;
bus_addr_t overrun_physbase;
/* Possible port addresses an ISA or VL adapter can live at */
u_int16_t adv_isa_ioports[] =
{
@ -73,14 +91,15 @@ u_int16_t adv_isa_ioports[] =
0x330 /* Eighth and default selection in BIOS setup */
};
#define MAX_ISA_IOPORT_INDEX (sizeof(adv_isa_ioports)/sizeof(u_short) - 1)
#define MAX_ISA_IOPORT_INDEX (sizeof(adv_isa_ioports)/sizeof(u_int16_t) - 1)
static int advisaprobe __P((struct isa_device *id));
static int advisaattach __P((struct isa_device *id));
static void adv_set_isapnp_wait_for_key __P((void));
static int adv_find_signature __P((u_int16_t iobase));
static int advisaprobe(struct isa_device *id);
static int advisaattach(struct isa_device *id);
static void adv_set_isapnp_wait_for_key(void);
static int adv_get_isa_dma_channel(struct adv_softc *adv);
static int adv_set_isa_dma_settings(struct adv_softc *adv);
void adv_isa_intr __P((int unit));
void adv_isa_intr(void *unit);
struct isa_driver advdriver =
{
@ -90,8 +109,7 @@ struct isa_driver advdriver =
};
static int
advisaprobe(id)
struct isa_device *id;
advisaprobe(struct isa_device *id)
{
int port_index;
int max_port_index;
@ -123,65 +141,173 @@ advisaprobe(id)
adv_set_isapnp_wait_for_key();
for (;port_index <= max_port_index; port_index++) {
u_int16_t port_addr = adv_isa_ioports[port_index];
bus_size_t maxsegsz;
bus_size_t maxsize;
bus_addr_t lowaddr;
int error;
if (port_addr == 0)
/* Already been attached */
continue;
if (adv_find_signature(port_addr)) {
if (adv_find_signature(I386_BUS_SPACE_IO, port_addr)) {
/*
* Got one. Now allocate our softc
* and see if we can initialize the card.
*/
struct adv_softc *adv;
adv = adv_alloc(id->id_unit, port_addr);
adv = adv_alloc(id->id_unit, I386_BUS_SPACE_IO,
port_addr);
if (adv == NULL)
return (0);
id->id_iobase = adv->iobase;
adv_unit++;
id->id_iobase = adv->bsh;
/*
* Stop the chip.
*/
ADV_OUTB(adv, ADV_CHIP_CTRL, ADV_CC_HALT);
ADV_OUTW(adv, ADV_CHIP_STATUS, 0);
/*
* Determine the chip version.
*/
adv->chip_version = ADV_INB(adv,
ADV_NONEISA_CHIP_REVISION);
if ((adv->chip_version >= ADV_CHIP_MIN_VER_VL)
&& (adv->chip_version <= ADV_CHIP_MAX_VER_VL)) {
adv->type = ADV_VL;
maxsegsz = ADV_VL_MAX_DMA_COUNT;
maxsize = BUS_SPACE_MAXSIZE_32BIT;
lowaddr = ADV_VL_MAX_DMA_ADDR;
id->id_drq = -1;
} else if ((adv->chip_version >= ADV_CHIP_MIN_VER_ISA)
&& (adv->chip_version <= ADV_CHIP_MAX_VER_ISA)) {
if (adv->chip_version >= ADV_CHIP_MIN_VER_ISA_PNP) {
adv->type = ADV_ISAPNP;
ADV_OUTB(adv, ADV_REG_IFC,
ADV_IFC_INIT_DEFAULT);
} else {
adv->type = ADV_ISA;
}
maxsegsz = ADV_ISA_MAX_DMA_COUNT;
maxsize = BUS_SPACE_MAXSIZE_24BIT;
lowaddr = ADV_ISA_MAX_DMA_ADDR;
adv->isa_dma_speed = ADV_DEF_ISA_DMA_SPEED;
adv->isa_dma_channel =
adv_get_isa_dma_channel(adv);
id->id_drq = adv->isa_dma_channel;
} else {
panic("advisaprobe: Unknown card revision\n");
}
/*
* Allocate a parent dmatag for all tags created
* by the MI portions of the advansys driver
*/
/* XXX Should be a child of the ISA bus dma tag */
error =
bus_dma_tag_create(/*parent*/NULL,
/*alignemnt*/0,
/*boundary*/0,
lowaddr,
/*highaddr*/BUS_SPACE_MAXADDR,
/*filter*/NULL,
/*filterarg*/NULL,
maxsize,
/*nsegs*/BUS_SPACE_UNRESTRICTED,
maxsegsz,
/*flags*/0,
&adv->parent_dmat);
if (error != 0) {
printf("%s: Could not allocate DMA tag - error %d\n",
adv_name(adv), error);
adv_free(adv);
return (0);
}
adv->init_level++;
if (overrun_buf == NULL) {
/* Need to allocate our overrun buffer */
if (bus_dma_tag_create(adv->parent_dmat,
/*alignment*/8,
/*boundary*/0,
ADV_ISA_MAX_DMA_ADDR,
BUS_SPACE_MAXADDR,
/*filter*/NULL,
/*filterarg*/NULL,
ADV_OVERRUN_BSIZE,
/*nsegments*/1,
BUS_SPACE_MAXSIZE_32BIT,
/*flags*/0,
&overrun_dmat) != 0) {
adv_free(adv);
return (0);
}
if (bus_dmamem_alloc(overrun_dmat,
(void **)&overrun_buf,
BUS_DMA_NOWAIT,
&overrun_dmamap) != 0) {
bus_dma_tag_destroy(overrun_dmat);
adv_free(adv);
return (0);
}
/* And permanently map it in */
bus_dmamap_load(overrun_dmat, overrun_dmamap,
overrun_buf, ADV_OVERRUN_BSIZE,
adv_map, &overrun_physbase,
/*flags*/0);
}
adv->overrun_physbase = overrun_physbase;
if (adv_init(adv) != 0) {
adv_free(adv);
return (0);
}
switch (adv->type) {
case ADV_ISAPNP:
if (adv->chip_version == ADV_CHIP_VER_ASYN_BUG)
adv->needs_async_bug_fix = TARGET_BIT_VECTOR_SET;
if (adv->chip_version == ADV_CHIP_VER_ASYN_BUG){
adv->bug_fix_control
|= ADV_BUG_FIX_ASYN_USE_SYN;
adv->fix_asyn_xfer = ~0;
}
/* Fall Through */
case ADV_ISA:
adv->max_dma_count = ADV_ISA_MAX_DMA_COUNT;
adv->max_dma_addr = ADV_ISA_MAX_DMA_ADDR;
adv_set_isa_dma_settings(adv);
break;
case ADV_VL:
adv->max_dma_count = ADV_VL_MAX_DMA_COUNT;
adv->max_dma_addr = ADV_VL_MAX_DMA_ADDR;
break;
default:
panic("advisaprobe: Invalid card type\n");
}
if ((adv->type & ADV_ISAPNP) == ADV_ISAPNP) {
}
/* Determine our IRQ */
if (id->id_irq == 0 /* irq ? */)
id->id_irq = 1 << adv_get_chip_irq(adv);
else
adv_set_chip_irq(adv, ffs(id->id_irq) - 1);
id->id_intr = adv_isa_intr;
/* Mark as probed */
adv_isa_ioports[port_index] = 0;
break;
return 1;
}
}
return 1;
return 0;
}
static int
advisaattach(id)
struct isa_device *id;
advisaattach(struct isa_device *id)
{
struct adv_softc *adv;
@ -189,6 +315,44 @@ advisaattach(id)
return (adv_attach(adv));
}
static int
adv_get_isa_dma_channel(struct adv_softc *adv)
{
int channel;
channel = ADV_INW(adv, ADV_CONFIG_LSW) & ADV_CFG_LSW_ISA_DMA_CHANNEL;
if (channel == 0x03)
return (0);
else if (channel == 0x00)
return (7);
return (channel + 4);
}
static int
adv_set_isa_dma_settings(struct adv_softc *adv)
{
u_int16_t cfg_lsw;
u_int8_t value;
if ((adv->isa_dma_channel >= 5) && (adv->isa_dma_channel <= 7)) {
if (adv->isa_dma_channel == 7)
value = 0x00;
else
value = adv->isa_dma_channel - 4;
cfg_lsw = ADV_INW(adv, ADV_CONFIG_LSW)
& ~ADV_CFG_LSW_ISA_DMA_CHANNEL;
cfg_lsw |= value;
ADV_OUTW(adv, ADV_CONFIG_LSW, cfg_lsw);
adv->isa_dma_speed &= 0x07;
adv_set_bank(adv, 1);
ADV_OUTB(adv, ADV_DMA_SPEED, adv->isa_dma_speed);
adv_set_bank(adv, 0);
isa_dmacascade(adv->isa_dma_channel);
}
return (0);
}
static void
adv_set_isapnp_wait_for_key(void)
{
@ -201,36 +365,14 @@ adv_set_isapnp_wait_for_key(void)
return;
}
/*
* Determine if there is a board at "iobase" by looking
* for the AdvanSys signatures. Return 1 if a board is
* found, 0 otherwise.
*/
static int
adv_find_signature(iobase)
u_int16_t iobase;
{
u_int16_t signature;
if (inb(iobase + ADV_SIGNATURE_BYTE) == ADV_1000_ID1B) {
signature = inw(iobase + ADV_SIGNATURE_WORD );
if ((signature == ADV_1000_ID0W)
|| (signature == ADV_1000_ID0W_FIX))
return (1);
}
return (0);
}
/*
* Handle an ISA interrupt.
* XXX should go away as soon as ISA interrupt handlers
* take a (void *) arg.
*/
void
adv_isa_intr(unit)
int unit;
adv_isa_intr(void *unit)
{
struct adv_softc *arg = advsoftcs[unit];
struct adv_softc *arg = advsoftcs[(int)unit];
adv_intr((void *)arg);
}

275
sys/pci/adv_pci.c Normal file
View File

@ -0,0 +1,275 @@
/*
* Device probe and attach routines for the following
* Advanced Systems Inc. SCSI controllers:
*
* Connectivity Products:
* ABP920 - Bus-Master PCI (16 CDB)
* ABP930 - Bus-Master PCI (16 CDB) *
* ABP930U - Bus-Master PCI Ultra (16 CDB)
* ABP930UA - Bus-Master PCI Ultra (16 CDB)
* ABP960 - Bus-Master PCI MAC/PC (16 CDB) **
* ABP960U - Bus-Master PCI MAC/PC Ultra (16 CDB)
*
* Single Channel Products:
* ABP940 - Bus-Master PCI (240 CDB)
* ABP940U - Bus-Master PCI Ultra (240 CDB)
* ABP970 - Bus-Master PCI MAC/PC (240 CDB)
* ABP970U - Bus-Master PCI MAC/PC Ultra (240 CDB)
*
* Dual Channel Products:
* ABP950 - Dual Channel Bus-Master PCI (240 CDB Per Channel)
*
* Footnotes:
* * This board has been sold by SIIG as the Fast SCSI Pro PCI.
* ** This board has been sold by Iomega as a Jaz Jet PCI adapter.
*
* Copyright (c) 1997 Justin Gibbs.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions, and the following disclaimer,
* without modification, immediately at the beginning of the file.
* 2. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id$
*/
#include <pci.h>
#if NPCI > 0
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <machine/bus_pio.h>
#include <machine/bus.h>
#include <pci/pcireg.h>
#include <pci/pcivar.h>
#include <dev/advansys/advansys.h>
#define PCI_BASEADR0 PCI_MAP_REG_START /* I/O Address */
#define PCI_BASEADR1 PCI_MAP_REG_START + 4 /* Mem I/O Address */
#define PCI_DEVICE_ID_ADVANSYS_1200A 0x110010CD
#define PCI_DEVICE_ID_ADVANSYS_1200B 0x120010CD
#define PCI_DEVICE_ID_ADVANSYS_ULTRA 0x130010CD
#define PCI_DEVICE_REV_ADVANSYS_3150 0x02
#define PCI_DEVICE_REV_ADVANSYS_3050 0x03
#define ADV_PCI_MAX_DMA_ADDR (0xFFFFFFFFL)
#define ADV_PCI_MAX_DMA_COUNT (0xFFFFFFFFL)
static char* advpciprobe(pcici_t tag, pcidi_t type);
static void advpciattach(pcici_t config_id, int unit);
/*
* The overrun buffer shared amongst all PCI adapters.
*/
static u_int8_t* overrun_buf;
bus_dma_tag_t overrun_dmat;
bus_dmamap_t overrun_dmamap;
bus_addr_t overrun_physbase;
static struct pci_device adv_pci_driver = {
"adv",
advpciprobe,
advpciattach,
&adv_unit,
NULL
};
DATA_SET (pcidevice_set, adv_pci_driver);
static char*
advpciprobe(pcici_t tag, pcidi_t type)
{
int rev = pci_conf_read(tag, PCI_CLASS_REG) & 0xff;
switch (type) {
case PCI_DEVICE_ID_ADVANSYS_1200A:
return ("AdvanSys ASC1200A SCSI controller");
case PCI_DEVICE_ID_ADVANSYS_1200B:
return ("AdvanSys ASC1200B SCSI controller");
case PCI_DEVICE_ID_ADVANSYS_ULTRA:
if (rev == PCI_DEVICE_REV_ADVANSYS_3150)
return ("AdvanSys ASC3150 Ultra SCSI controller");
else
return ("AdvanSys ASC3050 Ultra SCSI controller");
break;
default:
break;
}
return (NULL);
}
static void
advpciattach(pcici_t config_id, int unit)
{
u_int16_t io_port;
u_int16_t config_msw;
struct adv_softc *adv;
u_int32_t id;
u_int32_t command;
int error;
/*
* Determine the chip version.
*/
id = pci_cfgread(config_id, PCI_ID_REG, /*bytes*/4);
command = pci_cfgread(config_id, PCIR_COMMAND, /*bytes*/1);
/*
* These cards do not allow memory mapped accesses, so we must
* ensure that I/O accesses are available or we won't be able
* to talk to them.
*/
if ((command & (PCIM_CMD_PORTEN|PCIM_CMD_BUSMASTEREN))
!= (PCIM_CMD_PORTEN|PCIM_CMD_BUSMASTEREN)) {
command |= PCIM_CMD_PORTEN|PCIM_CMD_BUSMASTEREN;
pci_cfgwrite(config_id, PCIR_COMMAND, command, /*bytes*/1);
}
/*
* Early chips can't handle non-zero latency timer settings.
*/
if (id == PCI_DEVICE_ID_ADVANSYS_1200A
|| id == PCI_DEVICE_ID_ADVANSYS_1200B) {
pci_cfgwrite(config_id, PCIR_LATTIMER, /*value*/0, /*bytes*/1);
}
if (pci_map_port(config_id, PCI_BASEADR0, &io_port) == 0)
return;
if (adv_find_signature(I386_BUS_SPACE_IO, io_port) == 0)
return;
adv = adv_alloc(unit, I386_BUS_SPACE_IO, io_port);
if (adv == NULL)
return;
/* Allocate a dmatag for our transfer DMA maps */
/* XXX Should be a child of the PCI bus dma tag */
error = bus_dma_tag_create(/*parent*/NULL, /*alignment*/0,
/*boundary*/0,
/*lowaddr*/ADV_PCI_MAX_DMA_ADDR,
/*highaddr*/BUS_SPACE_MAXADDR,
/*filter*/NULL, /*filterarg*/NULL,
/*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
/*nsegments*/BUS_SPACE_UNRESTRICTED,
/*maxsegsz*/ADV_PCI_MAX_DMA_COUNT,
/*flags*/0,
&adv->parent_dmat);
if (error != 0) {
printf("%s: Could not allocate DMA tag - error %d\n",
adv_name(adv), error);
adv_free(adv);
return;
}
adv->init_level++;
if (overrun_buf == NULL) {
/* Need to allocate our overrun buffer */
if (bus_dma_tag_create(adv->parent_dmat,
/*alignment*/8, /*boundary*/0,
ADV_PCI_MAX_DMA_ADDR, BUS_SPACE_MAXADDR,
/*filter*/NULL, /*filterarg*/NULL,
ADV_OVERRUN_BSIZE, /*nsegments*/1,
BUS_SPACE_MAXSIZE_32BIT, /*flags*/0,
&overrun_dmat) != 0) {
bus_dma_tag_destroy(adv->parent_dmat);
adv_free(adv);
return;
}
if (bus_dmamem_alloc(overrun_dmat,
(void **)&overrun_buf,
BUS_DMA_NOWAIT,
&overrun_dmamap) != 0) {
bus_dma_tag_destroy(overrun_dmat);
bus_dma_tag_destroy(adv->parent_dmat);
adv_free(adv);
return;
}
/* And permanently map it in */
bus_dmamap_load(overrun_dmat, overrun_dmamap,
overrun_buf, ADV_OVERRUN_BSIZE,
adv_map, &overrun_physbase,
/*flags*/0);
}
adv->overrun_physbase = overrun_physbase;
/*
* Stop the chip.
*/
ADV_OUTB(adv, ADV_CHIP_CTRL, ADV_CC_HALT);
ADV_OUTW(adv, ADV_CHIP_STATUS, 0);
adv->chip_version = ADV_INB(adv, ADV_NONEISA_CHIP_REVISION);
adv->type = ADV_PCI;
/*
* Setup active negation and signal filtering.
*/
{
u_int8_t extra_cfg;
if (adv->chip_version >= ADV_CHIP_VER_PCI_ULTRA_3150)
adv->type |= ADV_ULTRA;
if (adv->chip_version == ADV_CHIP_VER_PCI_ULTRA_3150)
extra_cfg = ADV_IFC_ACT_NEG | ADV_IFC_SLEW_RATE;
else if (adv->chip_version == ADV_CHIP_VER_PCI_ULTRA_3050)
extra_cfg = ADV_IFC_ACT_NEG | ADV_IFC_WR_EN_FILTER;
else
extra_cfg = ADV_IFC_ACT_NEG | ADV_IFC_SLEW_RATE;
ADV_OUTB(adv, ADV_REG_IFC, extra_cfg);
}
if (adv_init(adv) != 0) {
adv_free(adv);
return;
}
adv->max_dma_count = ADV_PCI_MAX_DMA_COUNT;
adv->max_dma_addr = ADV_PCI_MAX_DMA_ADDR;
#if CC_DISABLE_PCI_PARITY_INT
config_msw = ADV_INW(adv, ADV_CONFIG_MSW);
config_msw &= 0xFFC0;
ADV_OUTW(adv, ADV_CONFIG_MSW, config_msw);
#endif
if (id == PCI_DEVICE_ID_ADVANSYS_1200A
|| id == PCI_DEVICE_ID_ADVANSYS_1200B) {
adv->bug_fix_control |= ADV_BUG_FIX_IF_NOT_DWB;
adv->bug_fix_control |= ADV_BUG_FIX_ASYN_USE_SYN;
adv->fix_asyn_xfer = ~0;
}
if ((pci_map_int(config_id, adv_intr, (void *)adv, &cam_imask)) == 0) {
adv_free(adv);
return;
}
adv_attach(adv);
}
#endif /* NPCI > 0 */