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Remove the unnecessary i2c slave address assignment.
The ti_i2c controller only works in the master mode and the i2c address passed on iicbus_reset() is used to set the controller slave address when operating as an i2c slave (which isn't currently supported). When talking to a slave, the slave address is correctly provided to ti_i2c_tranfer().
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=267009
@ -92,7 +92,6 @@ struct ti_i2c_softc
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volatile uint16_t sc_stat_flags; /* contains the status flags last IRQ */
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uint16_t sc_i2c_addr;
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uint16_t sc_rev;
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};
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@ -310,10 +309,6 @@ ti_i2c_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr)
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TI_I2C_LOCK(sc);
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if (oldaddr)
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*oldaddr = sc->sc_i2c_addr;
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sc->sc_i2c_addr = addr;
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/* First disable the controller while changing the clocks */
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con_reg = ti_i2c_read_reg(sc, I2C_REG_CON);
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ti_i2c_write_reg(sc, I2C_REG_CON, 0x0000);
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@ -325,9 +320,6 @@ ti_i2c_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr)
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ti_i2c_write_reg(sc, I2C_REG_SCLL, clkcfg->scll | (clkcfg->hsscll<<8));
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ti_i2c_write_reg(sc, I2C_REG_SCLH, clkcfg->sclh | (clkcfg->hssclh<<8));
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/* Set the remote slave address */
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ti_i2c_write_reg(sc, I2C_REG_SA, addr);
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/* Check if we are dealing with high speed mode */
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if ((clkcfg->hsscll + clkcfg->hssclh) > 0)
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con_reg = I2C_CON_OPMODE_HS;
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@ -339,7 +331,7 @@ ti_i2c_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr)
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TI_I2C_UNLOCK(sc);
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return 0;
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return (IIC_ENOADDR);
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}
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/**
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