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mirror of https://git.FreeBSD.org/src.git synced 2024-12-05 09:14:03 +00:00

Add additional support for generating code for the arm. There's still

a few issues in other parts of the tree, but those will be resolved
separately.

Submitted by: cogenet@
Reviewed by: kan@, obrien@
MFC After: 5 days
This commit is contained in:
Warner Losh 2006-09-18 17:08:32 +00:00
parent d9994d8bb4
commit a817992dfc
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=162417
5 changed files with 201 additions and 0 deletions

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@ -11,7 +11,11 @@ GCCDIR= ${.CURDIR}/../../../../contrib/gcc
.include "Makefile.tgt"
# Machine description.
.if ${TARGET_ARCH} == "arm"
MD_FILE= ../cc_tools/arm-diked.md
.else
MD_FILE= ${GCCDIR}/config/${GCC_CPU}/${GCC_CPU}.md
.endif
target= ${TARGET_ARCH}-undermydesk-freebsd
CFLAGS+= -DIN_GCC -DHAVE_CONFIG_H

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@ -80,6 +80,10 @@ insn-$F.c: ${.OBJDIR}/../cc_tools/gen$F
CFLAGS+= -DHAVE_CONFIG_H
CFLAGS+= -DTARGET_NAME=\"${target}\" -DIN_GCC
.if ${TARGET_ARCH} == "arm" && defined(TARGET_BIG_ENDIAN)
CFLAGS += -DTARGET_ENDIAN_DEFAULT=ARM_FLAG_BIG_END
.endif
# c-pch.o needs extra defines. Replicate the rule here rather than
# pollute compiler command line for all other files.
c-pch.o: c-pch.c

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@ -215,7 +215,9 @@ CLEANFILES+= fini
.if ${TARGET_ARCH} == "amd64"
TARGET_INC= i386/biarch64.h
.endif
.if ${TARGET_ARCH} != "arm"
TARGET_INC+= ${GCC_CPU}/${GCC_CPU}.h
.endif
.if ${TARGET_ARCH} == "i386" || ${TARGET_ARCH} == "amd64"
TARGET_INC+= ${GCC_CPU}/unix.h
TARGET_INC+= ${GCC_CPU}/att.h
@ -235,7 +237,19 @@ TARGET_INC+= ${GCC_CPU}/elf.h
TARGET_INC+= ${GCC_CPU}/sysv4.h
.endif
.endif
.if ${TARGET_ARCH} == "arm"
TARGET_INC+= ${GCC_CPU}/elf.h
TARGET_INC+= ${GCC_CPU}/aout.h
TARGET_INC+= ${GCC_CPU}/${GCC_CPU}.h
. if defined(TARGET_BIG_ENDIAN)
CFLAGS+= -DTARGET_ENDIAN_DEFAULT=ARM_FLAG_BIG_END
. endif
.endif
.if ${TARGET_ARCH} == "arm"
TARGET_INC+= freebsd-diked.h
.else
TARGET_INC+= ${GCC_CPU}/freebsd.h
.endif
.if ${TARGET_ARCH} == "amd64"
TARGET_INC+= ${GCC_CPU}/x86-64.h
TARGET_INC+= ${GCC_CPU}/freebsd64.h
@ -457,6 +471,26 @@ gtyp-gen.h:
gcov-iov.h:
echo "#define GCOV_VERSION ((gcov_unsigned_t)0x33303470)" >> ${.TARGET}
.if ${TARGET_ARCH} == "arm"
freebsd-diked.h: ${GCCDIR}/../../gnu/usr.bin/cc/cc_tools/arm-freebsd.h.diff
cp ${GCCDIR}/config/arm/freebsd.h freebsd.h
patch freebsd.h ${.ALLSRC}
mv freebsd.h ${.TARGET}
COMMONHDRS+= freebsd-diked.h
CLEANFILES+= freebsd.h.orig
# Make sure freebsd-diked.h is built when tm.h is built for csu's sake
tm.h: freebsd-diked.h
${MD_FILE}: ${MFILE}
cp ${GCCDIR}/config/${GCC_CPU}/${GCC_CPU}.md .
ln -sf ${GCCDIR}/config/${GCC_CPU}/fpa.md .
ln -sf ${GCCDIR}/config/${GCC_CPU}/cirrus.md .
ln -sf ${GCCDIR}/config/${GCC_CPU}/iwmmxt.md .
patch ${GCC_CPU}.md ${.CURDIR}/arm.md.diff
mv ${GCC_CPU}.md ${.TARGET}
CLEANFILES+= arm-diked.md ${GCC_CPU}.md.orig fpa.md cirrus.md iwmmxt.md
.endif
#-----------------------------------------------------------------------
# General things.

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@ -0,0 +1,111 @@
$FreeBSD$
Index: freebsd.h
===================================================================
RCS file: /cognet/ncvs/src/contrib/gcc/config/arm/freebsd.h,v
retrieving revision 1.1.1.3
diff -u -p -r1.1.1.3 freebsd.h
--- freebsd.h 28 Jul 2004 03:11:35 -0000 1.1.1.3
+++ freebsd.h 21 Jul 2006 00:50:25 -0000
@@ -22,7 +22,10 @@
#undef SUBTARGET_EXTRA_SPECS
#define SUBTARGET_EXTRA_SPECS \
- { "fbsd_dynamic_linker", FBSD_DYNAMIC_LINKER }
+ { "fbsd_dynamic_linker", FBSD_DYNAMIC_LINKER }, \
+ { "subtarget_extra_asm_spec", SUBTARGET_EXTRA_ASM_SPEC }, \
+ { "subtarget_asm_float_spec", SUBTARGET_ASM_FLOAT_SPEC }
+
#undef SUBTARGET_CPP_SPEC
#define SUBTARGET_CPP_SPEC FBSD_CPP_SPEC
@@ -39,7 +42,8 @@
%{rdynamic:-export-dynamic} \
%{!dynamic-linker:-dynamic-linker %(fbsd_dynamic_linker) }} \
%{static:-Bstatic}} \
- %{symbolic:-Bsymbolic}"
+ %{symbolic:-Bsymbolic} \
+ %{mbig-endian:-EB} %{mlittle-endian:-EL}"
/************************[ Target stuff ]***********************************/
@@ -67,3 +71,80 @@
#undef TARGET_VERSION
#define TARGET_VERSION fprintf (stderr, " (FreeBSD/StrongARM ELF)");
+
+#ifndef TARGET_ENDIAN_DEFAULT
+#define TARGET_ENDIAN_DEFAULT 0
+#endif
+
+#undef TARGET_DEFAULT
+#define TARGET_DEFAULT \
+ (ARM_FLAG_APCS_32 \
+ | ARM_FLAG_SOFT_FLOAT \
+ | ARM_FLAG_APCS_FRAME \
+ | ARM_FLAG_ATPCS \
+ | ARM_FLAG_VFP \
+ | ARM_FLAG_MMU_TRAPS \
+ | TARGET_ENDIAN_DEFAULT)
+
+#undef TYPE_OPERAND_FMT
+#define TYPE_OPERAND_FMT "%%%s"
+
+#undef SUBTARGET_EXTRA_ASM_SPEC
+#define SUBTARGET_EXTRA_ASM_SPEC \
+ "-matpcs %{fpic|fpie:-k} %{fPIC|fPIE:-k}"
+
+ /* Default floating point model is soft-VFP.
+ * FIXME: -mhard-float currently implies FPA. */
+#undef SUBTARGET_ASM_FLOAT_SPEC
+#define SUBTARGET_ASM_FLOAT_SPEC \
+ "%{mhard-float:-mfpu=fpa} \
+ %{msoft-float:-mfpu=softvfp} \
+ %{!mhard-float: \
+ %{!msoft-float:-mfpu=softvfp}}"
+
+
+/* FreeBSD does its profiling differently to the Acorn compiler. We
+ don't need a word following the mcount call; and to skip it
+ requires either an assembly stub or use of fomit-frame-pointer when
+ compiling the profiling functions. Since we break Acorn CC
+ compatibility below a little more won't hurt. */
+
+#undef ARM_FUNCTION_PROFILER
+#define ARM_FUNCTION_PROFILER(STREAM,LABELNO) \
+{ \
+ asm_fprintf (STREAM, "\tmov\t%Rip, %Rlr\n"); \
+ asm_fprintf (STREAM, "\tbl\t_mcount%s\n", \
+ NEED_PLT_RELOC ? "(PLT)" : ""); \
+}
+
+/* Emit code to set up a trampoline and synchronize the caches. */
+#undef INITIALIZE_TRAMPOLINE
+#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
+do \
+ { \
+ emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 8)), \
+ (CXT)); \
+ emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 12)), \
+ (FNADDR)); \
+ emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), \
+ 0, VOIDmode, 2, TRAMP, Pmode, \
+ plus_constant (TRAMP, TRAMPOLINE_SIZE), Pmode); \
+ } \
+while (0)
+
+/* Clear the instruction cache from `BEG' to `END'. This makes a
+ call to the ARM_SYNC_ICACHE architecture specific syscall. */
+#define CLEAR_INSN_CACHE(BEG, END) \
+do \
+ { \
+ extern int sysarch(int number, void *args); \
+ struct \
+ { \
+ unsigned int addr; \
+ int len; \
+ } s; \
+ s.addr = (unsigned int)(BEG); \
+ s.len = (END) - (BEG); \
+ (void) sysarch (0, &s); \
+ } \
+while (0)

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@ -0,0 +1,48 @@
$FreeBSD$
Index: arm.md
===================================================================
RCS file: /cognet/ncvs/src/contrib/gcc/config/arm/arm.md,v
retrieving revision 1.1.1.7
diff -u -p -r1.1.1.7 arm.md
--- arm.md 3 Jun 2005 03:28:42 -0000 1.1.1.7
+++ arm.md 29 Aug 2005 12:39:39 -0000
@@ -8836,12 +8836,12 @@
ldm[2] = operands[4];
}
if (GET_CODE (XEXP (operands[2], 0)) != REG)
- val1 = INTVAL (XEXP (XEXP (operands[2], 0), 1));
+ val1 = INTVAL (XEXP (XEXP (operands[2], 0), 1));
if (GET_CODE (XEXP (operands[3], 0)) != REG)
- val2 = INTVAL (XEXP (XEXP (operands[3], 0), 1));
+ val2 = INTVAL (XEXP (XEXP (operands[3], 0), 1));
arith[0] = operands[0];
arith[3] = operands[1];
- if (val1 < val2)
+ if (val1 <= val2)
{
arith[1] = ldm[1];
arith[2] = ldm[2];
@@ -8871,7 +8871,7 @@
else
output_asm_insn (\"ldm%?ia\\t%0, {%1, %2}\", ldm);
}
- else
+ else if (val2)
{
ldm[0] = XEXP (operands[2], 0);
if (val1 < val2)
@@ -8879,6 +8879,14 @@
else
output_asm_insn (\"ldm%?da\\t%0, {%1, %2}\", ldm);
}
+ else {
+ ldm[0] = operands[0];
+ ldm[1] = XEXP(operands[2], 0);
+ output_asm_insn(\"ldr\\t%0, [%1]\", ldm);
+ ldm[0] = operands[4];
+ ldm[1] = XEXP(operands[3], 0);
+ output_asm_insn(\"ldr\\t%0, [%1]\", ldm);
+ }
output_asm_insn (\"%I3%?\\t%0, %1, %2\", arith);
return \"\";
}"