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When configuring hwpmc to use the EXT_SNOOP event, only send a default cachestate qualifier on the Atom processor. Other Intel processors do not accept a cachestate qualifier and currently hwpmc will return EINVAL if you try to use the EXT_SNOOP event on those processors

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Approved by:	jkoshy (mentor)
MFC after:	2 weeks
This commit is contained in:
Ryan Stone 2010-05-01 21:59:06 +00:00
parent df04ddbaa6
commit aa1b887b41
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=207482
1 changed files with 8 additions and 1 deletions
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9
lib/libpmc/libpmc.c
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@ -737,9 +737,16 @@ iap_allocate_pmc(enum pmc_event pe, char *ctrspec,
case PMC_EV_IAP_EVENT_40H: /* Core */
case PMC_EV_IAP_EVENT_41H: /* Core */
case PMC_EV_IAP_EVENT_42H: /* Core, Core2, Atom */
case PMC_EV_IAP_EVENT_77H: /* Core */
if (cachestate == 0)
cachestate = (0xF << 8);
break;
case PMC_EV_IAP_EVENT_77H: /* Atom */
/* IAP_EVENT_77H only accepts a cachestate qualifier on the
* Atom processor
*/
if(cpu_info.pm_cputype == PMC_CPU_INTEL_ATOM && cachestate == 0)
cachestate = (0xF << 8);
break;
default:
break;
}