mirror of
https://git.FreeBSD.org/src.git
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Add support for VIA 82C596 controller
Better shared irq handeling for Promise & HPT366 controllers Setup prober PIO mode timings on Promise & HPT366 controllers Update Copyright headers to be Y2K compliant :)
This commit is contained in:
Søren Schmidt
parent
cf8123ed18
commit
aa966b9a64
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=55333
@ -1,5 +1,5 @@
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/*-
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* Copyright (c) 1998,1999 Søren Schmidt
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* Copyright (c) 1998,1999,2000 Søren Schmidt
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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@ -74,7 +74,7 @@
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#if SMP == 0
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#define isa_apic_irq(x) x
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#endif
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#define IOMASK 0xfffffffc /* XXX SOS 0xfffc */
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#define IOMASK 0xfffffffc
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/* prototypes */
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static int32_t ata_probe(int32_t, int32_t, int32_t, device_t, int32_t *);
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@ -189,41 +189,54 @@ ata_pcimatch(device_t dev)
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/* supported chipsets */
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case 0x12308086:
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return "Intel PIIX ATA controller";
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case 0x70108086:
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return "Intel PIIX3 ATA controller";
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case 0x71118086:
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case 0x71998086:
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return "Intel PIIX4 ATA controller";
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return "Intel PIIX4 ATA-33 controller";
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case 0x522910b9:
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return "AcerLabs Aladdin ATA controller";
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return "AcerLabs Aladdin ATA-33 controller";
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case 0x05711106: /* 82c586 & 82c686 */
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if (ata_find_dev(dev, 0x05861106))
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return "VIA 82C586 ATA controller";
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return "VIA 82C586 ATA-33 controller";
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if (ata_find_dev(dev, 0x05961106))
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return "VIA 82C596 ATA-33 controller";
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if (ata_find_dev(dev, 0x06861106))
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return "VIA 82C686 ATA controller";
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return "VIA 82C686 ATA-66 controller";
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return "VIA Apollo ATA controller";
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case 0x55131039:
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return "SiS 5591 ATA controller";
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return "SiS 5591 ATA-33 controller";
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case 0x74091022:
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return "AMD 756 ATA controller";
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return "AMD 756 ATA-66 controller";
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case 0x4d33105a:
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return "Promise Ultra/33 ATA controller";
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return "Promise ATA-33 controller";
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case 0x4d38105a:
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return "Promise Ultra/66 ATA controller";
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return "Promise ATA-66 controller";
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case 0x00041103:
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return "HighPoint HPT366 ATA controller";
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return "HighPoint HPT366 ATA-66 controller";
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/* unsupported but known chipsets, generic DMA only */
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case 0x05961106:
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return "VIA 82C596 ATA controller (generic mode)";
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case 0x06401095:
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return "CMD 640 ATA controller (generic mode)";
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case 0x06461095:
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return "CMD 646 ATA controller (generic mode)";
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case 0xc6931080:
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return "Cypress 82C693 ATA controller (generic mode)";
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case 0x01021078:
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return "Cyrix 5530 ATA controller (generic mode)";
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default:
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if (pci_get_class(dev) == PCIC_STORAGE &&
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(pci_get_subclass(dev) == PCIS_STORAGE_IDE))
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@ -321,21 +334,22 @@ ata_pciattach(device_t dev)
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/* do extra chipset specific setups */
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switch (type) {
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case 0x522910b9:
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/* on the Aladdin activate the ATAPI FIFO */
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case 0x522910b9: /* Aladdin need to activate the ATAPI FIFO */
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pci_write_config(dev, 0x53,
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(pci_read_config(dev, 0x53, 1) & ~0x01) | 0x02, 1);
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break;
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case 0x4d33105a:
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case 0x4d38105a:
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/* the Promise's need burst mode to be turned on explicitly */
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case 0x4d38105a: /* Promise's need burst mode to be turned on */
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outb(bmaddr_1 + 0x1f, inb(bmaddr_1 + 0x1f) | 0x01);
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break;
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case 0x00041103: /* HPT366 controller defaults */
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printf("ata: HPT config %08x\n", pci_read_config(dev, 0x50, 4));
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break;
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case 0x05711106:
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case 0x74091022:
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/* the VIA 82C586, VIA 82C686 & AMD 756 needs some sensible defaults */
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case 0x74091022: /* VIA 82C586, 82C596, 82C686 & AMD 756 default setup */
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/* set prefetch, postwrite */
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pci_write_config(dev, 0x41, pci_read_config(dev, 0x41, 1) | 0xf0, 1);
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@ -360,6 +374,7 @@ ata_pciattach(device_t dev)
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lun = 0;
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if (iobase_1 && ata_probe(iobase_1, altiobase_1, bmaddr_1, dev, &lun)) {
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scp = atadevices[lun];
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scp->chiptype = type;
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if (iobase_1 == IO_WD1)
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#ifdef __i386__
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inthand_add(device_get_nameunit(dev), irq1, ataintr, scp,
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@ -383,6 +398,7 @@ ata_pciattach(device_t dev)
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lun = 1;
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if (iobase_2 && ata_probe(iobase_2, altiobase_2, bmaddr_2, dev, &lun)) {
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scp = atadevices[lun];
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scp->chiptype = type;
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if (iobase_2 == IO_WD2)
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#ifdef __i386__
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inthand_add(device_get_nameunit(dev), irq2, ataintr, scp,
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@ -575,14 +591,30 @@ ata_probe(int32_t ioaddr, int32_t altioaddr, int32_t bmaddr,
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static void
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ataintr(void *data)
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{
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struct ata_softc *scp =(struct ata_softc *)data;
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struct ata_softc *scp = (struct ata_softc *)data;
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/* is this interrupt really for this channel */
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if ((scp->flags & ATA_DMA_ACTIVE) &&
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!(ata_dmastatus(scp) & ATA_BMSTAT_INTERRUPT))
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return;
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/* check if this interrupt is for us (shared PCI interrupts) */
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switch (scp->chiptype) {
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case 0x00041103: /* HighPoint HPT366 controller */
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if (scp->active == ATA_IDLE)
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return;
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if (!(ata_dmastatus(scp) & ATA_BMSTAT_INTERRUPT))
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return;
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break;
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if (((scp->status = inb(scp->ioaddr+ATA_STATUS)) & ATA_S_BUSY)==ATA_S_BUSY)
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case 0x4d33105a: /* Promise 33's */
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case 0x4d38105a: /* Promise 66's */
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if (!(inl((pci_read_config(scp->dev, 0x20, 4) & IOMASK) + 0x1c) &
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((scp->unit) ? 0x00004000 : 0x00000400)))
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return;
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break;
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default:
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if ((scp->flags & ATA_DMA_ACTIVE) &&
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!(ata_dmastatus(scp) & ATA_BMSTAT_INTERRUPT))
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return;
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}
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if (((scp->status = inb(scp->ioaddr + ATA_STATUS))&ATA_S_BUSY)==ATA_S_BUSY)
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return;
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/* find & call the responsible driver to process this interrupt */
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@ -623,7 +655,7 @@ ataintr(void *data)
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scp->lun, intr_count, scp->status);
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}
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#endif
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return;
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/* return; SOS XXX */
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}
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scp->active = ATA_IDLE;
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scp->running = NULL;
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@ -883,24 +915,36 @@ int8_t *
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ata_mode2str(int32_t mode)
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{
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switch (mode) {
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case ATA_MODE_PIO:
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return "PIO";
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case ATA_MODE_WDMA2:
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return "DMA";
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case ATA_MODE_UDMA2:
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return "UDMA33";
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case ATA_MODE_UDMA3:
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return "UDMA3";
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case ATA_MODE_UDMA4:
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return "UDMA66";
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case ATA_PIO0: return "PIO0";
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case ATA_PIO1: return "PIO1";
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case ATA_PIO2: return "PIO2";
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case ATA_PIO3: return "PIO3";
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case ATA_PIO4: return "PIO4";
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case ATA_WDMA2: return "WDMA2";
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case ATA_UDMA2: return "UDMA33";
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case ATA_UDMA4: return "UDMA66";
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default: return "???";
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}
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}
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int8_t
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ata_pio2mode(int32_t pio)
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{
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switch (pio) {
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default:
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return "???";
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case 0: return ATA_PIO0;
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case 1: return ATA_PIO1;
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case 2: return ATA_PIO2;
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case 3: return ATA_PIO3;
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case 4: return ATA_PIO4;
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}
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}
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static int8_t *
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active2str(int32_t active)
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{
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static char buf[8];
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switch (active) {
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case ATA_IDLE:
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return("ATA_IDLE");
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@ -913,7 +957,8 @@ active2str(int32_t active)
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case ATA_REINITING:
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return("ATA_REINITING");
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default:
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return("UNKNOWN");
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sprintf(buf, "0x%02x", active);
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return buf;
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}
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}
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@ -1,5 +1,5 @@
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/*-
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* Copyright (c) 1998,1999 Søren Schmidt
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* Copyright (c) 1998,1999,2000 Søren Schmidt
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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@ -124,12 +124,6 @@ struct ata_dmaentry {
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u_int32_t count;
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};
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/* ATA device DMA access modes */
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#define ATA_WDMA2 0x22
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#define ATA_UDMA2 0x42
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#define ATA_UDMA3 0x43
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#define ATA_UDMA4 0x44
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/* structure describing an ATA device */
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struct ata_softc {
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int32_t unit; /* unit on this controller */
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@ -138,14 +132,18 @@ struct ata_softc {
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int32_t ioaddr; /* port addr */
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int32_t altioaddr; /* alternate port addr */
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int32_t bmaddr; /* bus master DMA port */
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int32_t chiptype; /* pciid of controller chip */
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void *dev_softc[2]; /* ptr to devices softc's */
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struct ata_dmaentry *dmatab[2]; /* DMA transfer tables */
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int32_t mode[2]; /* transfer mode for devices */
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#define ATA_MODE_PIO 0x00
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#define ATA_MODE_WDMA2 0x01
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#define ATA_MODE_UDMA2 0x02
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#define ATA_MODE_UDMA3 0x04
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#define ATA_MODE_UDMA4 0x08
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#define ATA_PIO0 0x08
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#define ATA_PIO1 0x09
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#define ATA_PIO2 0x0a
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#define ATA_PIO3 0x0b
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#define ATA_PIO4 0x0c
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#define ATA_WDMA2 0x22
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#define ATA_UDMA2 0x42
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#define ATA_UDMA4 0x44
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int32_t flags; /* controller flags */
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#define ATA_DMA_ACTIVE 0x01
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@ -193,6 +191,7 @@ void ata_dmastart(struct ata_softc *);
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int32_t ata_dmastatus(struct ata_softc *);
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int32_t ata_dmadone(struct ata_softc *);
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int8_t *ata_mode2str(int32_t);
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int8_t ata_pio2mode(int32_t);
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void bswap(int8_t *, int32_t);
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void btrim(int8_t *, int32_t);
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void bpack(int8_t *, int8_t *, int32_t);
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@ -1,5 +1,5 @@
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/*-
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* Copyright (c) 1998,1999 Søren Schmidt
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* Copyright (c) 1998,1999,2000 Søren Schmidt
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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@ -462,6 +462,7 @@ ad_transfer(struct ad_request *request)
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/* does this drive support multi sector transfers ? */
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else if (request->currentsize > DEV_BSIZE)
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cmd = request->flags & AR_F_READ?ATA_C_READ_MULTI:ATA_C_WRITE_MULTI;
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/* just plain old single sector transfer */
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else
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cmd = request->flags & AR_F_READ ? ATA_C_READ : ATA_C_WRITE;
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@ -1,5 +1,5 @@
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/*-
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* Copyright (c) 1998,1999 Søren Schmidt
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* Copyright (c) 1998,1999,2000 Søren Schmidt
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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@ -1,5 +1,5 @@
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/*-
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* Copyright (c) 1998,1999 Søren Schmidt
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* Copyright (c) 1998,1999,2000 Søren Schmidt
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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@ -49,6 +49,7 @@
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#include <dev/ata/ata-disk.h>
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/* prototypes */
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static void promise_timing(struct ata_softc *, int32_t, int32_t);
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static void hpt366_timing(struct ata_softc *, int32_t, int32_t);
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/* misc defines */
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@ -64,8 +65,8 @@ int32_t
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ata_dmainit(struct ata_softc *scp, int32_t device,
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int32_t apiomode, int32_t wdmamode, int32_t udmamode)
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{
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int32_t type, error;
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int32_t devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1);
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int32_t error;
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void *dmatab;
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if (!scp->bmaddr)
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@ -94,7 +95,7 @@ ata_dmainit(struct ata_softc *scp, int32_t device,
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}
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scp->dmatab[(device == ATA_MASTER) ? 0 : 1] = dmatab;
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switch (type = pci_get_devid(scp->dev)) {
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switch (scp->chiptype) {
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case 0x71118086: /* Intel PIIX4 */
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case 0x71998086: /* Intel PIIX4 */
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@ -113,7 +114,7 @@ ata_dmainit(struct ata_softc *scp, int32_t device,
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pci_write_config(scp->dev, 0x48,
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(pci_read_config(scp->dev, 0x48, 4) &
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~mask48) | new48, 4);
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scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2;
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scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_UDMA2;
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return 0;
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}
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}
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@ -145,7 +146,7 @@ ata_dmainit(struct ata_softc *scp, int32_t device,
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printf("ata%d-%s: %s setting up WDMA2 mode on PIIX%s chip\n",
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scp->lun, (device == ATA_MASTER) ? "master" : "slave",
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(error) ? "failed" : "success",
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(type == 0x70108086) ? "3" : "4");
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(scp->chiptype == 0x70108086) ? "3" : "4");
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if (!error) {
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if (device == ATA_MASTER) {
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mask40 = 0x0000330f;
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@ -171,7 +172,7 @@ ata_dmainit(struct ata_softc *scp, int32_t device,
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pci_write_config(scp->dev, 0x44,
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(pci_read_config(scp->dev, 0x44, 4) & ~mask44)|
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new44, 4);
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scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
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scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_WDMA2;
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return 0;
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}
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}
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@ -197,7 +198,7 @@ ata_dmainit(struct ata_softc *scp, int32_t device,
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scp->lun, (device == ATA_MASTER) ? "master" : "slave",
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(error) ? "failed" : "success");
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if (!error) {
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scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
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scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_WDMA2;
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return 0;
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}
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}
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@ -226,7 +227,7 @@ ata_dmainit(struct ata_softc *scp, int32_t device,
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pci_write_config(scp->dev, 0x53,
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pci_read_config(scp->dev, 0x53, 1) | 0x03, 1);
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scp->flags |= ATA_ATAPI_DMA_RO;
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scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2;
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scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_UDMA2;
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return 0;
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}
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}
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@ -241,64 +242,64 @@ ata_dmainit(struct ata_softc *scp, int32_t device,
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pci_write_config(scp->dev, 0x53,
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pci_read_config(scp->dev, 0x53, 1) | 0x03, 1);
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scp->flags |= ATA_ATAPI_DMA_RO;
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scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
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scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_WDMA2;
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return 0;
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}
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}
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/* we could set PIO mode timings, but we assume the BIOS did that */
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break;
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case 0x05711106: /* VIA Apollo 82C571 / 82C586 / 82C686 */
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case 0x05711106: /* VIA 82C571, 82C586, 82C596 & 82C686 */
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case 0x74091022: /* AMD 756 */
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/* UDMA4 mode only on 82C686 / AMD 756 hardware */
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/* UDMA4 mode only on 82C686 and AMD 756 */
|
||||
if ((udmamode >= 4 && ata_find_dev(scp->dev, 0x06861106)) ||
|
||||
(udmamode >= 4 && type == 0x74091022)) {
|
||||
(udmamode >= 4 && scp->chiptype == 0x74091022)) {
|
||||
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
|
||||
ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
|
||||
if (bootverbose)
|
||||
printf("ata%d-%s: %s setting up UDMA4 mode on %s chip\n",
|
||||
scp->lun, (device == ATA_MASTER) ? "master":"slave",
|
||||
(error) ? "failed" : "success",
|
||||
(type == 0x74091022) ? "AMD" : "VIA");
|
||||
(scp->chiptype == 0x74091022) ? "AMD" : "VIA");
|
||||
if (!error) {
|
||||
pci_write_config(scp->dev, 0x53 - devno, 0xc3, 1);
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4;
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_UDMA4;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
/* UDMA2 mode only on 82C686 and AMD 756 and rev 1 and better 82C586 */
|
||||
if ((udmamode >= 2 && ata_find_dev(scp->dev, 0x06861106)) ||
|
||||
(udmamode >= 2 && type == 0x74091022) ||
|
||||
(udmamode >= 2 && ata_find_dev(scp->dev, 0x05861106) &&
|
||||
pci_read_config(scp->dev, 0x08, 1) >= 0x01)) {
|
||||
/* UDMA2 mode only on 82C586 > rev1, 82C596, 82C686, AMD 756 */
|
||||
if ((udmamode >= 2 && ata_find_dev(scp->dev, 0x05861106) &&
|
||||
pci_read_config(scp->dev, 0x08, 1) >= 0x01) ||
|
||||
(udmamode >= 2 && ata_find_dev(scp->dev, 0x05961106)) ||
|
||||
(udmamode >= 2 && ata_find_dev(scp->dev, 0x06861106)) ||
|
||||
(udmamode >= 2 && scp->chiptype == 0x74091022)) {
|
||||
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
|
||||
ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
|
||||
if (bootverbose)
|
||||
printf("ata%d-%s: %s setting up UDMA2 mode on %s chip\n",
|
||||
scp->lun, (device == ATA_MASTER) ? "master" : "slave",
|
||||
(error) ? "failed" : "success",
|
||||
(type == 0x74091022) ? "AMD" : "VIA");
|
||||
(scp->chiptype == 0x74091022) ? "AMD" : "VIA");
|
||||
if (!error) {
|
||||
pci_write_config(scp->dev, 0x53 - devno, 0xc0, 1);
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2;
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_UDMA2;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
if (wdmamode >= 2 && apiomode >= 4) {
|
||||
/* set WDMA2 mode timing */
|
||||
|
||||
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
|
||||
ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
|
||||
if (bootverbose)
|
||||
printf("ata%d-%s: %s setting up WDMA2 mode on %s chip\n",
|
||||
scp->lun, (device == ATA_MASTER) ? "master" : "slave",
|
||||
(error) ? "failed" : "success",
|
||||
(type == 0x74091022) ? "AMD" : "VIA");
|
||||
(scp->chiptype == 0x74091022) ? "AMD" : "VIA");
|
||||
if (!error) {
|
||||
pci_write_config(scp->dev, 0x53 - devno, 0x82, 1);
|
||||
pci_write_config(scp->dev, 0x4b - devno, 0x31, 1);
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_WDMA2;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
@ -315,7 +316,7 @@ ata_dmainit(struct ata_softc *scp, int32_t device,
|
||||
(error) ? "failed" : "success");
|
||||
if (!error) {
|
||||
pci_write_config(scp->dev, 0x40 + (devno << 1), 0xa301, 2);
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2;
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_UDMA2;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
@ -328,7 +329,7 @@ ata_dmainit(struct ata_softc *scp, int32_t device,
|
||||
(error) ? "failed" : "success");
|
||||
if (!error) {
|
||||
pci_write_config(scp->dev, 0x40 + (devno << 1), 0x0301, 2);
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_WDMA2;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
@ -342,7 +343,7 @@ ata_dmainit(struct ata_softc *scp, int32_t device,
|
||||
(device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
|
||||
break;
|
||||
|
||||
if (udmamode >=4 && type == 0x4d38105a &&
|
||||
if (udmamode >=4 && scp->chiptype == 0x4d38105a &&
|
||||
!(pci_read_config(scp->dev, 0x50, 2)&(scp->unit ? 1<<11 : 1<<10))) {
|
||||
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
|
||||
ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
|
||||
@ -352,8 +353,8 @@ ata_dmainit(struct ata_softc *scp, int32_t device,
|
||||
(error) ? "failed" : "success");
|
||||
if (!error) {
|
||||
outb(scp->bmaddr+0x11, inl(scp->bmaddr+0x11) | scp->unit ? 8:2);
|
||||
pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004127f3, 4);
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4;
|
||||
promise_timing(scp, devno, ATA_UDMA4);
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_UDMA4;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
@ -365,8 +366,8 @@ ata_dmainit(struct ata_softc *scp, int32_t device,
|
||||
scp->lun, (device == ATA_MASTER) ? "master" : "slave",
|
||||
(error) ? "failed" : "success");
|
||||
if (!error) {
|
||||
pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004127f3, 4);
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2;
|
||||
promise_timing(scp, devno, ATA_UDMA2);
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_UDMA2;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
@ -378,15 +379,23 @@ ata_dmainit(struct ata_softc *scp, int32_t device,
|
||||
scp->lun, (device == ATA_MASTER) ? "master" : "slave",
|
||||
(error) ? "failed" : "success");
|
||||
if (!error) {
|
||||
pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004367f3, 4);
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
|
||||
promise_timing(scp, devno, ATA_WDMA2);
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_WDMA2;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
|
||||
ata_pio2mode(apiomode),
|
||||
ATA_C_F_SETXFER, ATA_WAIT_READY);
|
||||
if (bootverbose)
|
||||
printf("ata%d-%s: setting PIO mode on Promise chip\n",
|
||||
scp->lun, (device == ATA_MASTER) ? "master" : "slave");
|
||||
pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004fe924, 4);
|
||||
printf("ata%d-%s: %s setting up PIO%d mode on Promise chip\n",
|
||||
scp->lun, (device == ATA_MASTER) ? "master" : "slave",
|
||||
(error) ? "failed" : "success",
|
||||
(apiomode >= 0) ? apiomode : 0);
|
||||
if (!error) {
|
||||
promise_timing(scp, devno, ata_pio2mode(apiomode));
|
||||
return 0;
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x00041103: /* HighPoint HPT366 controller */
|
||||
@ -403,21 +412,8 @@ ata_dmainit(struct ata_softc *scp, int32_t device,
|
||||
scp->lun, (device == ATA_MASTER) ? "master" : "slave",
|
||||
(error) ? "failed" : "success");
|
||||
if (!error) {
|
||||
hpt366_timing(scp, device, ATA_MODE_UDMA4);
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
if (udmamode >=3 && !(pci_read_config(scp->dev, 0x5a, 1) & 0x2)) {
|
||||
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
|
||||
ATA_UDMA3, ATA_C_F_SETXFER, ATA_WAIT_READY);
|
||||
if (bootverbose)
|
||||
printf("ata%d-%s: %s setting up UDMA3 mode on HPT366 chip\n",
|
||||
scp->lun, (device == ATA_MASTER) ? "master" : "slave",
|
||||
(error) ? "failed" : "success");
|
||||
if (!error) {
|
||||
hpt366_timing(scp, device, ATA_MODE_UDMA3);
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA3;
|
||||
hpt366_timing(scp, devno, ATA_UDMA4);
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_UDMA4;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
@ -429,8 +425,8 @@ ata_dmainit(struct ata_softc *scp, int32_t device,
|
||||
scp->lun, (device == ATA_MASTER) ? "master" : "slave",
|
||||
(error) ? "failed" : "success");
|
||||
if (!error) {
|
||||
hpt366_timing(scp, device, ATA_MODE_UDMA2);
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2;
|
||||
hpt366_timing(scp, devno, ATA_UDMA2);
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_UDMA2;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
@ -442,15 +438,23 @@ ata_dmainit(struct ata_softc *scp, int32_t device,
|
||||
scp->lun, (device == ATA_MASTER) ? "master" : "slave",
|
||||
(error) ? "failed" : "success");
|
||||
if (!error) {
|
||||
hpt366_timing(scp, device, ATA_MODE_WDMA2);
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
|
||||
hpt366_timing(scp, devno, ATA_WDMA2);
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_WDMA2;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
|
||||
ata_pio2mode(apiomode),
|
||||
ATA_C_F_SETXFER, ATA_WAIT_READY);
|
||||
if (bootverbose)
|
||||
printf("ata%d-%s: setting PIO mode on HPT366 chip\n",
|
||||
scp->lun, (device == ATA_MASTER) ? "master" : "slave");
|
||||
hpt366_timing(scp, device, ATA_MODE_PIO);
|
||||
printf("ata%d-%s: %s setting up PIO%d mode on HPT366 chip\n",
|
||||
scp->lun, (device == ATA_MASTER) ? "master" : "slave",
|
||||
(error) ? "failed" : "success",
|
||||
(apiomode >= 0) ? apiomode : 0);
|
||||
if (!error) {
|
||||
hpt366_timing(scp, devno, ata_pio2mode(apiomode));
|
||||
return 0;
|
||||
}
|
||||
break;
|
||||
|
||||
default: /* unknown controller chip */
|
||||
@ -462,7 +466,7 @@ ata_dmainit(struct ata_softc *scp, int32_t device,
|
||||
/* well, we have no support for this, but try anyways */
|
||||
if ((wdmamode >= 2 && apiomode >= 4) && scp->bmaddr) {
|
||||
#if MAYBE_NOT
|
||||
&& (inb(scp->bmaddr + ATA_BMSTAT_PORT) &
|
||||
&& (inb(scp->bmaddr + ATA_BMSTAT_PORT) &
|
||||
((device == ATA_MASTER) ?
|
||||
ATA_BMSTAT_DMA_MASTER : ATA_BMSTAT_DMA_SLAVE))) {
|
||||
#endif
|
||||
@ -473,12 +477,20 @@ ata_dmainit(struct ata_softc *scp, int32_t device,
|
||||
scp->lun, (device == ATA_MASTER) ? "master" : "slave",
|
||||
(error) ? "failed" : "success");
|
||||
if (!error) {
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_WDMA2;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
free(dmatab, M_DEVBUF);
|
||||
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
|
||||
ata_pio2mode(apiomode), ATA_C_F_SETXFER,ATA_WAIT_READY);
|
||||
if (bootverbose)
|
||||
printf("ata%d-%s: %s setting up PIO%d mode on generic chip\n",
|
||||
scp->lun, (device == ATA_MASTER) ? "master" : "slave",
|
||||
(error) ? "failed" : "success", (apiomode >= 0) ? apiomode : 0);
|
||||
if (!error)
|
||||
scp->mode[(device == ATA_MASTER) ? 0 : 1] = ata_pio2mode(apiomode);
|
||||
return -1;
|
||||
}
|
||||
|
||||
@ -552,43 +564,70 @@ ata_dmastatus(struct ata_softc *scp)
|
||||
}
|
||||
|
||||
static void
|
||||
hpt366_timing(struct ata_softc *scp, int32_t device, int32_t mode)
|
||||
promise_timing(struct ata_softc *scp, int32_t devno, int32_t mode)
|
||||
{
|
||||
u_int32_t timing;
|
||||
switch (mode) {
|
||||
default:
|
||||
case ATA_PIO0: timing = 0x004ff329; break;
|
||||
case ATA_PIO1: timing = 0x004fec25; break;
|
||||
case ATA_PIO2: timing = 0x004fe823; break;
|
||||
case ATA_PIO3: timing = 0x004fe622; break;
|
||||
case ATA_PIO4: timing = 0x004fe421; break;
|
||||
case ATA_WDMA2: timing = 0x004367f3; break;
|
||||
case ATA_UDMA2: timing = 0x004127f3; break;
|
||||
case ATA_UDMA4: timing = 0x004127f3; break;
|
||||
}
|
||||
pci_write_config(scp->dev, 0x60 + (devno << 2), timing, 4);
|
||||
}
|
||||
|
||||
static void
|
||||
hpt366_timing(struct ata_softc *scp, int32_t devno, int32_t mode)
|
||||
{
|
||||
u_int32_t timing;
|
||||
|
||||
switch (pci_read_config(scp->dev, (device == ATA_MASTER) ? 0x41 : 0x45, 1)){
|
||||
switch (pci_read_config(scp->dev, 0x41 + (devno << 2), 1)) {
|
||||
case 0x85: /* 25Mhz */
|
||||
switch (mode) {
|
||||
case ATA_MODE_PIO: timing = 0xc0ca8521; break;
|
||||
case ATA_MODE_WDMA2: timing = 0xa0ca8521; break;
|
||||
case ATA_MODE_UDMA2:
|
||||
case ATA_MODE_UDMA3: timing = 0x90cf8521; break;
|
||||
case ATA_MODE_UDMA4: timing = 0x90c98521; break;
|
||||
default: timing = 0x01208585;
|
||||
case ATA_PIO0: timing = 0xc0d08585; break;
|
||||
case ATA_PIO1: timing = 0xc0d08572; break;
|
||||
case ATA_PIO2: timing = 0xc0ca8542; break;
|
||||
case ATA_PIO3: timing = 0xc0ca8532; break;
|
||||
case ATA_PIO4: timing = 0xc0ca8521; break;
|
||||
case ATA_WDMA2: timing = 0xa0ca8521; break;
|
||||
case ATA_UDMA2: timing = 0x90cf8521; break;
|
||||
case ATA_UDMA4: timing = 0x90c98521; break;
|
||||
default: timing = 0x01208585;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
case 0xa7: /* 33MHz */
|
||||
switch (mode) {
|
||||
case ATA_MODE_PIO: timing = 0xc0c8a731; break;
|
||||
case ATA_MODE_WDMA2: timing = 0xa0c8a731; break;
|
||||
case ATA_MODE_UDMA2: timing = 0x90caa731; break;
|
||||
case ATA_MODE_UDMA3: timing = 0x90cfa731; break;
|
||||
case ATA_MODE_UDMA4: timing = 0x90c9a731; break;
|
||||
default: timing = 0x0120a7a7;
|
||||
case ATA_PIO0: timing = 0xc0d0a7aa; break;
|
||||
case ATA_PIO1: timing = 0xc0d0a7a3; break;
|
||||
case ATA_PIO2: timing = 0xc0d0a753; break;
|
||||
case ATA_PIO3: timing = 0xc0c8a742; break;
|
||||
case ATA_PIO4: timing = 0xc0c8a731; break;
|
||||
case ATA_WDMA2: timing = 0xa0c8a731; break;
|
||||
case ATA_UDMA2: timing = 0x90caa731; break;
|
||||
case ATA_UDMA4: timing = 0x90c9a731; break;
|
||||
default: timing = 0x0120a7a7;
|
||||
}
|
||||
break;
|
||||
case 0xd9: /* 40Mhz */
|
||||
switch (mode) {
|
||||
case ATA_MODE_PIO: timing = 0xc008d963; break;
|
||||
case ATA_MODE_WDMA2: timing = 0xa008d943; break;
|
||||
case ATA_MODE_UDMA2: timing = 0x900bd943; break;
|
||||
case ATA_MODE_UDMA3: timing = 0x900ad943; break;
|
||||
case ATA_MODE_UDMA4: timing = 0x900fd943; break;
|
||||
default: timing = 0x0120d9d9;
|
||||
case ATA_PIO0: timing = 0xc018d9d9; break;
|
||||
case ATA_PIO1: timing = 0xc010d9c7; break;
|
||||
case ATA_PIO2: timing = 0xc010d997; break;
|
||||
case ATA_PIO3: timing = 0xc010d974; break;
|
||||
case ATA_PIO4: timing = 0xc008d963; break;
|
||||
case ATA_WDMA2: timing = 0xa008d943; break;
|
||||
case ATA_UDMA2: timing = 0x900bd943; break;
|
||||
case ATA_UDMA4: timing = 0x900fd943; break;
|
||||
default: timing = 0x0120d9d9;
|
||||
}
|
||||
}
|
||||
pci_write_config(scp->dev, (device==ATA_MASTER ? 0x40 : 0x44), timing, 4);
|
||||
pci_write_config(scp->dev, 0x40 + (devno << 2) , timing, 4);
|
||||
}
|
||||
|
||||
#else /* NPCI > 0 */
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*-
|
||||
* Copyright (c) 1998,1999 Søren Schmidt
|
||||
* Copyright (c) 1998,1999,2000 Søren Schmidt
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*-
|
||||
* Copyright (c) 1998,1999 Søren Schmidt
|
||||
* Copyright (c) 1998,1999,2000 Søren Schmidt
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*-
|
||||
* Copyright (c) 1998,1999 Søren Schmidt
|
||||
* Copyright (c) 1998,1999,2000 Søren Schmidt
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*-
|
||||
* Copyright (c) 1998,1999 Søren Schmidt
|
||||
* Copyright (c) 1998,1999,2000 Søren Schmidt
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*-
|
||||
* Copyright (c) 1998,1999 Søren Schmidt
|
||||
* Copyright (c) 1998,1999,2000 Søren Schmidt
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*-
|
||||
* Copyright (c) 1998,1999 Søren Schmidt
|
||||
* Copyright (c) 1998,1999,2000 Søren Schmidt
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*-
|
||||
* Copyright (c) 1998,1999 Søren Schmidt
|
||||
* Copyright (c) 1998,1999,2000 Søren Schmidt
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*-
|
||||
* Copyright (c) 1998,1999 Søren Schmidt
|
||||
* Copyright (c) 1998,1999,2000 Søren Schmidt
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
||||
Loading…
Reference in New Issue
Block a user