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arm64: Fixed IOMMU compilation errors
These are missing changes after1228b93b41
when ref_count was removed from bus_dma_tag_common and1e3f42b6ba
, when the address arguments were switched to pointers. Reviewed by: jhb MFC after: 3 days Differential Revision: https://reviews.freebsd.org/D45289
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c2628accc0
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@ -240,6 +240,8 @@ nooptions COMPAT_FREEBSD10
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# arm64 supports 32-bit FreeBSD/arm binaries (armv[67] ABIs)
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options COMPAT_FREEBSD32 # Compatible with FreeBSD/arm
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options IOMMU # ARM64 SMMU/IOMMU
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#####################################################################
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# ZFS support
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@ -250,4 +252,4 @@ options ZFS
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#
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device iichid # HID-over-I2C support
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options IICHID_DEBUG # Enable HID-over-I2C debug messages
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options IICHID_SAMPLING # Workaround missing GPIO INTR support
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options IICHID_SAMPLING # Workaround missing GPIO INTR support
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@ -172,7 +172,6 @@ iommu_tag_init(struct iommu_domain *iodom, struct bus_dma_tag_iommu *t)
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maxaddr = MIN(iodom->end, BUS_SPACE_MAXADDR);
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t->common.ref_count = 0;
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t->common.impl = &bus_dma_iommu_impl;
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t->common.alignment = 1;
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t->common.boundary = 0;
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@ -632,8 +632,8 @@ pmap_gpu_enter(struct smmu_pmap *pmap, vm_offset_t va, vm_paddr_t pa,
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l1p = smmu_pmap_l1(pmap, va);
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l2p = smmu_pmap_l2(pmap, va);
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cpu_dcache_wb_range((vm_offset_t)l1p, sizeof(pd_entry_t));
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cpu_dcache_wb_range((vm_offset_t)l2p, sizeof(pd_entry_t));
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cpu_dcache_wb_range(l1p, sizeof(pd_entry_t));
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cpu_dcache_wb_range(l2p, sizeof(pd_entry_t));
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goto retry;
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}
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@ -644,7 +644,7 @@ pmap_gpu_enter(struct smmu_pmap *pmap, vm_offset_t va, vm_paddr_t pa,
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/* New mapping */
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smmu_pmap_store(l3, new_l3);
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cpu_dcache_wb_range((vm_offset_t)l3, sizeof(pt_entry_t));
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cpu_dcache_wb_range(l3, sizeof(pt_entry_t));
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smmu_pmap_resident_count_inc(pmap, 1);
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dsb(ishst);
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@ -681,7 +681,7 @@ pmap_gpu_remove(struct smmu_pmap *pmap, vm_offset_t va)
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smmu_pmap_resident_count_dec(pmap, 1);
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smmu_pmap_clear(pte);
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cpu_dcache_wb_range((vm_offset_t)pte, sizeof(pt_entry_t));
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cpu_dcache_wb_range(pte, sizeof(pt_entry_t));
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rc = KERN_SUCCESS;
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out:
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