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Code Issues Releases Activity

Fix all the compiler warnings in elf_trampoline.c.

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This commit is contained in:
Rui Paulo 2013-07-07 19:19:18 +00:00
parent 8e37a7c8b9
commit afed56936c
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=252996
1 changed files with 22 additions and 4 deletions
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26
sys/arm/arm/elf_trampoline.c
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@ -49,51 +49,67 @@ void _start(void);
void __start(void);
void __startC(void);
extern unsigned int cpufunc_id(void);
extern void armv6_idcache_wbinv_all(void);
extern void do_call(void *, void *, void *, int);
#define GZ_HEAD 0xa
#ifdef CPU_ARM7TDMI
#define cpu_idcache_wbinv_all arm7tdmi_cache_flushID
extern void arm7tdmi_cache_flushID(void);
#elif defined(CPU_ARM8)
#define cpu_idcache_wbinv_all arm8_cache_purgeID
extern void arm8_cache_purgeID(void);
#elif defined(CPU_ARM9)
#define cpu_idcache_wbinv_all arm9_idcache_wbinv_all
extern void arm9_idcache_wbinv_all(void);
#elif defined(CPU_FA526) || defined(CPU_FA626TE)
#define cpu_idcache_wbinv_all fa526_idcache_wbinv_all
extern void fa526_idcache_wbinv_all(void);
#elif defined(CPU_ARM9E)
#define cpu_idcache_wbinv_all armv5_ec_idcache_wbinv_all
extern void armv5_ec_idcache_wbinv_all(void);
#elif defined(CPU_ARM10)
#define cpu_idcache_wbinv_all arm10_idcache_wbinv_all
extern void arm10_idcache_wbinv_all(void);
#elif defined(CPU_ARM1136) || defined(CPU_ARM1176)
#define cpu_idcache_wbinv_all armv6_idcache_wbinv_all
#elif defined(CPU_SA110) || defined(CPU_SA1110) || defined(CPU_SA1100) || \
defined(CPU_IXP12X0)
#define cpu_idcache_wbinv_all sa1_cache_purgeID
extern void sa1_cache_purgeID(void);
#elif defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \
defined(CPU_XSCALE_80219)
#define cpu_idcache_wbinv_all xscale_cache_purgeID
extern void xscale_cache_purgeID(void);
#elif defined(CPU_XSCALE_81342)
#define cpu_idcache_wbinv_all xscalec3_cache_purgeID
extern void xscalec3_cache_purgeID(void);
#elif defined(CPU_MV_PJ4B)
#if !defined(SOC_MV_ARMADAXP)
#define cpu_idcache_wbinv_all armv6_idcache_wbinv_all
extern void armv6_idcache_wbinv_all(void);
#else
#define cpu_idcache_wbinv_all() armadaxp_idcache_wbinv_all
extern void armadaxp_idcache_wbinv_all(void);
#endif
#endif /* CPU_MV_PJ4B */
#ifdef CPU_XSCALE_81342
#define cpu_l2cache_wbinv_all xscalec3_l2cache_purge
extern void xscalec3_l2cache_purge(void);
#elif defined(SOC_MV_KIRKWOOD) || defined(SOC_MV_DISCOVERY)
#define cpu_l2cache_wbinv_all sheeva_l2cache_wbinv_all
extern void sheeva_l2cache_wbinv_all(void);
#elif defined(CPU_CORTEXA)
#define cpu_idcache_wbinv_all armv7_idcache_wbinv_all
extern void armv7_idcache_wbinv_all(void);
#define cpu_l2cache_wbinv_all()
#else
#define cpu_l2cache_wbinv_all()
#endif
static void armadaxp_idcache_wbinv_all(void);
int arm_picache_size;
int arm_picache_line_size;
int arm_picache_ways;
@ -434,11 +450,11 @@ static void *
inflate_kernel(void *kernel, void *startaddr)
{
struct inflate infl;
char slide[GZ_WSIZE];
unsigned char slide[GZ_WSIZE];
orig_input = kernel;
memcnt = memtot = 0;
i_input = (char *)kernel + GZ_HEAD;
i_input = (unsigned char *)kernel + GZ_HEAD;
if (((char *)kernel)[3] & 0x18) {
while (*i_input)
i_input++;
@ -590,6 +606,8 @@ load_kernel(unsigned int kstart, unsigned int curaddr,unsigned int func_end,
__asm __volatile(".globl func_end\n"
"func_end:");
/* NOTREACHED */
return NULL;
}
extern char func_end[];