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Code Issues Releases Activity

Pull in r181620 from llvm trunk:

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[ms-inline asm] Fix a crasher when we fail on a direct match.

  The issue was that the MatchingInlineAsm and VariantID args to the
  MatchInstructionImpl function weren't being set properly.  Specifically, when
  parsing intel syntax, the parser thought it was parsing inline assembly in the
  at&t dialect; that will never be the case.

  The crash was caused when the emitter tried to emit the instruction, but the
  operands weren't set.  When parsing inline assembly we only set the opcode, not
  the operands, which is used to lookup the instruction descriptor.
  rdar://13854391 and PR15945

  Also, this commit reverts r176036.  Now that we're correctly parsing the intel
  syntax the pushad/popad don't match properly.  I've reimplemented that fix using
  a MnemonicAlias.

Pull in r183907 from llvm trunk:

  X86: Make the cmov aliases work with intel syntax too.

These commits make a number of Intel-style inline assembly mnemonics
aliases (occurring in several ports) work properly, which could cause
assertions otherwise.

Reported by:	kwm, bapt
This commit is contained in:
Dimitry Andric 2013-06-14 21:14:36 +00:00
parent c6f73e3099
commit b6fdb9ab2f
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=251761
2 changed files with 33 additions and 26 deletions
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8
contrib/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
View File

@ -2306,25 +2306,25 @@ MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
unsigned Match1, Match2, Match3, Match4;
Match1 = MatchInstructionImpl(Operands, Inst, ErrorInfoIgnore,
isParsingIntelSyntax());
MatchingInlineAsm, isParsingIntelSyntax());
// If this returned as a missing feature failure, remember that.
if (Match1 == Match_MissingFeature)
ErrorInfoMissingFeature = ErrorInfoIgnore;
Tmp[Base.size()] = Suffixes[1];
Match2 = MatchInstructionImpl(Operands, Inst, ErrorInfoIgnore,
isParsingIntelSyntax());
MatchingInlineAsm, isParsingIntelSyntax());
// If this returned as a missing feature failure, remember that.
if (Match2 == Match_MissingFeature)
ErrorInfoMissingFeature = ErrorInfoIgnore;
Tmp[Base.size()] = Suffixes[2];
Match3 = MatchInstructionImpl(Operands, Inst, ErrorInfoIgnore,
isParsingIntelSyntax());
MatchingInlineAsm, isParsingIntelSyntax());
// If this returned as a missing feature failure, remember that.
if (Match3 == Match_MissingFeature)
ErrorInfoMissingFeature = ErrorInfoIgnore;
Tmp[Base.size()] = Suffixes[3];
Match4 = MatchInstructionImpl(Operands, Inst, ErrorInfoIgnore,
isParsingIntelSyntax());
MatchingInlineAsm, isParsingIntelSyntax());
// If this returned as a missing feature failure, remember that.
if (Match4 == Match_MissingFeature)
ErrorInfoMissingFeature = ErrorInfoIgnore;

51
contrib/llvm/lib/Target/X86/X86InstrInfo.td
View File

@ -884,12 +884,12 @@ def PUSHF64 : I<0x9C, RawFrm, (outs), (ins), "pushfq", [], IIC_PUSH_F>,
let Defs = [EDI, ESI, EBP, EBX, EDX, ECX, EAX, ESP], Uses = [ESP],
mayLoad = 1, neverHasSideEffects = 1, SchedRW = [WriteLoad] in {
def POPA32 : I<0x61, RawFrm, (outs), (ins), "popa{l|d}", [], IIC_POP_A>,
def POPA32 : I<0x61, RawFrm, (outs), (ins), "popa{l}", [], IIC_POP_A>,
Requires<[In32BitMode]>;
}
let Defs = [ESP], Uses = [EDI, ESI, EBP, EBX, EDX, ECX, EAX, ESP],
mayStore = 1, neverHasSideEffects = 1, SchedRW = [WriteStore] in {
def PUSHA32 : I<0x60, RawFrm, (outs), (ins), "pusha{l|d}", [], IIC_PUSH_A>,
def PUSHA32 : I<0x60, RawFrm, (outs), (ins), "pusha{l}", [], IIC_PUSH_A>,
Requires<[In32BitMode]>;
}
@ -1867,6 +1867,9 @@ def : MnemonicAlias<"pushf", "pushfl", "att">, Requires<[In32BitMode]>;
def : MnemonicAlias<"pushf", "pushfq", "att">, Requires<[In64BitMode]>;
def : MnemonicAlias<"pushfd", "pushfl", "att">;
def : MnemonicAlias<"popad", "popa", "intel">, Requires<[In32BitMode]>;
def : MnemonicAlias<"pushad", "pusha", "intel">, Requires<[In32BitMode]>;
def : MnemonicAlias<"repe", "rep", "att">;
def : MnemonicAlias<"repz", "rep", "att">;
def : MnemonicAlias<"repnz", "repne", "att">;
@ -1919,29 +1922,31 @@ def : MnemonicAlias<"fucomip", "fucompi", "att">;
def : MnemonicAlias<"fwait", "wait", "att">;
class CondCodeAlias<string Prefix,string Suffix, string OldCond, string NewCond>
class CondCodeAlias<string Prefix,string Suffix, string OldCond, string NewCond,
string VariantName>
: MnemonicAlias<!strconcat(Prefix, OldCond, Suffix),
!strconcat(Prefix, NewCond, Suffix)>;
!strconcat(Prefix, NewCond, Suffix), VariantName>;
/// IntegerCondCodeMnemonicAlias - This multiclass defines a bunch of
/// MnemonicAlias's that canonicalize the condition code in a mnemonic, for
/// example "setz" -> "sete".
multiclass IntegerCondCodeMnemonicAlias<string Prefix, string Suffix> {
def C : CondCodeAlias<Prefix, Suffix, "c", "b">; // setc -> setb
def Z : CondCodeAlias<Prefix, Suffix, "z" , "e">; // setz -> sete
def NA : CondCodeAlias<Prefix, Suffix, "na", "be">; // setna -> setbe
def NB : CondCodeAlias<Prefix, Suffix, "nb", "ae">; // setnb -> setae
def NC : CondCodeAlias<Prefix, Suffix, "nc", "ae">; // setnc -> setae
def NG : CondCodeAlias<Prefix, Suffix, "ng", "le">; // setng -> setle
def NL : CondCodeAlias<Prefix, Suffix, "nl", "ge">; // setnl -> setge
def NZ : CondCodeAlias<Prefix, Suffix, "nz", "ne">; // setnz -> setne
def PE : CondCodeAlias<Prefix, Suffix, "pe", "p">; // setpe -> setp
def PO : CondCodeAlias<Prefix, Suffix, "po", "np">; // setpo -> setnp
multiclass IntegerCondCodeMnemonicAlias<string Prefix, string Suffix,
string V = ""> {
def C : CondCodeAlias<Prefix, Suffix, "c", "b", V>; // setc -> setb
def Z : CondCodeAlias<Prefix, Suffix, "z" , "e", V>; // setz -> sete
def NA : CondCodeAlias<Prefix, Suffix, "na", "be", V>; // setna -> setbe
def NB : CondCodeAlias<Prefix, Suffix, "nb", "ae", V>; // setnb -> setae
def NC : CondCodeAlias<Prefix, Suffix, "nc", "ae", V>; // setnc -> setae
def NG : CondCodeAlias<Prefix, Suffix, "ng", "le", V>; // setng -> setle
def NL : CondCodeAlias<Prefix, Suffix, "nl", "ge", V>; // setnl -> setge
def NZ : CondCodeAlias<Prefix, Suffix, "nz", "ne", V>; // setnz -> setne
def PE : CondCodeAlias<Prefix, Suffix, "pe", "p", V>; // setpe -> setp
def PO : CondCodeAlias<Prefix, Suffix, "po", "np", V>; // setpo -> setnp
def NAE : CondCodeAlias<Prefix, Suffix, "nae", "b">; // setnae -> setb
def NBE : CondCodeAlias<Prefix, Suffix, "nbe", "a">; // setnbe -> seta
def NGE : CondCodeAlias<Prefix, Suffix, "nge", "l">; // setnge -> setl
def NLE : CondCodeAlias<Prefix, Suffix, "nle", "g">; // setnle -> setg
def NAE : CondCodeAlias<Prefix, Suffix, "nae", "b", V>; // setnae -> setb
def NBE : CondCodeAlias<Prefix, Suffix, "nbe", "a", V>; // setnbe -> seta
def NGE : CondCodeAlias<Prefix, Suffix, "nge", "l", V>; // setnge -> setl
def NLE : CondCodeAlias<Prefix, Suffix, "nle", "g", V>; // setnle -> setg
}
// Aliases for set<CC>
@ -1949,9 +1954,11 @@ defm : IntegerCondCodeMnemonicAlias<"set", "">;
// Aliases for j<CC>
defm : IntegerCondCodeMnemonicAlias<"j", "">;
// Aliases for cmov<CC>{w,l,q}
defm : IntegerCondCodeMnemonicAlias<"cmov", "w">;
defm : IntegerCondCodeMnemonicAlias<"cmov", "l">;
defm : IntegerCondCodeMnemonicAlias<"cmov", "q">;
defm : IntegerCondCodeMnemonicAlias<"cmov", "w", "att">;
defm : IntegerCondCodeMnemonicAlias<"cmov", "l", "att">;
defm : IntegerCondCodeMnemonicAlias<"cmov", "q", "att">;
// No size suffix for intel-style asm.
defm : IntegerCondCodeMnemonicAlias<"cmov", "", "intel">;
//===----------------------------------------------------------------------===//