mirror of
https://git.FreeBSD.org/src.git
synced 2024-12-15 10:17:20 +00:00
MFhead@r323646
This commit is contained in:
Enji Cooper
commit
b78bcbac59
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/projects/runtime-coverage/; revision=323653
@ -214,7 +214,7 @@ String and integer values can be set using
|
||||
.It "kern.filedelay integer yes"
|
||||
.It "kern.dirdelay integer yes"
|
||||
.It "kern.metadelay integer yes"
|
||||
.It "kern.osreldate string no"
|
||||
.It "kern.osreldate integer no"
|
||||
.It "kern.bootfile string yes"
|
||||
.It "kern.corefile string yes"
|
||||
.It "kern.logsigexit integer yes"
|
||||
|
||||
@ -101,7 +101,7 @@ _SKIP_DEPEND= 1
|
||||
CLEANFILES?=
|
||||
|
||||
.for _S in ${SRCS:N*.[dhly]}
|
||||
OBJS_DEPEND_GUESS.${_S:R}.o+= ${_S}
|
||||
OBJS_DEPEND_GUESS.${_S:${OBJS_SRCS_FILTER:ts:}}.o+= ${_S}
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||||
.endfor
|
||||
|
||||
# Lexical analyzers
|
||||
@ -180,7 +180,7 @@ DEPEND_MP?= -MP
|
||||
DEPEND_FILTER= C,/,_,g
|
||||
DEPENDSRCS= ${SRCS:M*.[cSC]} ${SRCS:M*.cxx} ${SRCS:M*.cpp} ${SRCS:M*.cc}
|
||||
.if !empty(DEPENDSRCS)
|
||||
DEPENDOBJS+= ${DEPENDSRCS:R:S,$,.o,}
|
||||
DEPENDOBJS+= ${DEPENDSRCS:${OBJS_SRCS_FILTER:ts:}:S,$,.o,}
|
||||
.endif
|
||||
DEPENDFILES_OBJS= ${DEPENDOBJS:O:u:${DEPEND_FILTER}:C/^/${DEPENDFILE}./}
|
||||
.if defined(_SKIP_DEPEND)
|
||||
|
||||
@ -16,6 +16,10 @@ __<bsd.init.mk>__:
|
||||
.include <bsd.own.mk>
|
||||
.MAIN: all
|
||||
|
||||
# This is used in bsd.{dep,lib,prog}.mk as ${OBJS_SRCS_FILTER:ts:}
|
||||
# Some makefiles may want T as well to avoid nested objdirs.
|
||||
OBJS_SRCS_FILTER+= R
|
||||
|
||||
# Handle INSTALL_AS_USER here to maximize the chance that
|
||||
# it has final authority over fooOWN and fooGRP.
|
||||
.if ${MK_INSTALL_AS_USER} != "no"
|
||||
|
||||
@ -193,7 +193,7 @@ LDFLAGS+= -Wl,--version-script=${VERSION_MAP}
|
||||
.endif
|
||||
|
||||
.if defined(LIB) && !empty(LIB) || defined(SHLIB_NAME)
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||||
OBJS+= ${SRCS:N*.h:R:S/$/.o/}
|
||||
OBJS+= ${SRCS:N*.h:${OBJS_SRCS_FILTER:ts:}:S/$/.o/}
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||||
CLEANFILES+= ${OBJS} ${STATICOBJS}
|
||||
.endif
|
||||
|
||||
@ -483,13 +483,13 @@ lint: ${SRCS:M*.c}
|
||||
.if defined(LIB) && !empty(LIB)
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||||
OBJS_DEPEND_GUESS+= ${SRCS:M*.h}
|
||||
.for _S in ${SRCS:N*.[hly]}
|
||||
OBJS_DEPEND_GUESS.${_S:R}.po+= ${_S}
|
||||
OBJS_DEPEND_GUESS.${_S:${OBJS_SRCS_FILTER:ts:}}.po+= ${_S}
|
||||
.endfor
|
||||
.endif
|
||||
.if defined(SHLIB_NAME) || \
|
||||
defined(INSTALL_PIC_ARCHIVE) && defined(LIB) && !empty(LIB)
|
||||
.for _S in ${SRCS:N*.[hly]}
|
||||
OBJS_DEPEND_GUESS.${_S:R}.pico+= ${_S}
|
||||
OBJS_DEPEND_GUESS.${_S:${OBJS_SRCS_FILTER:ts:}}.pico+= ${_S}
|
||||
OBJS_DEPEND_GUESS.${_S:R}.ppico+= ${_S}
|
||||
.endfor
|
||||
.endif
|
||||
|
||||
@ -100,7 +100,7 @@ PROGNAME?= ${PROG}
|
||||
|
||||
.if defined(SRCS)
|
||||
|
||||
OBJS+= ${SRCS:N*.h:R:S/$/.o/g}
|
||||
OBJS+= ${SRCS:N*.h:${OBJS_SRCS_FILTER:ts:}:S/$/.o/g}
|
||||
|
||||
.if target(beforelinking)
|
||||
beforelinking: ${OBJS}
|
||||
|
||||
@ -197,6 +197,8 @@ struct a10_gpio_softc {
|
||||
|
||||
static int a10_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *value);
|
||||
static int a10_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value);
|
||||
static int a10_gpio_pin_get_locked(struct a10_gpio_softc *sc, uint32_t pin, unsigned int *value);
|
||||
static int a10_gpio_pin_set_locked(struct a10_gpio_softc *sc, uint32_t pin, unsigned int value);
|
||||
|
||||
#define A10_GPIO_WRITE(_sc, _off, _val) \
|
||||
bus_space_write_4(_sc->sc_bst, _sc->sc_bsh, _off, _val)
|
||||
@ -333,15 +335,15 @@ a10_gpio_pin_configure(struct a10_gpio_softc *sc, uint32_t pin, uint32_t flags)
|
||||
err = a10_gpio_set_function(sc, pin, A10_GPIO_INPUT);
|
||||
} else if (flags & GPIO_PIN_OUTPUT) {
|
||||
if (flags & GPIO_PIN_PRESET_LOW) {
|
||||
a10_gpio_pin_set(sc->sc_dev, pin, 0);
|
||||
a10_gpio_pin_set_locked(sc, pin, 0);
|
||||
} else if (flags & GPIO_PIN_PRESET_HIGH) {
|
||||
a10_gpio_pin_set(sc->sc_dev, pin, 1);
|
||||
a10_gpio_pin_set_locked(sc, pin, 1);
|
||||
} else {
|
||||
/* Read the pin and preset output to current state. */
|
||||
err = a10_gpio_set_function(sc, pin, A10_GPIO_INPUT);
|
||||
if (err == 0) {
|
||||
a10_gpio_pin_get(sc->sc_dev, pin, &val);
|
||||
a10_gpio_pin_set(sc->sc_dev, pin, val);
|
||||
a10_gpio_pin_get_locked(sc, pin, &val);
|
||||
a10_gpio_pin_set_locked(sc, pin, val);
|
||||
}
|
||||
}
|
||||
if (err == 0)
|
||||
@ -473,27 +475,61 @@ a10_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
|
||||
}
|
||||
|
||||
static int
|
||||
a10_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
|
||||
a10_gpio_pin_set_locked(struct a10_gpio_softc *sc, uint32_t pin,
|
||||
unsigned int value)
|
||||
{
|
||||
struct a10_gpio_softc *sc;
|
||||
uint32_t bank, data;
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||||
|
||||
sc = device_get_softc(dev);
|
||||
A10_GPIO_LOCK_ASSERT(sc);
|
||||
|
||||
if (pin > sc->padconf->npins)
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||||
return (EINVAL);
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||||
|
||||
bank = sc->padconf->pins[pin].port;
|
||||
pin = sc->padconf->pins[pin].pin;
|
||||
|
||||
A10_GPIO_LOCK(sc);
|
||||
data = A10_GPIO_READ(sc, A10_GPIO_GP_DAT(bank));
|
||||
if (value)
|
||||
data |= (1 << pin);
|
||||
else
|
||||
data &= ~(1 << pin);
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||||
A10_GPIO_WRITE(sc, A10_GPIO_GP_DAT(bank), data);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
a10_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
|
||||
{
|
||||
struct a10_gpio_softc *sc;
|
||||
int ret;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
|
||||
A10_GPIO_LOCK(sc);
|
||||
ret = a10_gpio_pin_set_locked(sc, pin, value);
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||||
A10_GPIO_UNLOCK(sc);
|
||||
|
||||
return (ret);
|
||||
}
|
||||
|
||||
static int
|
||||
a10_gpio_pin_get_locked(struct a10_gpio_softc *sc,uint32_t pin,
|
||||
unsigned int *val)
|
||||
{
|
||||
uint32_t bank, reg_data;
|
||||
|
||||
A10_GPIO_LOCK_ASSERT(sc);
|
||||
|
||||
if (pin > sc->padconf->npins)
|
||||
return (EINVAL);
|
||||
|
||||
bank = sc->padconf->pins[pin].port;
|
||||
pin = sc->padconf->pins[pin].pin;
|
||||
|
||||
reg_data = A10_GPIO_READ(sc, A10_GPIO_GP_DAT(bank));
|
||||
*val = (reg_data & (1 << pin)) ? 1 : 0;
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
@ -501,21 +537,15 @@ static int
|
||||
a10_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
|
||||
{
|
||||
struct a10_gpio_softc *sc;
|
||||
uint32_t bank, reg_data;
|
||||
int ret;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
if (pin > sc->padconf->npins)
|
||||
return (EINVAL);
|
||||
|
||||
bank = sc->padconf->pins[pin].port;
|
||||
pin = sc->padconf->pins[pin].pin;
|
||||
|
||||
A10_GPIO_LOCK(sc);
|
||||
reg_data = A10_GPIO_READ(sc, A10_GPIO_GP_DAT(bank));
|
||||
ret = a10_gpio_pin_get_locked(sc, pin, val);
|
||||
A10_GPIO_UNLOCK(sc);
|
||||
*val = (reg_data & (1 << pin)) ? 1 : 0;
|
||||
|
||||
return (0);
|
||||
return (ret);
|
||||
}
|
||||
|
||||
static int
|
||||
|
||||
@ -53,52 +53,89 @@ __FBSDID("$FreeBSD$");
|
||||
|
||||
#include "phy_if.h"
|
||||
|
||||
#define USBPHY_NPHYS 4
|
||||
#define USBPHY_NRES USBPHY_NPHYS
|
||||
|
||||
enum awusbphy_type {
|
||||
AWUSBPHY_TYPE_A10 = 1,
|
||||
AWUSBPHY_TYPE_A13,
|
||||
AWUSBPHY_TYPE_A20,
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||||
AWUSBPHY_TYPE_A31,
|
||||
AWUSBPHY_TYPE_A83T,
|
||||
AWUSBPHY_TYPE_H3,
|
||||
AWUSBPHY_TYPE_A64
|
||||
};
|
||||
|
||||
struct aw_usbphy_conf {
|
||||
int num_phys;
|
||||
enum awusbphy_type phy_type;
|
||||
bool pmu_unk1;
|
||||
bool phy0_route;
|
||||
};
|
||||
|
||||
static const struct aw_usbphy_conf a10_usbphy_conf = {
|
||||
.num_phys = 3,
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||||
.phy_type = AWUSBPHY_TYPE_A10,
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.pmu_unk1 = false,
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.phy0_route = false,
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||||
};
|
||||
|
||||
static const struct aw_usbphy_conf a13_usbphy_conf = {
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||||
.num_phys = 2,
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||||
.phy_type = AWUSBPHY_TYPE_A13,
|
||||
.pmu_unk1 = false,
|
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.phy0_route = false,
|
||||
};
|
||||
|
||||
static const struct aw_usbphy_conf a20_usbphy_conf = {
|
||||
.num_phys = 3,
|
||||
.phy_type = AWUSBPHY_TYPE_A20,
|
||||
.pmu_unk1 = false,
|
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.phy0_route = false,
|
||||
};
|
||||
|
||||
static const struct aw_usbphy_conf a31_usbphy_conf = {
|
||||
.num_phys = 3,
|
||||
.phy_type = AWUSBPHY_TYPE_A31,
|
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.pmu_unk1 = false,
|
||||
.phy0_route = false,
|
||||
};
|
||||
|
||||
static const struct aw_usbphy_conf h3_usbphy_conf = {
|
||||
.num_phys = 4,
|
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.phy_type = AWUSBPHY_TYPE_H3,
|
||||
.pmu_unk1 = true,
|
||||
.phy0_route = false,
|
||||
};
|
||||
|
||||
static const struct aw_usbphy_conf a64_usbphy_conf = {
|
||||
.num_phys = 2,
|
||||
.phy_type = AWUSBPHY_TYPE_A64,
|
||||
.pmu_unk1 = true,
|
||||
.phy0_route = true,
|
||||
};
|
||||
|
||||
static struct ofw_compat_data compat_data[] = {
|
||||
{ "allwinner,sun4i-a10-usb-phy", AWUSBPHY_TYPE_A10 },
|
||||
{ "allwinner,sun5i-a13-usb-phy", AWUSBPHY_TYPE_A13 },
|
||||
{ "allwinner,sun6i-a31-usb-phy", AWUSBPHY_TYPE_A31 },
|
||||
{ "allwinner,sun7i-a20-usb-phy", AWUSBPHY_TYPE_A20 },
|
||||
{ "allwinner,sun8i-a83t-usb-phy", AWUSBPHY_TYPE_A83T },
|
||||
{ "allwinner,sun8i-h3-usb-phy", AWUSBPHY_TYPE_H3 },
|
||||
{ "allwinner,sun50i-a64-usb-phy", AWUSBPHY_TYPE_A64 },
|
||||
{ "allwinner,sun4i-a10-usb-phy", (uintptr_t)&a10_usbphy_conf },
|
||||
{ "allwinner,sun5i-a13-usb-phy", (uintptr_t)&a13_usbphy_conf },
|
||||
{ "allwinner,sun6i-a31-usb-phy", (uintptr_t)&a31_usbphy_conf },
|
||||
{ "allwinner,sun7i-a20-usb-phy", (uintptr_t)&a20_usbphy_conf },
|
||||
{ "allwinner,sun8i-h3-usb-phy", (uintptr_t)&h3_usbphy_conf },
|
||||
{ "allwinner,sun50i-a64-usb-phy", (uintptr_t)&a64_usbphy_conf },
|
||||
{ NULL, 0 }
|
||||
};
|
||||
|
||||
struct awusbphy_softc {
|
||||
struct resource * res[USBPHY_NRES];
|
||||
regulator_t reg[USBPHY_NPHYS];
|
||||
struct resource * phy_ctrl;
|
||||
struct resource ** pmu;
|
||||
regulator_t * reg;
|
||||
gpio_pin_t id_det_pin;
|
||||
int id_det_valid;
|
||||
gpio_pin_t vbus_det_pin;
|
||||
int vbus_det_valid;
|
||||
enum awusbphy_type phy_type;
|
||||
struct aw_usbphy_conf *phy_conf;
|
||||
};
|
||||
|
||||
static struct resource_spec awusbphy_spec[] = {
|
||||
{ SYS_RES_MEMORY, 0, RF_ACTIVE },
|
||||
{ SYS_RES_MEMORY, 1, RF_ACTIVE },
|
||||
{ SYS_RES_MEMORY, 2, RF_ACTIVE | RF_OPTIONAL },
|
||||
{ SYS_RES_MEMORY, 3, RF_ACTIVE | RF_OPTIONAL },
|
||||
{ -1, 0 }
|
||||
};
|
||||
|
||||
#define RD4(sc, i, o) bus_read_4((sc)->res[(i)], (o))
|
||||
#define WR4(sc, i, o, v) bus_write_4((sc)->res[(i)], (o), (v))
|
||||
#define CLR4(sc, i, o, m) WR4(sc, i, o, RD4(sc, i, o) & ~(m))
|
||||
#define SET4(sc, i, o, m) WR4(sc, i, o, RD4(sc, i, o) | (m))
|
||||
#define RD4(res, o) bus_read_4(res, (o))
|
||||
#define WR4(res, o, v) bus_write_4(res, (o), (v))
|
||||
#define CLR4(res, o, m) WR4(res, o, RD4(res, o) & ~(m))
|
||||
#define SET4(res, o, m) WR4(res, o, RD4(res, o) | (m))
|
||||
|
||||
#define OTG_PHY_CFG 0x20
|
||||
#define OTG_PHY_ROUTE_OTG (1 << 0)
|
||||
@ -117,24 +154,21 @@ awusbphy_configure(device_t dev, int phyno)
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
|
||||
if (sc->res[phyno] == NULL)
|
||||
if (sc->pmu[phyno] == NULL)
|
||||
return;
|
||||
|
||||
if (sc->phy_type == AWUSBPHY_TYPE_A64) {
|
||||
CLR4(sc, phyno, PMU_UNK_H3, PMU_UNK_H3_CLR);
|
||||
if (sc->phy_conf->pmu_unk1 == true)
|
||||
CLR4(sc->phy_ctrl, PMU_UNK_H3, PMU_UNK_H3_CLR);
|
||||
|
||||
/* EHCI0 and OTG share a PHY */
|
||||
if (sc->phy_conf->phy0_route == true) {
|
||||
if (phyno == 0)
|
||||
SET4(sc, 0, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG);
|
||||
else if (phyno == 1)
|
||||
CLR4(sc, 0, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG);
|
||||
SET4(sc->phy_ctrl, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG);
|
||||
else
|
||||
CLR4(sc->phy_ctrl, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG);
|
||||
}
|
||||
|
||||
if (phyno > 0) {
|
||||
/* Enable passby */
|
||||
SET4(sc, phyno, PMU_IRQ_ENABLE, PMU_ULPI_BYPASS |
|
||||
PMU_AHB_INCR8 | PMU_AHB_INCR4 | PMU_AHB_INCRX_ALIGN);
|
||||
}
|
||||
SET4(sc->pmu[phyno], PMU_IRQ_ENABLE, PMU_ULPI_BYPASS |
|
||||
PMU_AHB_INCR8 | PMU_AHB_INCR4 | PMU_AHB_INCRX_ALIGN);
|
||||
}
|
||||
|
||||
static int
|
||||
@ -143,7 +177,7 @@ awusbphy_init(device_t dev)
|
||||
struct awusbphy_softc *sc;
|
||||
phandle_t node;
|
||||
char pname[20];
|
||||
int error, off;
|
||||
int error, off, rid;
|
||||
regulator_t reg;
|
||||
hwreset_t rst;
|
||||
clk_t clk;
|
||||
@ -151,7 +185,19 @@ awusbphy_init(device_t dev)
|
||||
sc = device_get_softc(dev);
|
||||
node = ofw_bus_get_node(dev);
|
||||
|
||||
sc->phy_type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
|
||||
sc->phy_conf = (struct aw_usbphy_conf *)ofw_bus_search_compatible(dev, compat_data)->ocd_data;
|
||||
|
||||
/* Get phy_ctrl region */
|
||||
if (ofw_bus_find_string_index(node, "reg-names", "phy_ctrl", &rid) != 0) {
|
||||
device_printf(dev, "Cannot locate phy control resource\n");
|
||||
return (ENXIO);
|
||||
}
|
||||
sc->phy_ctrl = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
|
||||
RF_ACTIVE);
|
||||
if (sc->phy_ctrl == NULL) {
|
||||
device_printf(dev, "Cannot allocate resource\n");
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
/* Enable clocks */
|
||||
for (off = 0; clk_get_by_ofw_index(dev, 0, off, &clk) == 0; off++) {
|
||||
@ -173,13 +219,6 @@ awusbphy_init(device_t dev)
|
||||
}
|
||||
}
|
||||
|
||||
/* Get regulators */
|
||||
for (off = 0; off < USBPHY_NPHYS; off++) {
|
||||
snprintf(pname, sizeof(pname), "usb%d_vbus-supply", off);
|
||||
if (regulator_get_by_ofw_property(dev, 0, pname, ®) == 0)
|
||||
sc->reg[off] = reg;
|
||||
}
|
||||
|
||||
/* Get GPIOs */
|
||||
error = gpio_pin_get_by_ofw_property(dev, node, "usb0_id_det-gpios",
|
||||
&sc->id_det_pin);
|
||||
@ -190,9 +229,28 @@ awusbphy_init(device_t dev)
|
||||
if (error == 0)
|
||||
sc->vbus_det_valid = 1;
|
||||
|
||||
/* Allocate resources */
|
||||
if (bus_alloc_resources(dev, awusbphy_spec, sc->res) != 0)
|
||||
device_printf(dev, "couldn't allocate resources\n");
|
||||
sc->reg = malloc(sizeof(*(sc->reg)) * sc->phy_conf->num_phys, M_DEVBUF,
|
||||
M_WAITOK | M_ZERO);
|
||||
sc->pmu = malloc(sizeof(*(sc->pmu)) * sc->phy_conf->num_phys, M_DEVBUF,
|
||||
M_WAITOK | M_ZERO);
|
||||
/* Get regulators */
|
||||
for (off = 0; off < sc->phy_conf->num_phys; off++) {
|
||||
snprintf(pname, sizeof(pname), "usb%d_vbus-supply", off);
|
||||
if (regulator_get_by_ofw_property(dev, 0, pname, ®) == 0)
|
||||
sc->reg[off] = reg;
|
||||
|
||||
snprintf(pname, sizeof(pname), "pmu%d", off);
|
||||
if (ofw_bus_find_string_index(node, "reg-names",
|
||||
pname, &rid) != 0)
|
||||
continue;
|
||||
|
||||
sc->pmu[off] = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
|
||||
RF_ACTIVE);
|
||||
if (sc->pmu[off] == NULL) {
|
||||
device_printf(dev, "Cannot allocate resource\n");
|
||||
return (ENXIO);
|
||||
}
|
||||
}
|
||||
|
||||
return (0);
|
||||
}
|
||||
@ -225,11 +283,11 @@ awusbphy_phy_enable(device_t dev, intptr_t phy, bool enable)
|
||||
regulator_t reg;
|
||||
int error, vbus_det;
|
||||
|
||||
if (phy < 0 || phy >= USBPHY_NPHYS)
|
||||
return (ERANGE);
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
|
||||
if (phy < 0 || phy >= sc->phy_conf->num_phys)
|
||||
return (ERANGE);
|
||||
|
||||
/* Configure PHY */
|
||||
awusbphy_configure(dev, phy);
|
||||
|
||||
|
||||
@ -66,8 +66,8 @@ static struct aw_ccung_reset a64_ccu_resets[] = {
|
||||
CCU_RESET(A64_RST_BUS_OTG, 0x2c0, 23)
|
||||
CCU_RESET(A64_RST_BUS_EHCI0, 0x2c0, 24)
|
||||
CCU_RESET(A64_RST_BUS_EHCI1, 0x2c0, 25)
|
||||
CCU_RESET(A64_RST_BUS_OHCI0, 0x2c0, 26)
|
||||
CCU_RESET(A64_RST_BUS_OHCI1, 0x2c0, 27)
|
||||
CCU_RESET(A64_RST_BUS_OHCI0, 0x2c0, 28)
|
||||
CCU_RESET(A64_RST_BUS_OHCI1, 0x2c0, 29)
|
||||
|
||||
CCU_RESET(A64_RST_BUS_VE, 0x2c4, 0)
|
||||
CCU_RESET(A64_RST_BUS_TCON0, 0x2c4, 3)
|
||||
@ -119,8 +119,8 @@ static struct aw_ccung_gate a64_ccu_gates[] = {
|
||||
CCU_GATE(A64_CLK_BUS_OTG, "bus-otg", "ahb1", 0x60, 23)
|
||||
CCU_GATE(A64_CLK_BUS_EHCI0, "bus-ehci0", "ahb1", 0x60, 24)
|
||||
CCU_GATE(A64_CLK_BUS_EHCI1, "bus-ehci1", "ahb2", 0x60, 25)
|
||||
CCU_GATE(A64_CLK_BUS_OHCI0, "bus-ohci0", "ahb1", 0x60, 26)
|
||||
CCU_GATE(A64_CLK_BUS_OHCI1, "bus-ohci1", "ahb2", 0x60, 27)
|
||||
CCU_GATE(A64_CLK_BUS_OHCI0, "bus-ohci0", "ahb1", 0x60, 28)
|
||||
CCU_GATE(A64_CLK_BUS_OHCI1, "bus-ohci1", "ahb2", 0x60, 29)
|
||||
|
||||
CCU_GATE(A64_CLK_BUS_VE, "bus-ve", "ahb1", 0x64, 0)
|
||||
CCU_GATE(A64_CLK_BUS_TCON0, "bus-tcon0", "ahb1", 0x64, 3)
|
||||
|
||||
@ -2,6 +2,6 @@
|
||||
|
||||
.PATH: ${SRCTOP}/sys/dev/iicbus
|
||||
KMOD = ds1307
|
||||
SRCS = ds1307.c bus_if.h clock_if.h device_if.h iicbus_if.h ofw_bus_if.h
|
||||
SRCS = ds1307.c bus_if.h clock_if.h device_if.h iicbus_if.h ofw_bus_if.h opt_platform.h
|
||||
|
||||
.include <bsd.kmod.mk>
|
||||
|
||||
@ -2,6 +2,6 @@
|
||||
|
||||
.PATH: ${SRCTOP}/sys/dev/iicbus
|
||||
KMOD = ds13rtc
|
||||
SRCS = ds13rtc.c bus_if.h clock_if.h device_if.h iicbus_if.h ofw_bus_if.h
|
||||
SRCS = ds13rtc.c bus_if.h clock_if.h device_if.h iicbus_if.h ofw_bus_if.h opt_platform.h
|
||||
|
||||
.include <bsd.kmod.mk>
|
||||
|
||||
@ -2,6 +2,6 @@
|
||||
|
||||
.PATH: ${SRCTOP}/sys/dev/iicbus
|
||||
KMOD = ds3231
|
||||
SRCS = ds3231.c bus_if.h clock_if.h device_if.h iicbus_if.h ofw_bus_if.h
|
||||
SRCS = ds3231.c bus_if.h clock_if.h device_if.h iicbus_if.h ofw_bus_if.h opt_platform.h
|
||||
|
||||
.include <bsd.kmod.mk>
|
||||
|
||||
@ -2,6 +2,6 @@
|
||||
|
||||
.PATH: ${SRCTOP}/sys/dev/iicbus
|
||||
KMOD = isl12xx
|
||||
SRCS = isl12xx.c bus_if.h clock_if.h device_if.h iicbus_if.h ofw_bus_if.h
|
||||
SRCS = isl12xx.c bus_if.h clock_if.h device_if.h iicbus_if.h ofw_bus_if.h opt_platform.h
|
||||
|
||||
.include <bsd.kmod.mk>
|
||||
|
||||
@ -2,6 +2,6 @@
|
||||
|
||||
.PATH: ${SRCTOP}/sys/dev/iicbus
|
||||
KMOD = nxprtc
|
||||
SRCS = nxprtc.c bus_if.h clock_if.h device_if.h iicbus_if.h ofw_bus_if.h
|
||||
SRCS = nxprtc.c bus_if.h clock_if.h device_if.h iicbus_if.h ofw_bus_if.h opt_platform.h
|
||||
|
||||
.include <bsd.kmod.mk>
|
||||
|
||||
@ -2,6 +2,6 @@
|
||||
|
||||
.PATH: ${SRCTOP}/sys/dev/iicbus
|
||||
KMOD = s35390a
|
||||
SRCS = s35390a.c bus_if.h clock_if.h device_if.h iicbus_if.h ofw_bus_if.h
|
||||
SRCS = s35390a.c bus_if.h clock_if.h device_if.h iicbus_if.h ofw_bus_if.h opt_platform.h
|
||||
|
||||
.include <bsd.kmod.mk>
|
||||
|
||||
Loading…
Reference in New Issue
Block a user