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Use the meaningful mnemonics for ancillary state registers now that gas

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is invoked properly to understand them.

	%asr19 -> %gsr
	%asr20 -> %set_softint
	%asr21 -> %clear_softint
This commit is contained in:
Jake Burkholder 2002-12-29 00:23:48 +00:00
parent 418a8ca992
commit bc4ede2030
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=108379
3 changed files with 7 additions and 8 deletions
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11
sys/sparc64/sparc64/exception.S
View File

@ -2178,7 +2178,7 @@ ENTRY(tl0_trap)
wr %g0, FPRS_FEF, %fprs
stx %fsr, [%sp + SPOFF + CCFSZ + TF_FSR]
rd %asr19, %l6
rd %gsr, %l6
stx %l6, [%sp + SPOFF + CCFSZ + TF_GSR]
wr %g0, 0, %fprs
@ -2245,7 +2245,7 @@ ENTRY(tl0_intr)
#endif
wrpr %o0, 0, %pil
wr %o1, 0, %asr21
wr %o1, 0, %clear_softint
and %l5, WSTATE_NORMAL_MASK, %l5
sllx %l5, WSTATE_OTHER_SHIFT, %l5
@ -2265,7 +2265,7 @@ ENTRY(tl0_intr)
wr %g0, FPRS_FEF, %fprs
stx %fsr, [%sp + SPOFF + CCFSZ + TF_FSR]
rd %asr19, %l6
rd %gsr, %l6
stx %l6, [%sp + SPOFF + CCFSZ + TF_GSR]
wr %g0, 0, %fprs
@ -2442,11 +2442,10 @@ ENTRY(tl0_ret)
/*
* Restore %fsr and %gsr. These need floating point enabled in %fprs,
* so we set it temporarily and then clear it.
* XXX %asr19 should be %gsr but gas is invoked incorrectly.
*/
wr %g0, FPRS_FEF, %fprs
ldx [%sp + SPOFF + CCFSZ + TF_FSR], %fsr
wr %l1, 0, %asr19
wr %l1, 0, %gsr
wr %g0, 0, %fprs
/*
@ -2769,7 +2768,7 @@ ENTRY(tl1_intr)
#endif
wrpr %o0, 0, %pil
wr %o1, 0, %asr21
wr %o1, 0, %clear_softint
wrpr %g0, 1, %tl

2
sys/sparc64/sparc64/interrupt.S
View File

@ -140,7 +140,7 @@ ENTRY(intr_vector)
*/
mov 1, %g1
sllx %g1, %g6, %g1
wr %g1, 0, %asr20
wr %g1, 0, %set_softint
/*
* Done, retry the instruction.

2
sys/sparc64/sparc64/mp_exception.S
View File

@ -141,7 +141,7 @@ ENTRY(tl_ipi_level)
mov 1, %g1
sllx %g1, %g5, %g1
wr %g1, 0, %asr20
wr %g1, 0, %set_softint
retry
END(tl_ipi_level)