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Correct MSI mode register bits.

This commit is contained in:
Pyun YongHyeon 2009-11-06 01:11:59 +00:00
parent 2259d74c68
commit c3bbfed430
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=198967

View File

@ -1705,11 +1705,8 @@
/* MSI mode register */
#define BGE_MSIMODE_RESET 0x00000001
#define BGE_MSIMODE_ENABLE 0x00000002
#define BGE_MSIMODE_PCI_TGT_ABRT_ATTN 0x00000004
#define BGE_MSIMODE_PCI_MSTR_ABRT_ATTN 0x00000008
#define BGE_MSIMODE_PCI_PERR_ATTN 0x00000010
#define BGE_MSIMODE_MSI_FIFOUFLOW_ATTN 0x00000020
#define BGE_MSIMODE_MSI_FIFOOFLOW_ATTN 0x00000040
#define BGE_MSIMODE_ONE_SHOT_DISABLE 0x00000020
#define BGE_MSIMODE_MULTIVEC_ENABLE 0x00000080
/* MSI status register */
#define BGE_MSISTAT_PCI_TGT_ABRT_ATTN 0x00000004