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Correct MSI mode register bits.
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=198967
@ -1705,11 +1705,8 @@
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/* MSI mode register */
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#define BGE_MSIMODE_RESET 0x00000001
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#define BGE_MSIMODE_ENABLE 0x00000002
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#define BGE_MSIMODE_PCI_TGT_ABRT_ATTN 0x00000004
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#define BGE_MSIMODE_PCI_MSTR_ABRT_ATTN 0x00000008
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#define BGE_MSIMODE_PCI_PERR_ATTN 0x00000010
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#define BGE_MSIMODE_MSI_FIFOUFLOW_ATTN 0x00000020
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#define BGE_MSIMODE_MSI_FIFOOFLOW_ATTN 0x00000040
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#define BGE_MSIMODE_ONE_SHOT_DISABLE 0x00000020
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#define BGE_MSIMODE_MULTIVEC_ENABLE 0x00000080
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/* MSI status register */
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#define BGE_MSISTAT_PCI_TGT_ABRT_ATTN 0x00000004
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