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Regenerate
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commit
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=59476
@ -4,7 +4,7 @@
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* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
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* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
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*
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*
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* generated from:
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* generated from:
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* Id: miidevs,v 1.3 1999/08/29 15:42:04 wpaul Exp
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* FreeBSD: src/sys/dev/mii/miidevs,v 1.5 2000/04/22 01:54:55 wpaul Exp
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*/
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*/
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/*$NetBSD: miidevs,v 1.6 1999/05/14 11:37:30 drochner Exp $*/
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/*$NetBSD: miidevs,v 1.6 1999/05/14 11:37:30 drochner Exp $*/
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@ -67,17 +67,19 @@
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#define MII_OUI_SEEQ 0x00a07d /* Seeq */
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#define MII_OUI_SEEQ 0x00a07d /* Seeq */
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#define MII_OUI_SIS 0x00e006 /* Silicon Integrated Systems */
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#define MII_OUI_SIS 0x00e006 /* Silicon Integrated Systems */
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#define MII_OUI_TI 0x080028 /* Texas Instruments */
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#define MII_OUI_TI 0x080028 /* Texas Instruments */
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#define MII_OUI_XAQTI 0x00e0ae /* XaQti Corp. */
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/* in the 79c873, AMD uses another OUI (which matches Davicom!) */
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/* in the 79c873, AMD uses another OUI (which matches Davicom!) */
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#define MII_OUI_xxAMD 0x00606e /* Advanced Micro Devices */
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#define MII_OUI_xxAMD 0x00606e /* Advanced Micro Devices */
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/* some vendors have the bits swapped within bytes
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/* some vendors have the bits swapped within bytes
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(ie, ordered as on the wire) */
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(ie, ordered as on the wire) */
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#define MII_OUI_xxBROADCOM 0x000818 /* Broadcom Corporation */
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#define MII_OUI_xxICS 0x00057d /* Integrated Circuit Systems */
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#define MII_OUI_xxICS 0x00057d /* Integrated Circuit Systems */
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#define MII_OUI_xxSEEQ 0x0005be /* Seeq */
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#define MII_OUI_xxSEEQ 0x0005be /* Seeq */
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#define MII_OUI_xxSIS 0x000760 /* Silicon Integrated Systems */
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#define MII_OUI_xxSIS 0x000760 /* Silicon Integrated Systems */
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#define MII_OUI_xxTI 0x100014 /* Texas Instruments */
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#define MII_OUI_xxTI 0x100014 /* Texas Instruments */
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#define MII_OUI_xxXAQTI 0x350700 /* XaQti Corp. */
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/* Level 1 is completely different - from right to left.
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/* Level 1 is completely different - from right to left.
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(Two bits get lost in the third OUI byte.) */
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(Two bits get lost in the third OUI byte.) */
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@ -100,6 +102,8 @@
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/* Broadcom Corp. PHYs. */
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/* Broadcom Corp. PHYs. */
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#define MII_MODEL_BROADCOM_3c905Cphy 0x0017
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#define MII_MODEL_BROADCOM_3c905Cphy 0x0017
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#define MII_STR_BROADCOM_3c905Cphy "3c905C 10/100 internal PHY"
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#define MII_STR_BROADCOM_3c905Cphy "3c905C 10/100 internal PHY"
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#define MII_MODEL_xxBROADCOM_BCM5400 0x0004
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#define MII_STR_xxBROADCOM_BCM5400 "Broadcom 1000baseTX PHY"
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/* Davicom Semiconductor PHYs */
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/* Davicom Semiconductor PHYs */
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#define MII_MODEL_xxDAVICOM_DM9101 0x0000
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#define MII_MODEL_xxDAVICOM_DM9101 0x0000
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@ -142,3 +146,7 @@
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#define MII_STR_xxTI_TLAN10T "ThunderLAN 10baseT media interface"
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#define MII_STR_xxTI_TLAN10T "ThunderLAN 10baseT media interface"
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#define MII_MODEL_xxTI_100VGPMI 0x0002
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#define MII_MODEL_xxTI_100VGPMI 0x0002
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#define MII_STR_xxTI_100VGPMI "ThunderLAN 100VG-AnyLan media interface"
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#define MII_STR_xxTI_100VGPMI "ThunderLAN 100VG-AnyLan media interface"
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/* XaQti Corp. PHYs. */
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#define MII_MODEL_XAQTI_XMACII 0x0000
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#define MII_STR_XAQTI_XMACII "XaQti Corp. XMAC II gigabit interface"
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