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More comments about setting PLLA, or rather that we never do.
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=239168
@ -500,6 +500,7 @@ at91_pmc_init_clock(void)
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uhpck.pmc_mask = PMC_SCER_UHP_SAM9;
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udpck.pmc_mask = PMC_SCER_UDP_SAM9;
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}
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/* There is no pllb on AT91SAM9G45 */
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if (at91_cpu_is(AT91_T_SAM9G45)) {
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uhpck.parent = &upll;
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@ -509,6 +510,9 @@ at91_pmc_init_clock(void)
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mckr = RD4(sc, PMC_MCKR);
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main_ck.hz = main_clock;
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// Note: this means outa calc code for plla never used since
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// we never change it. If we did, we'd also have to mind
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// ICPLLA to get the charge pump current right.
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at91_pmc_pll_rate(&plla, RD4(sc, CKGR_PLLAR));
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if (at91_cpu_is(AT91_T_SAM9G45) && (mckr & PMC_MCKR_PLLADIV2))
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@ -516,16 +520,17 @@ at91_pmc_init_clock(void)
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/*
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* Initialize the usb clock. This sets up pllb, but disables the
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* actual clock.
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* actual clock. XXX except for the if 0 :(
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*/
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pllb_init = at91_pmc_pll_calc(&pllb, 48000000 * 2) | 0x10000000;
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at91_pmc_pll_rate(&pllb, pllb_init);
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if (!at91_cpu_is(AT91_T_SAM9G45)) {
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pllb_init = at91_pmc_pll_calc(&pllb, 48000000 * 2) | 0x10000000;
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at91_pmc_pll_rate(&pllb, pllb_init);
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#if 0
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/* Turn off USB clocks */
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at91_pmc_set_periph_mode(&ohci_clk, 0);
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at91_pmc_set_periph_mode(&udc_clk, 0);
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/* Turn off USB clocks */
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at91_pmc_set_periph_mode(&ohci_clk, 0);
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at91_pmc_set_periph_mode(&udc_clk, 0);
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#endif
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}
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if (at91_is_rm92()) {
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WR4(sc, PMC_SCDR, PMC_SCER_UHP | PMC_SCER_UDP);
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