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mirror of https://git.FreeBSD.org/src.git synced 2024-12-18 10:35:55 +00:00

- Remove ifdef PC98.

- Reduce diffs from i386.
This commit is contained in:
Yoshihiro Takahashi 2005-04-13 13:26:48 +00:00
parent aaaf1a6d53
commit ce45d2c162
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=145012
8 changed files with 68 additions and 1044 deletions

View File

@ -30,9 +30,11 @@
* SUCH DAMAGE.
*
* from: @(#)isa.c 7.2 (Berkeley) 5/13/91
* $FreeBSD$
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
/*
* code to manage AT bus
*
@ -43,9 +45,7 @@
* isa_dmastart()
*/
#ifdef PC98
#include "opt_pc98.h"
#endif
#include <sys/param.h>
#include <sys/systm.h>
@ -56,17 +56,11 @@
#include <sys/proc.h>
#include <sys/mutex.h>
#include <sys/module.h>
#ifdef PC98
#include <machine/md_var.h>
#endif
#include <vm/vm.h>
#include <vm/vm_param.h>
#include <vm/pmap.h>
#ifdef PC98
#include <pc98/pc98/pc98.h>
#else
#include <i386/isa/isa.h>
#endif
#include <dev/ic/i8237.h>
#include <isa/isavar.h>
@ -81,30 +75,17 @@
static int isa_dmarangecheck(caddr_t va, u_int length, int chan);
#ifdef PC98
static caddr_t dma_bouncebuf[4];
static u_int dma_bouncebufsize[4];
#else
static caddr_t dma_bouncebuf[8];
static u_int dma_bouncebufsize[8];
#endif
static u_int8_t dma_bounced = 0;
static u_int8_t dma_busy = 0; /* Used in isa_dmastart() */
static u_int8_t dma_inuse = 0; /* User for acquire/release */
static u_int8_t dma_auto_mode = 0;
#ifdef PC98
#define VALID_DMA_MASK (3)
#else
#define VALID_DMA_MASK (7)
#endif
/* high byte of address is stored in this port for i-th dma channel */
#ifdef PC98
static int dmapageport[4] = { 0x27, 0x21, 0x23, 0x25 };
#else
static int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
#endif
/*
* Setup a DMA channel's bounce buffer.
@ -114,26 +95,11 @@ isa_dma_init(int chan, u_int bouncebufsize, int flag)
{
void *buf;
#ifndef PC98
/*
* If a DMA channel is shared, both drivers have to call isa_dma_init
* since they don't know that the other driver will do it.
* Just return if we're already set up good.
* XXX: this only works if they agree on the bouncebuf size. This
* XXX: is typically the case since they are multiple instances of
* XXX: the same driver.
*/
if (dma_bouncebuf[chan] != NULL)
return (0);
#endif
#ifdef DIAGNOSTIC
if (chan & ~VALID_DMA_MASK)
panic("isa_dma_init: channel out of range");
#ifdef PC98
if (dma_bouncebuf[chan] != NULL)
panic("isa_dma_init: impossible request");
#endif
#endif
dma_bouncebufsize[chan] = bouncebufsize;
@ -208,31 +174,6 @@ isa_dma_release(chan)
dma_auto_mode &= ~(1 << chan);
}
#ifndef PC98
/*
* isa_dmacascade(): program 8237 DMA controller channel to accept
* external dma control by a board.
*/
void
isa_dmacascade(chan)
int chan;
{
#ifdef DIAGNOSTIC
if (chan & ~VALID_DMA_MASK)
panic("isa_dmacascade: channel out of range");
#endif
/* set dma channel mode, and set dma channel mode */
if ((chan & 4) == 0) {
outb(DMA1_MODE, DMA37MD_CASCADE | chan);
outb(DMA1_SMSK, chan);
} else {
outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
outb(DMA2_SMSK, chan & 3);
}
}
#endif
/*
* isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
* problems by using a bounce buffer.
@ -240,7 +181,7 @@ isa_dmacascade(chan)
void
isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
{
vm_offset_t phys;
vm_paddr_t phys;
int waport;
caddr_t newaddr;
@ -292,100 +233,48 @@ isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
dma_auto_mode &= ~(1 << chan);
}
#ifdef PC98
if (need_pre_dma_flush)
wbinvd(); /* wbinvd (WB cache flush) */
#endif
#ifndef PC98
if ((chan & 4) == 0) {
/*
* Program one of DMA channels 0..3. These are
* byte mode channels.
*/
#endif
/* set dma channel mode, and reset address ff */
/* set dma channel mode, and reset address ff */
/* If ISADMA_RAW flag is set, then use autoinitialise mode */
if (flags & ISADMA_RAW) {
if (flags & ISADMA_READ)
/* If ISADMA_RAW flag is set, then use autoinitialise mode */
if (flags & ISADMA_RAW) {
if (flags & ISADMA_READ)
outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
else
outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
}
else
outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
} else {
if (flags & ISADMA_READ)
outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
else
outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
outb(DMA1_FFC, 0);
/* send start address */
waport = DMA1_CHN(chan);
outb(waport, phys);
outb(waport, phys>>8);
outb(dmapageport[chan], phys>>16);
/* send count */
#ifdef PC98
outb(waport + 2, --nbytes);
outb(waport + 2, nbytes>>8);
#else
outb(waport + 1, --nbytes);
outb(waport + 1, nbytes>>8);
#endif
/* unmask channel */
outb(DMA1_SMSK, chan);
#ifndef PC98
} else {
/*
* Program one of DMA channels 4..7. These are
* word mode channels.
*/
/* set dma channel mode, and reset address ff */
/* If ISADMA_RAW flag is set, then use autoinitialise mode */
if (flags & ISADMA_RAW) {
if (flags & ISADMA_READ)
outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3));
else
outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3));
}
else
if (flags & ISADMA_READ)
outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
else
outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
outb(DMA2_FFC, 0);
/* send start address */
waport = DMA2_CHN(chan - 4);
outb(waport, phys>>1);
outb(waport, phys>>9);
outb(dmapageport[chan], phys>>16);
/* send count */
nbytes >>= 1;
outb(waport + 2, --nbytes);
outb(waport + 2, nbytes>>8);
/* unmask channel */
outb(DMA2_SMSK, chan & 3);
}
#endif
outb(DMA1_FFC, 0);
/* send start address */
waport = DMA1_CHN(chan);
outb(waport, phys);
outb(waport, phys>>8);
outb(dmapageport[chan], phys>>16);
/* send count */
outb(waport + 2, --nbytes);
outb(waport + 2, nbytes>>8);
/* unmask channel */
outb(DMA1_SMSK, chan);
}
void
isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
{
#ifdef PC98
if (flags & ISADMA_READ) {
/* cache flush only after reading 92/12/9 by A.Kojima */
if (need_post_dma_flush)
invd();
}
#endif
#ifdef DIAGNOSTIC
if (chan & ~VALID_DMA_MASK)
@ -399,13 +288,8 @@ isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
(dma_auto_mode & (1 << chan)) == 0 )
printf("isa_dmadone: channel %d not busy\n", chan);
#ifdef PC98
if ((dma_auto_mode & (1 << chan)) == 0)
outb(DMA1_SMSK, (chan & 3) | 4);
#else
if ((dma_auto_mode & (1 << chan)) == 0)
outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4);
#endif
if (dma_bounced & (1 << chan)) {
/* copy bounce buffer on read */
@ -427,7 +311,8 @@ isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
static int
isa_dmarangecheck(caddr_t va, u_int length, int chan)
{
vm_offset_t phys, priorpage = 0, endva;
vm_paddr_t phys, priorpage = 0;
vm_offset_t endva;
u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1);
GIANT_REQUIRED;
@ -507,18 +392,8 @@ isa_dmastatus(int chan)
printf("chan %d not busy\n", chan);
return -2 ;
}
#ifdef PC98
ffport = DMA1_FFC;
waport = DMA1_CHN(chan) + 2;
#else
if (chan < 4) { /* low DMA controller */
ffport = DMA1_FFC;
waport = DMA1_CHN(chan) + 1;
} else { /* high DMA controller */
ffport = DMA2_FFC;
waport = DMA2_CHN(chan - 4) + 2;
}
#endif
disable_intr(); /* no interrupts Mr Jones! */
outb(ffport, 0); /* clear register LSB flipflop */
@ -570,13 +445,9 @@ isa_dmastop(int chan)
return -2 ;
}
if ((chan & 4) == 0) {
if ((chan & 4) == 0)
outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */);
} else {
#ifndef PC98
outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */);
#endif
}
return(isa_dmastatus(chan));
}
@ -624,6 +495,3 @@ static driver_t atdma_driver = {
static devclass_t atdma_devclass;
DRIVER_MODULE(atdma, isa, atdma_driver, atdma_devclass, 0, 0);
#ifndef PC98
DRIVER_MODULE(atdma, acpi, atdma_driver, atdma_devclass, 0, 0);
#endif

View File

@ -127,14 +127,6 @@
#define LPPRI (PZERO+8)
#define BUFSIZE 1024
#ifndef PC98
/* BIOS printer list - used by BIOS probe*/
#define BIOS_LPT_PORTS 0x408
#define BIOS_PORTS (short *)(KERNBASE+BIOS_LPT_PORTS)
#define BIOS_MAX_LPT 4
#endif
#ifndef DEBUG
#define lprintf(args)
#else
@ -193,13 +185,7 @@ struct lpt_softc {
/* Printer Ready condition - from lpa.c */
/* Only used in polling code */
#ifdef PC98
#define NOT_READY(x) ((inb(x) & LPS_NBSY) != LPS_NBSY)
#else /* IBM-PC */
#define LPS_INVERT (LPS_NBSY | LPS_NACK | LPS_SEL | LPS_NERR)
#define LPS_MASK (LPS_NBSY | LPS_NACK | LPS_OUT | LPS_SEL | LPS_NERR)
#define NOT_READY(x) ((inb(x)^LPS_INVERT)&LPS_MASK)
#endif
#define MAX_SLEEP (hz*5) /* Timeout while waiting for device ready */
#define MAX_SPIN 20 /* Max delay for device ready in usecs */
@ -242,29 +228,6 @@ static struct cdevsw lpt_cdevsw = {
static bus_addr_t lpt_iat[] = {0, 2, 4, 6};
#ifndef PC98
/*
* Internal routine to lptprobe to do port tests of one byte value
*/
static int
lpt_port_test (int port, u_char data, u_char mask)
{
int temp, timeout;
data = data & mask;
outb(port, data);
timeout = 10000;
do {
DELAY(10);
temp = inb(port) & mask;
}
while (temp != data && --timeout);
lprintf(("Port 0x%x\tout=%x\tin=%x\ttout=%d\n",
port, data, temp, timeout));
return (temp == data);
}
#endif /* PC98 */
/*
* New lpt port probe Geoff Rehmet - Rhodes University - 14/2/94
* Based partially on Rod Grimes' printer probe
@ -313,7 +276,6 @@ lpt_port_test (int port, u_char data, u_char mask)
int
lpt_probe(device_t dev)
{
#ifdef PC98
#define PC98_OLD_LPT 0x40
#define PC98_IEEE_1284_FUNCTION 0x149
int rid;
@ -349,55 +311,6 @@ lpt_probe(device_t dev)
bus_release_resource(dev, SYS_RES_IOPORT, rid, res);
return 0;
#else
int port;
static short next_bios_lpt = 0;
int status;
static u_char testbyte[18] = {
0x55, /* alternating zeros */
0xaa, /* alternating ones */
0xfe, 0xfd, 0xfb, 0xf7,
0xef, 0xdf, 0xbf, 0x7f, /* walking zero */
0x01, 0x02, 0x04, 0x08,
0x10, 0x20, 0x40, 0x80 /* walking one */
};
int i;
/*
* Make sure there is some way for lptopen to see that
* the port is not configured
* This 0 will remain if the port isn't attached
*/
(lpt_sc + dvp->id_unit)->sc_port = 0;
status = IO_LPTSIZE;
/* If port not specified, use bios list */
if(dvp->id_iobase < 0) { /* port? */
if((next_bios_lpt < BIOS_MAX_LPT) &&
(*(BIOS_PORTS+next_bios_lpt) != 0) ) {
dvp->id_iobase = *(BIOS_PORTS+next_bios_lpt++);
goto end_probe;
} else
return (0);
}
/* Port was explicitly specified */
/* This allows probing of ports unknown to the BIOS */
port = dvp->id_iobase + lpt_data;
for (i = 0; i < 18; i++) {
if (!lpt_port_test(port, testbyte[i], 0xff)) {
status = 0;
goto end_probe;
}
}
end_probe:
/* write 0's to control and data ports */
outb(dvp->id_iobase+lpt_data, 0);
outb(dvp->id_iobase+lpt_control, 0);
return (status);
#endif
}
/* XXX Todo - try and detect if interrupt is working */
@ -419,15 +332,12 @@ lpt_attach(device_t dev)
sc->sc_port = rman_get_start(sc->res_port);
sc->sc_primed = 0; /* not primed yet */
#ifdef PC98
outb(sc->sc_port+lpt_pstb_ctrl, LPC_DIS_PSTB); /* PSTB disable */
outb(sc->sc_port+lpt_control, LPC_MODE8255); /* 8255 mode set */
outb(sc->sc_port+lpt_control, LPC_NIRQ8); /* IRQ8 inactive */
outb(sc->sc_port+lpt_control, LPC_NPSTB); /* PSTB inactive */
outb(sc->sc_port+lpt_pstb_ctrl, LPC_EN_PSTB); /* PSTB enable */
#else
outb(sc->sc_port+lpt_control, LPC_NINIT);
#endif
sc->sc_irq = 0;
if (isa_get_irq(dev) != -1) {
@ -470,11 +380,7 @@ lptopen (struct cdev *dev, int flags, int fmt, struct thread *td)
{
struct lpt_softc *sc;
int s;
#ifdef PC98
int port;
#else
int trys, port;
#endif
sc = devclass_get_softc(olpt_devclass, LPTUNIT(minor(dev)));
if (sc->sc_port == 0)
@ -505,51 +411,6 @@ lptopen (struct cdev *dev, int flags, int fmt, struct thread *td)
sc->sc_irq &= ~LP_USE_IRQ;
/* init printer */
#ifndef PC98
if ((sc->sc_flags & LP_NO_PRIME) == 0) {
if((sc->sc_flags & LP_PRIMEOPEN) || sc->sc_primed == 0) {
outb(port+lpt_control, 0);
sc->sc_primed++;
DELAY(500);
}
}
outb (port+lpt_control, LPC_SEL|LPC_NINIT);
/* wait till ready (printer running diagnostics) */
trys = 0;
do {
/* ran out of waiting for the printer */
if (trys++ >= LPINITRDY*4) {
splx(s);
sc->sc_state = 0;
lprintf(("status %x\n", inb(port+lpt_status)));
return (EBUSY);
}
/* wait 1/4 second, give up if we get a signal */
if (tsleep (sc, LPPRI|PCATCH, "lptinit", hz/4) !=
EWOULDBLOCK) {
sc->sc_state = 0;
splx(s);
return (EBUSY);
}
/* is printer online and ready for output */
} while ((inb(port+lpt_status) & (LPS_SEL|LPS_OUT|LPS_NBSY|LPS_NERR)) !=
(LPS_SEL|LPS_NBSY|LPS_NERR));
sc->sc_control = LPC_SEL|LPC_NINIT;
if (sc->sc_flags & LP_AUTOLF)
sc->sc_control |= LPC_AUTOL;
/* enable interrupt if interrupt-driven */
if (sc->sc_irq & LP_USE_IRQ)
sc->sc_control |= LPC_ENA;
outb(port+lpt_control, sc->sc_control);
#endif
sc->sc_state = OPEN;
sc->sc_inbuf = malloc(BUFSIZE, M_DEVBUF, M_WAITOK);
sc->sc_xfercnt = 0;
@ -608,31 +469,12 @@ static int
lptclose(struct cdev *dev, int flags, int fmt, struct thread *td)
{
struct lpt_softc *sc;
#ifndef PC98
int port;
#endif
sc = devclass_get_softc(olpt_devclass, LPTUNIT(minor(dev)));
if(sc->sc_flags & LP_BYPASS)
goto end_close;
#ifndef PC98
port = sc->sc_port;
#endif
sc->sc_state &= ~OPEN;
#ifndef PC98
/* if the last write was interrupted, don't complete it */
if((!(sc->sc_state & INTERRUPTED)) && (sc->sc_irq & LP_USE_IRQ))
while ((inb(port+lpt_status) & (LPS_SEL|LPS_OUT|LPS_NBSY|LPS_NERR)) !=
(LPS_SEL|LPS_NBSY|LPS_NERR) || sc->sc_xfercnt)
/* wait 1/4 second, give up if we get a signal */
if (tsleep (sc, LPPRI|PCATCH,
"lpclose", hz) != EWOULDBLOCK)
break;
outb(sc->sc_port+lpt_control, LPC_NINIT);
#endif
free(sc->sc_inbuf, M_DEVBUF);
end_close:
@ -695,17 +537,10 @@ pushbytes(struct lpt_softc * sc)
/* output data */
outb(port+lpt_data, ch);
#ifdef PC98
DELAY(1);
outb(port+lpt_control, LPC_PSTB);
DELAY(1);
outb(port+lpt_control, LPC_NPSTB);
#else
/* strobe */
outb(port+lpt_control, sc->sc_control|LPC_STB);
outb(port+lpt_control, sc->sc_control);
#endif
}
return(0);
}

View File

@ -1080,7 +1080,6 @@ scterm_puts(scr_stat *scp, u_char *buf, int len)
scp->xpos = 0;
break;
#ifdef PC98
case 0x0e: /* ^N */
tcp->kanji_type = KTYPE_JKANA;
tcp->esc = 0;
@ -1092,7 +1091,6 @@ scterm_puts(scr_stat *scp, u_char *buf, int len)
tcp->esc = 0;
tcp->kanji_1st_char = 0;
break;
#endif /* PC98 */
case 0x1b: /* start escape sequence */
tcp->esc = 1;

View File

@ -35,9 +35,11 @@
* SUCH DAMAGE.
*
* from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
* $FreeBSD$
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include "opt_atalk.h"
#include "opt_compat.h"
#include "opt_cpu.h"
@ -100,12 +102,8 @@
#include <ddb/db_sym.h>
#endif
#ifdef PC98
#include <pc98/pc98/pc98_machdep.h>
#include <pc98/pc98/pc98.h>
#else
#include <isa/rtc.h>
#endif
#include <net/netisr.h>
@ -166,10 +164,8 @@ static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
#endif /* CPU_ENABLE_SSE */
SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
#ifdef PC98
int need_pre_dma_flush; /* If 1, use wbinvd befor DMA transfer. */
int need_post_dma_flush; /* If 1, use invd after DMA transfer. */
#endif
#ifdef DDB
extern vm_offset_t ksym_start, ksym_end;
@ -178,11 +174,7 @@ extern vm_offset_t ksym_start, ksym_end;
int _udatasel, _ucodesel;
u_int basemem;
#ifdef PC98
static int ispc98 = 1;
#else
static int ispc98 = 0;
#endif
SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
int cold = 1;
@ -1584,25 +1576,13 @@ sdtossd(sd, ssd)
static void
getmemsize(int first)
{
#ifdef PC98
int i, physmap_idx, pa_indx, pg_n;
u_long physmem_tunable;
u_int extmem, under16;
vm_offset_t pa, physmap[PHYSMAP_SIZE];
pt_entry_t *pte;
#else
int i, physmap_idx, pa_indx;
u_long physmem_tunable;
u_int extmem;
struct vm86frame vmf;
struct vm86context vmc;
vm_paddr_t pa, physmap[PHYSMAP_SIZE];
pt_entry_t *pte;
struct bios_smap *smap;
#endif
quad_t dcons_addr, dcons_size;
#ifdef PC98
/* XXX - some of EPSON machines can't use PG_N */
pg_n = PG_N;
if (pc98_machine_type & M_EPSON_PC98) {
@ -1661,173 +1641,12 @@ getmemsize(int first)
for (i = basemem / 4; i < 160; i++)
pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
#else /* PC98 */
bzero(&vmf, sizeof(struct vm86frame));
bzero(physmap, sizeof(physmap));
basemem = 0;
/*
* map page 1 R/W into the kernel page table so we can use it
* as a buffer. The kernel will unmap this page later.
*/
pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT);
/*
* get memory map with INT 15:E820
*/
vmc.npages = 0;
smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
physmap_idx = 0;
vmf.vmf_ebx = 0;
do {
vmf.vmf_eax = 0xE820;
vmf.vmf_edx = SMAP_SIG;
vmf.vmf_ecx = sizeof(struct bios_smap);
i = vm86_datacall(0x15, &vmf, &vmc);
if (i || vmf.vmf_eax != SMAP_SIG)
break;
if (boothowto & RB_VERBOSE)
printf("SMAP type=%02x base=%016llx len=%016llx\n",
smap->type, smap->base, smap->length);
if (smap->type != 0x01)
continue;
if (smap->length == 0)
continue;
if (smap->base >= 0xffffffff) {
printf("%uK of memory above 4GB ignored\n",
(u_int)(smap->length / 1024));
continue;
}
for (i = 0; i <= physmap_idx; i += 2) {
if (smap->base < physmap[i + 1]) {
if (boothowto & RB_VERBOSE)
printf(
"Overlapping or non-montonic memory region, ignoring second region\n");
continue;
}
}
if (smap->base == physmap[physmap_idx + 1]) {
physmap[physmap_idx + 1] += smap->length;
continue;
}
physmap_idx += 2;
if (physmap_idx == PHYSMAP_SIZE) {
printf(
"Too many segments in the physical address map, giving up\n");
break;
}
physmap[physmap_idx] = smap->base;
physmap[physmap_idx + 1] = smap->base + smap->length;
} while (vmf.vmf_ebx != 0);
/*
* Perform "base memory" related probes & setup
*/
for (i = 0; i <= physmap_idx; i += 2) {
if (physmap[i] == 0x00000000) {
basemem = physmap[i + 1] / 1024;
break;
}
}
/* Fall back to the old compatibility function for base memory */
if (basemem == 0) {
vm86_intcall(0x12, &vmf);
basemem = vmf.vmf_ax;
}
if (basemem > 640) {
printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
basemem);
basemem = 640;
}
/*
* XXX if biosbasemem is now < 640, there is a `hole'
* between the end of base memory and the start of
* ISA memory. The hole may be empty or it may
* contain BIOS code or data. Map it read/write so
* that the BIOS can write to it. (Memory from 0 to
* the physical end of the kernel is mapped read-only
* to begin with and then parts of it are remapped.
* The parts that aren't remapped form holes that
* remain read-only and are unused by the kernel.
* The base memory area is below the physical end of
* the kernel and right now forms a read-only hole.
* The part of it from PAGE_SIZE to
* (trunc_page(biosbasemem * 1024) - 1) will be
* remapped and used by the kernel later.)
*
* This code is similar to the code used in
* pmap_mapdev, but since no memory needs to be
* allocated we simply change the mapping.
*/
for (pa = trunc_page(basemem * 1024);
pa < ISA_HOLE_START; pa += PAGE_SIZE)
pmap_kenter(KERNBASE + pa, pa);
/*
* if basemem != 640, map pages r/w into vm86 page table so
* that the bios can scribble on it.
*/
pte = (pt_entry_t *)vm86paddr;
for (i = basemem / 4; i < 160; i++)
pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
if (physmap[1] != 0)
goto physmap_done;
/*
* If we failed above, try memory map with INT 15:E801
*/
vmf.vmf_ax = 0xE801;
if (vm86_intcall(0x15, &vmf) == 0) {
extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
} else {
#if 0
vmf.vmf_ah = 0x88;
vm86_intcall(0x15, &vmf);
extmem = vmf.vmf_ax;
#else
/*
* Prefer the RTC value for extended memory.
*/
extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
#endif
}
/*
* Special hack for chipsets that still remap the 384k hole when
* there's 16MB of memory - this really confuses people that
* are trying to use bus mastering ISA controllers with the
* "16MB limit"; they only have 16MB, but the remapping puts
* them beyond the limit.
*
* If extended memory is between 15-16MB (16-17MB phys address range),
* chop it to 15MB.
*/
if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
extmem = 15 * 1024;
#endif /* PC98 */
physmap[0] = 0;
physmap[1] = basemem * 1024;
physmap_idx = 2;
physmap[physmap_idx] = 0x100000;
physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
#ifndef PC98
physmap_done:
#endif
/*
* Now, physmap contains a map of physical memory.
*/
@ -1863,7 +1682,6 @@ getmemsize(int first)
if (atop(physmap[physmap_idx + 1]) < Maxmem)
physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
#ifdef PC98
/*
* We need to divide chunk if Maxmem is larger than 16MB and
* under 16MB area is not full of memory.
@ -1877,7 +1695,6 @@ getmemsize(int first)
physmap[physmap_idx] = 0x1000000;
physmap[physmap_idx + 1] = physmap[2] + extmem * 1024;
}
#endif
/* call pmap initialization to make new kernel address space */
pmap_bootstrap(first, 0);
@ -1931,11 +1748,7 @@ getmemsize(int first)
/*
* map page into kernel: valid, read/write,non-cacheable
*/
#ifdef PC98
*pte = pa | PG_V | PG_RW | pg_n;
#else
*pte = pa | PG_V | PG_RW | PG_N;
#endif
invltlb();
tmp = *(int *)ptr;
@ -2047,12 +1860,10 @@ init386(first)
*/
proc_linkup(&proc0, &ksegrp0, &thread0);
#ifdef PC98
/*
* Initialize DMAC
*/
pc98_init_dmac();
#endif
metadata_missing = 0;
if (bootinfo.bi_modulep) {
@ -2537,7 +2348,6 @@ get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
mcp->mc_esi = tp->tf_esi;
mcp->mc_ebp = tp->tf_ebp;
mcp->mc_isp = tp->tf_isp;
mcp->mc_ebx = tp->tf_ebx;
if (flags & GET_MC_CLEAR_RET) {
mcp->mc_eax = 0;
mcp->mc_edx = 0;
@ -2545,6 +2355,7 @@ get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
mcp->mc_eax = tp->tf_eax;
mcp->mc_edx = tp->tf_edx;
}
mcp->mc_ebx = tp->tf_ebx;
mcp->mc_ecx = tp->tf_ecx;
mcp->mc_eip = tp->tf_eip;
mcp->mc_cs = tp->tf_cs;

View File

@ -30,9 +30,11 @@
* SUCH DAMAGE.
*
* from: @(#)isa.c 7.2 (Berkeley) 5/13/91
* $FreeBSD$
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
/*
* code to manage AT bus
*
@ -43,9 +45,7 @@
* isa_dmastart()
*/
#ifdef PC98
#include "opt_pc98.h"
#endif
#include <sys/param.h>
#include <sys/systm.h>
@ -56,17 +56,11 @@
#include <sys/proc.h>
#include <sys/mutex.h>
#include <sys/module.h>
#ifdef PC98
#include <machine/md_var.h>
#endif
#include <vm/vm.h>
#include <vm/vm_param.h>
#include <vm/pmap.h>
#ifdef PC98
#include <pc98/pc98/pc98.h>
#else
#include <i386/isa/isa.h>
#endif
#include <dev/ic/i8237.h>
#include <isa/isavar.h>
@ -81,30 +75,17 @@
static int isa_dmarangecheck(caddr_t va, u_int length, int chan);
#ifdef PC98
static caddr_t dma_bouncebuf[4];
static u_int dma_bouncebufsize[4];
#else
static caddr_t dma_bouncebuf[8];
static u_int dma_bouncebufsize[8];
#endif
static u_int8_t dma_bounced = 0;
static u_int8_t dma_busy = 0; /* Used in isa_dmastart() */
static u_int8_t dma_inuse = 0; /* User for acquire/release */
static u_int8_t dma_auto_mode = 0;
#ifdef PC98
#define VALID_DMA_MASK (3)
#else
#define VALID_DMA_MASK (7)
#endif
/* high byte of address is stored in this port for i-th dma channel */
#ifdef PC98
static int dmapageport[4] = { 0x27, 0x21, 0x23, 0x25 };
#else
static int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
#endif
/*
* Setup a DMA channel's bounce buffer.
@ -114,26 +95,11 @@ isa_dma_init(int chan, u_int bouncebufsize, int flag)
{
void *buf;
#ifndef PC98
/*
* If a DMA channel is shared, both drivers have to call isa_dma_init
* since they don't know that the other driver will do it.
* Just return if we're already set up good.
* XXX: this only works if they agree on the bouncebuf size. This
* XXX: is typically the case since they are multiple instances of
* XXX: the same driver.
*/
if (dma_bouncebuf[chan] != NULL)
return (0);
#endif
#ifdef DIAGNOSTIC
if (chan & ~VALID_DMA_MASK)
panic("isa_dma_init: channel out of range");
#ifdef PC98
if (dma_bouncebuf[chan] != NULL)
panic("isa_dma_init: impossible request");
#endif
#endif
dma_bouncebufsize[chan] = bouncebufsize;
@ -208,31 +174,6 @@ isa_dma_release(chan)
dma_auto_mode &= ~(1 << chan);
}
#ifndef PC98
/*
* isa_dmacascade(): program 8237 DMA controller channel to accept
* external dma control by a board.
*/
void
isa_dmacascade(chan)
int chan;
{
#ifdef DIAGNOSTIC
if (chan & ~VALID_DMA_MASK)
panic("isa_dmacascade: channel out of range");
#endif
/* set dma channel mode, and set dma channel mode */
if ((chan & 4) == 0) {
outb(DMA1_MODE, DMA37MD_CASCADE | chan);
outb(DMA1_SMSK, chan);
} else {
outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
outb(DMA2_SMSK, chan & 3);
}
}
#endif
/*
* isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
* problems by using a bounce buffer.
@ -240,7 +181,7 @@ isa_dmacascade(chan)
void
isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
{
vm_offset_t phys;
vm_paddr_t phys;
int waport;
caddr_t newaddr;
@ -292,100 +233,48 @@ isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
dma_auto_mode &= ~(1 << chan);
}
#ifdef PC98
if (need_pre_dma_flush)
wbinvd(); /* wbinvd (WB cache flush) */
#endif
#ifndef PC98
if ((chan & 4) == 0) {
/*
* Program one of DMA channels 0..3. These are
* byte mode channels.
*/
#endif
/* set dma channel mode, and reset address ff */
/* set dma channel mode, and reset address ff */
/* If ISADMA_RAW flag is set, then use autoinitialise mode */
if (flags & ISADMA_RAW) {
if (flags & ISADMA_READ)
/* If ISADMA_RAW flag is set, then use autoinitialise mode */
if (flags & ISADMA_RAW) {
if (flags & ISADMA_READ)
outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
else
outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
}
else
outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
} else {
if (flags & ISADMA_READ)
outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
else
outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
outb(DMA1_FFC, 0);
/* send start address */
waport = DMA1_CHN(chan);
outb(waport, phys);
outb(waport, phys>>8);
outb(dmapageport[chan], phys>>16);
/* send count */
#ifdef PC98
outb(waport + 2, --nbytes);
outb(waport + 2, nbytes>>8);
#else
outb(waport + 1, --nbytes);
outb(waport + 1, nbytes>>8);
#endif
/* unmask channel */
outb(DMA1_SMSK, chan);
#ifndef PC98
} else {
/*
* Program one of DMA channels 4..7. These are
* word mode channels.
*/
/* set dma channel mode, and reset address ff */
/* If ISADMA_RAW flag is set, then use autoinitialise mode */
if (flags & ISADMA_RAW) {
if (flags & ISADMA_READ)
outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3));
else
outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3));
}
else
if (flags & ISADMA_READ)
outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
else
outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
outb(DMA2_FFC, 0);
/* send start address */
waport = DMA2_CHN(chan - 4);
outb(waport, phys>>1);
outb(waport, phys>>9);
outb(dmapageport[chan], phys>>16);
/* send count */
nbytes >>= 1;
outb(waport + 2, --nbytes);
outb(waport + 2, nbytes>>8);
/* unmask channel */
outb(DMA2_SMSK, chan & 3);
}
#endif
outb(DMA1_FFC, 0);
/* send start address */
waport = DMA1_CHN(chan);
outb(waport, phys);
outb(waport, phys>>8);
outb(dmapageport[chan], phys>>16);
/* send count */
outb(waport + 2, --nbytes);
outb(waport + 2, nbytes>>8);
/* unmask channel */
outb(DMA1_SMSK, chan);
}
void
isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
{
#ifdef PC98
if (flags & ISADMA_READ) {
/* cache flush only after reading 92/12/9 by A.Kojima */
if (need_post_dma_flush)
invd();
}
#endif
#ifdef DIAGNOSTIC
if (chan & ~VALID_DMA_MASK)
@ -399,13 +288,8 @@ isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
(dma_auto_mode & (1 << chan)) == 0 )
printf("isa_dmadone: channel %d not busy\n", chan);
#ifdef PC98
if ((dma_auto_mode & (1 << chan)) == 0)
outb(DMA1_SMSK, (chan & 3) | 4);
#else
if ((dma_auto_mode & (1 << chan)) == 0)
outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4);
#endif
if (dma_bounced & (1 << chan)) {
/* copy bounce buffer on read */
@ -427,7 +311,8 @@ isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
static int
isa_dmarangecheck(caddr_t va, u_int length, int chan)
{
vm_offset_t phys, priorpage = 0, endva;
vm_paddr_t phys, priorpage = 0;
vm_offset_t endva;
u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1);
GIANT_REQUIRED;
@ -507,18 +392,8 @@ isa_dmastatus(int chan)
printf("chan %d not busy\n", chan);
return -2 ;
}
#ifdef PC98
ffport = DMA1_FFC;
waport = DMA1_CHN(chan) + 2;
#else
if (chan < 4) { /* low DMA controller */
ffport = DMA1_FFC;
waport = DMA1_CHN(chan) + 1;
} else { /* high DMA controller */
ffport = DMA2_FFC;
waport = DMA2_CHN(chan - 4) + 2;
}
#endif
disable_intr(); /* no interrupts Mr Jones! */
outb(ffport, 0); /* clear register LSB flipflop */
@ -570,13 +445,9 @@ isa_dmastop(int chan)
return -2 ;
}
if ((chan & 4) == 0) {
if ((chan & 4) == 0)
outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */);
} else {
#ifndef PC98
outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */);
#endif
}
return(isa_dmastatus(chan));
}
@ -624,6 +495,3 @@ static driver_t atdma_driver = {
static devclass_t atdma_devclass;
DRIVER_MODULE(atdma, isa, atdma_driver, atdma_devclass, 0, 0);
#ifndef PC98
DRIVER_MODULE(atdma, acpi, atdma_driver, atdma_devclass, 0, 0);
#endif

View File

@ -35,9 +35,11 @@
* SUCH DAMAGE.
*
* from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
* $FreeBSD$
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include "opt_atalk.h"
#include "opt_compat.h"
#include "opt_cpu.h"
@ -100,12 +102,8 @@
#include <ddb/db_sym.h>
#endif
#ifdef PC98
#include <pc98/pc98/pc98_machdep.h>
#include <pc98/pc98/pc98.h>
#else
#include <isa/rtc.h>
#endif
#include <net/netisr.h>
@ -166,10 +164,8 @@ static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
#endif /* CPU_ENABLE_SSE */
SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
#ifdef PC98
int need_pre_dma_flush; /* If 1, use wbinvd befor DMA transfer. */
int need_post_dma_flush; /* If 1, use invd after DMA transfer. */
#endif
#ifdef DDB
extern vm_offset_t ksym_start, ksym_end;
@ -178,11 +174,7 @@ extern vm_offset_t ksym_start, ksym_end;
int _udatasel, _ucodesel;
u_int basemem;
#ifdef PC98
static int ispc98 = 1;
#else
static int ispc98 = 0;
#endif
SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
int cold = 1;
@ -1584,25 +1576,13 @@ sdtossd(sd, ssd)
static void
getmemsize(int first)
{
#ifdef PC98
int i, physmap_idx, pa_indx, pg_n;
u_long physmem_tunable;
u_int extmem, under16;
vm_offset_t pa, physmap[PHYSMAP_SIZE];
pt_entry_t *pte;
#else
int i, physmap_idx, pa_indx;
u_long physmem_tunable;
u_int extmem;
struct vm86frame vmf;
struct vm86context vmc;
vm_paddr_t pa, physmap[PHYSMAP_SIZE];
pt_entry_t *pte;
struct bios_smap *smap;
#endif
quad_t dcons_addr, dcons_size;
#ifdef PC98
/* XXX - some of EPSON machines can't use PG_N */
pg_n = PG_N;
if (pc98_machine_type & M_EPSON_PC98) {
@ -1661,173 +1641,12 @@ getmemsize(int first)
for (i = basemem / 4; i < 160; i++)
pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
#else /* PC98 */
bzero(&vmf, sizeof(struct vm86frame));
bzero(physmap, sizeof(physmap));
basemem = 0;
/*
* map page 1 R/W into the kernel page table so we can use it
* as a buffer. The kernel will unmap this page later.
*/
pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT);
/*
* get memory map with INT 15:E820
*/
vmc.npages = 0;
smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
physmap_idx = 0;
vmf.vmf_ebx = 0;
do {
vmf.vmf_eax = 0xE820;
vmf.vmf_edx = SMAP_SIG;
vmf.vmf_ecx = sizeof(struct bios_smap);
i = vm86_datacall(0x15, &vmf, &vmc);
if (i || vmf.vmf_eax != SMAP_SIG)
break;
if (boothowto & RB_VERBOSE)
printf("SMAP type=%02x base=%016llx len=%016llx\n",
smap->type, smap->base, smap->length);
if (smap->type != 0x01)
continue;
if (smap->length == 0)
continue;
if (smap->base >= 0xffffffff) {
printf("%uK of memory above 4GB ignored\n",
(u_int)(smap->length / 1024));
continue;
}
for (i = 0; i <= physmap_idx; i += 2) {
if (smap->base < physmap[i + 1]) {
if (boothowto & RB_VERBOSE)
printf(
"Overlapping or non-montonic memory region, ignoring second region\n");
continue;
}
}
if (smap->base == physmap[physmap_idx + 1]) {
physmap[physmap_idx + 1] += smap->length;
continue;
}
physmap_idx += 2;
if (physmap_idx == PHYSMAP_SIZE) {
printf(
"Too many segments in the physical address map, giving up\n");
break;
}
physmap[physmap_idx] = smap->base;
physmap[physmap_idx + 1] = smap->base + smap->length;
} while (vmf.vmf_ebx != 0);
/*
* Perform "base memory" related probes & setup
*/
for (i = 0; i <= physmap_idx; i += 2) {
if (physmap[i] == 0x00000000) {
basemem = physmap[i + 1] / 1024;
break;
}
}
/* Fall back to the old compatibility function for base memory */
if (basemem == 0) {
vm86_intcall(0x12, &vmf);
basemem = vmf.vmf_ax;
}
if (basemem > 640) {
printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
basemem);
basemem = 640;
}
/*
* XXX if biosbasemem is now < 640, there is a `hole'
* between the end of base memory and the start of
* ISA memory. The hole may be empty or it may
* contain BIOS code or data. Map it read/write so
* that the BIOS can write to it. (Memory from 0 to
* the physical end of the kernel is mapped read-only
* to begin with and then parts of it are remapped.
* The parts that aren't remapped form holes that
* remain read-only and are unused by the kernel.
* The base memory area is below the physical end of
* the kernel and right now forms a read-only hole.
* The part of it from PAGE_SIZE to
* (trunc_page(biosbasemem * 1024) - 1) will be
* remapped and used by the kernel later.)
*
* This code is similar to the code used in
* pmap_mapdev, but since no memory needs to be
* allocated we simply change the mapping.
*/
for (pa = trunc_page(basemem * 1024);
pa < ISA_HOLE_START; pa += PAGE_SIZE)
pmap_kenter(KERNBASE + pa, pa);
/*
* if basemem != 640, map pages r/w into vm86 page table so
* that the bios can scribble on it.
*/
pte = (pt_entry_t *)vm86paddr;
for (i = basemem / 4; i < 160; i++)
pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
if (physmap[1] != 0)
goto physmap_done;
/*
* If we failed above, try memory map with INT 15:E801
*/
vmf.vmf_ax = 0xE801;
if (vm86_intcall(0x15, &vmf) == 0) {
extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
} else {
#if 0
vmf.vmf_ah = 0x88;
vm86_intcall(0x15, &vmf);
extmem = vmf.vmf_ax;
#else
/*
* Prefer the RTC value for extended memory.
*/
extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
#endif
}
/*
* Special hack for chipsets that still remap the 384k hole when
* there's 16MB of memory - this really confuses people that
* are trying to use bus mastering ISA controllers with the
* "16MB limit"; they only have 16MB, but the remapping puts
* them beyond the limit.
*
* If extended memory is between 15-16MB (16-17MB phys address range),
* chop it to 15MB.
*/
if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
extmem = 15 * 1024;
#endif /* PC98 */
physmap[0] = 0;
physmap[1] = basemem * 1024;
physmap_idx = 2;
physmap[physmap_idx] = 0x100000;
physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
#ifndef PC98
physmap_done:
#endif
/*
* Now, physmap contains a map of physical memory.
*/
@ -1863,7 +1682,6 @@ getmemsize(int first)
if (atop(physmap[physmap_idx + 1]) < Maxmem)
physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
#ifdef PC98
/*
* We need to divide chunk if Maxmem is larger than 16MB and
* under 16MB area is not full of memory.
@ -1877,7 +1695,6 @@ getmemsize(int first)
physmap[physmap_idx] = 0x1000000;
physmap[physmap_idx + 1] = physmap[2] + extmem * 1024;
}
#endif
/* call pmap initialization to make new kernel address space */
pmap_bootstrap(first, 0);
@ -1931,11 +1748,7 @@ getmemsize(int first)
/*
* map page into kernel: valid, read/write,non-cacheable
*/
#ifdef PC98
*pte = pa | PG_V | PG_RW | pg_n;
#else
*pte = pa | PG_V | PG_RW | PG_N;
#endif
invltlb();
tmp = *(int *)ptr;
@ -2047,12 +1860,10 @@ init386(first)
*/
proc_linkup(&proc0, &ksegrp0, &thread0);
#ifdef PC98
/*
* Initialize DMAC
*/
pc98_init_dmac();
#endif
metadata_missing = 0;
if (bootinfo.bi_modulep) {
@ -2537,7 +2348,6 @@ get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
mcp->mc_esi = tp->tf_esi;
mcp->mc_ebp = tp->tf_ebp;
mcp->mc_isp = tp->tf_isp;
mcp->mc_ebx = tp->tf_ebx;
if (flags & GET_MC_CLEAR_RET) {
mcp->mc_eax = 0;
mcp->mc_edx = 0;
@ -2545,6 +2355,7 @@ get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
mcp->mc_eax = tp->tf_eax;
mcp->mc_edx = tp->tf_edx;
}
mcp->mc_ebx = tp->tf_ebx;
mcp->mc_ecx = tp->tf_ecx;
mcp->mc_eip = tp->tf_eip;
mcp->mc_cs = tp->tf_cs;

View File

@ -127,14 +127,6 @@
#define LPPRI (PZERO+8)
#define BUFSIZE 1024
#ifndef PC98
/* BIOS printer list - used by BIOS probe*/
#define BIOS_LPT_PORTS 0x408
#define BIOS_PORTS (short *)(KERNBASE+BIOS_LPT_PORTS)
#define BIOS_MAX_LPT 4
#endif
#ifndef DEBUG
#define lprintf(args)
#else
@ -193,13 +185,7 @@ struct lpt_softc {
/* Printer Ready condition - from lpa.c */
/* Only used in polling code */
#ifdef PC98
#define NOT_READY(x) ((inb(x) & LPS_NBSY) != LPS_NBSY)
#else /* IBM-PC */
#define LPS_INVERT (LPS_NBSY | LPS_NACK | LPS_SEL | LPS_NERR)
#define LPS_MASK (LPS_NBSY | LPS_NACK | LPS_OUT | LPS_SEL | LPS_NERR)
#define NOT_READY(x) ((inb(x)^LPS_INVERT)&LPS_MASK)
#endif
#define MAX_SLEEP (hz*5) /* Timeout while waiting for device ready */
#define MAX_SPIN 20 /* Max delay for device ready in usecs */
@ -242,29 +228,6 @@ static struct cdevsw lpt_cdevsw = {
static bus_addr_t lpt_iat[] = {0, 2, 4, 6};
#ifndef PC98
/*
* Internal routine to lptprobe to do port tests of one byte value
*/
static int
lpt_port_test (int port, u_char data, u_char mask)
{
int temp, timeout;
data = data & mask;
outb(port, data);
timeout = 10000;
do {
DELAY(10);
temp = inb(port) & mask;
}
while (temp != data && --timeout);
lprintf(("Port 0x%x\tout=%x\tin=%x\ttout=%d\n",
port, data, temp, timeout));
return (temp == data);
}
#endif /* PC98 */
/*
* New lpt port probe Geoff Rehmet - Rhodes University - 14/2/94
* Based partially on Rod Grimes' printer probe
@ -313,7 +276,6 @@ lpt_port_test (int port, u_char data, u_char mask)
int
lpt_probe(device_t dev)
{
#ifdef PC98
#define PC98_OLD_LPT 0x40
#define PC98_IEEE_1284_FUNCTION 0x149
int rid;
@ -349,55 +311,6 @@ lpt_probe(device_t dev)
bus_release_resource(dev, SYS_RES_IOPORT, rid, res);
return 0;
#else
int port;
static short next_bios_lpt = 0;
int status;
static u_char testbyte[18] = {
0x55, /* alternating zeros */
0xaa, /* alternating ones */
0xfe, 0xfd, 0xfb, 0xf7,
0xef, 0xdf, 0xbf, 0x7f, /* walking zero */
0x01, 0x02, 0x04, 0x08,
0x10, 0x20, 0x40, 0x80 /* walking one */
};
int i;
/*
* Make sure there is some way for lptopen to see that
* the port is not configured
* This 0 will remain if the port isn't attached
*/
(lpt_sc + dvp->id_unit)->sc_port = 0;
status = IO_LPTSIZE;
/* If port not specified, use bios list */
if(dvp->id_iobase < 0) { /* port? */
if((next_bios_lpt < BIOS_MAX_LPT) &&
(*(BIOS_PORTS+next_bios_lpt) != 0) ) {
dvp->id_iobase = *(BIOS_PORTS+next_bios_lpt++);
goto end_probe;
} else
return (0);
}
/* Port was explicitly specified */
/* This allows probing of ports unknown to the BIOS */
port = dvp->id_iobase + lpt_data;
for (i = 0; i < 18; i++) {
if (!lpt_port_test(port, testbyte[i], 0xff)) {
status = 0;
goto end_probe;
}
}
end_probe:
/* write 0's to control and data ports */
outb(dvp->id_iobase+lpt_data, 0);
outb(dvp->id_iobase+lpt_control, 0);
return (status);
#endif
}
/* XXX Todo - try and detect if interrupt is working */
@ -419,15 +332,12 @@ lpt_attach(device_t dev)
sc->sc_port = rman_get_start(sc->res_port);
sc->sc_primed = 0; /* not primed yet */
#ifdef PC98
outb(sc->sc_port+lpt_pstb_ctrl, LPC_DIS_PSTB); /* PSTB disable */
outb(sc->sc_port+lpt_control, LPC_MODE8255); /* 8255 mode set */
outb(sc->sc_port+lpt_control, LPC_NIRQ8); /* IRQ8 inactive */
outb(sc->sc_port+lpt_control, LPC_NPSTB); /* PSTB inactive */
outb(sc->sc_port+lpt_pstb_ctrl, LPC_EN_PSTB); /* PSTB enable */
#else
outb(sc->sc_port+lpt_control, LPC_NINIT);
#endif
sc->sc_irq = 0;
if (isa_get_irq(dev) != -1) {
@ -470,11 +380,7 @@ lptopen (struct cdev *dev, int flags, int fmt, struct thread *td)
{
struct lpt_softc *sc;
int s;
#ifdef PC98
int port;
#else
int trys, port;
#endif
sc = devclass_get_softc(olpt_devclass, LPTUNIT(minor(dev)));
if (sc->sc_port == 0)
@ -505,51 +411,6 @@ lptopen (struct cdev *dev, int flags, int fmt, struct thread *td)
sc->sc_irq &= ~LP_USE_IRQ;
/* init printer */
#ifndef PC98
if ((sc->sc_flags & LP_NO_PRIME) == 0) {
if((sc->sc_flags & LP_PRIMEOPEN) || sc->sc_primed == 0) {
outb(port+lpt_control, 0);
sc->sc_primed++;
DELAY(500);
}
}
outb (port+lpt_control, LPC_SEL|LPC_NINIT);
/* wait till ready (printer running diagnostics) */
trys = 0;
do {
/* ran out of waiting for the printer */
if (trys++ >= LPINITRDY*4) {
splx(s);
sc->sc_state = 0;
lprintf(("status %x\n", inb(port+lpt_status)));
return (EBUSY);
}
/* wait 1/4 second, give up if we get a signal */
if (tsleep (sc, LPPRI|PCATCH, "lptinit", hz/4) !=
EWOULDBLOCK) {
sc->sc_state = 0;
splx(s);
return (EBUSY);
}
/* is printer online and ready for output */
} while ((inb(port+lpt_status) & (LPS_SEL|LPS_OUT|LPS_NBSY|LPS_NERR)) !=
(LPS_SEL|LPS_NBSY|LPS_NERR));
sc->sc_control = LPC_SEL|LPC_NINIT;
if (sc->sc_flags & LP_AUTOLF)
sc->sc_control |= LPC_AUTOL;
/* enable interrupt if interrupt-driven */
if (sc->sc_irq & LP_USE_IRQ)
sc->sc_control |= LPC_ENA;
outb(port+lpt_control, sc->sc_control);
#endif
sc->sc_state = OPEN;
sc->sc_inbuf = malloc(BUFSIZE, M_DEVBUF, M_WAITOK);
sc->sc_xfercnt = 0;
@ -608,31 +469,12 @@ static int
lptclose(struct cdev *dev, int flags, int fmt, struct thread *td)
{
struct lpt_softc *sc;
#ifndef PC98
int port;
#endif
sc = devclass_get_softc(olpt_devclass, LPTUNIT(minor(dev)));
if(sc->sc_flags & LP_BYPASS)
goto end_close;
#ifndef PC98
port = sc->sc_port;
#endif
sc->sc_state &= ~OPEN;
#ifndef PC98
/* if the last write was interrupted, don't complete it */
if((!(sc->sc_state & INTERRUPTED)) && (sc->sc_irq & LP_USE_IRQ))
while ((inb(port+lpt_status) & (LPS_SEL|LPS_OUT|LPS_NBSY|LPS_NERR)) !=
(LPS_SEL|LPS_NBSY|LPS_NERR) || sc->sc_xfercnt)
/* wait 1/4 second, give up if we get a signal */
if (tsleep (sc, LPPRI|PCATCH,
"lpclose", hz) != EWOULDBLOCK)
break;
outb(sc->sc_port+lpt_control, LPC_NINIT);
#endif
free(sc->sc_inbuf, M_DEVBUF);
end_close:
@ -695,17 +537,10 @@ pushbytes(struct lpt_softc * sc)
/* output data */
outb(port+lpt_data, ch);
#ifdef PC98
DELAY(1);
outb(port+lpt_control, LPC_PSTB);
DELAY(1);
outb(port+lpt_control, LPC_NPSTB);
#else
/* strobe */
outb(port+lpt_control, sc->sc_control|LPC_STB);
outb(port+lpt_control, sc->sc_control);
#endif
}
return(0);
}

View File

@ -1080,7 +1080,6 @@ scterm_puts(scr_stat *scp, u_char *buf, int len)
scp->xpos = 0;
break;
#ifdef PC98
case 0x0e: /* ^N */
tcp->kanji_type = KTYPE_JKANA;
tcp->esc = 0;
@ -1092,7 +1091,6 @@ scterm_puts(scr_stat *scp, u_char *buf, int len)
tcp->esc = 0;
tcp->kanji_1st_char = 0;
break;
#endif /* PC98 */
case 0x1b: /* start escape sequence */
tcp->esc = 1;