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Partially revert r215182. There appears to be a silicon bug on the 970
that causes AP bringup to fail if some of the Cell HID-register code is anywhere in the instruction stream. Pending a better solution, cache performance on SMP Cell systems running without a hypervisor will be suboptimal.
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parent
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=215197
@ -228,8 +228,8 @@ cpudep_save_config(void *dummy)
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powerpc_sync();
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break;
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#ifdef __powerpc64__
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case IBMCELLBE:
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#ifdef NOTYET /* Causes problems if in instruction stream on 970 */
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if (mfmsr() & PSL_HV) {
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bsp_state[0] = mfspr(SPR_HID0);
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bsp_state[1] = mfspr(SPR_HID1);
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@ -238,11 +238,11 @@ cpudep_save_config(void *dummy)
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bsp_state[4] = mfspr(SPR_CELL_TSCR);
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}
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#endif
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bsp_state[5] = mfspr(SPR_CELL_TSRL);
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break;
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#endif
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case MPC7450:
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case MPC7455:
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case MPC7457:
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@ -303,8 +303,8 @@ cpudep_ap_setup()
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powerpc_sync();
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break;
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#ifdef __powerpc64__
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case IBMCELLBE:
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#ifdef NOTYET /* Causes problems if in instruction stream on 970 */
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if (mfmsr() & PSL_HV) {
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mtspr(SPR_HID0, bsp_state[0]);
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mtspr(SPR_HID1, bsp_state[1]);
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@ -313,11 +313,11 @@ cpudep_ap_setup()
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mtspr(SPR_CELL_TSCR, bsp_state[4]);
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}
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#endif
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mtspr(SPR_CELL_TSRL, bsp_state[5]);
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break;
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#endif
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case MPC7450:
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case MPC7455:
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case MPC7457:
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