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Add a soft trap for restoring the fpu registers from the pcb.
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=88780
@ -361,6 +361,18 @@
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.endr
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.endr
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.endm
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.endm
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.macro tl0_fp_restore
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wr %g0, FPRS_FEF, %fprs
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wr %g0, ASI_BLK_S, %asi
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ldda [PCB_REG + PCB_FPSTATE + FP_FB0] %asi, %f0
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ldda [PCB_REG + PCB_FPSTATE + FP_FB1] %asi, %f16
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ldda [PCB_REG + PCB_FPSTATE + FP_FB2] %asi, %f32
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ldda [PCB_REG + PCB_FPSTATE + FP_FB3] %asi, %f48
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membar #Sync
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done
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.align 32
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.endm
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.macro tl0_insn_excptn
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.macro tl0_insn_excptn
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wr %g0, ASI_IMMU, %asi
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wr %g0, ASI_IMMU, %asi
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rdpr %tpc, %g3
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rdpr %tpc, %g3
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@ -361,6 +361,18 @@
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.endr
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.endr
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.endm
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.endm
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.macro tl0_fp_restore
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wr %g0, FPRS_FEF, %fprs
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wr %g0, ASI_BLK_S, %asi
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ldda [PCB_REG + PCB_FPSTATE + FP_FB0] %asi, %f0
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ldda [PCB_REG + PCB_FPSTATE + FP_FB1] %asi, %f16
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ldda [PCB_REG + PCB_FPSTATE + FP_FB2] %asi, %f32
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ldda [PCB_REG + PCB_FPSTATE + FP_FB3] %asi, %f48
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membar #Sync
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done
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.align 32
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.endm
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.macro tl0_insn_excptn
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.macro tl0_insn_excptn
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wr %g0, ASI_IMMU, %asi
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wr %g0, ASI_IMMU, %asi
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rdpr %tpc, %g3
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rdpr %tpc, %g3
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