mirror of
https://git.FreeBSD.org/src.git
synced 2024-12-27 11:55:06 +00:00
Important update for the igb driver:
- Add the change made in em to the actual unrefreshed number
of descriptors is used as a basis in rxeof on the way out
to determine if more refresh is needed. NOTE: there is a
difference in the ring setup in igb, this is not accidental,
it is necessitated by hardware behavior, when you reset the
newer adapters it will not let you write RDH, it ALWAYS sets
it to 0. Thus the way em does it is not possible.
- Change the sysctl handling of flow control, it will now make
the change dynamically when the variable setting changes rather
than requiring a reset.
- Change the eee sysctl naming, validation found the old unintuitive :)
- Last but not least, some important performance tweaks in the TX
path, I found that UDP behavior could be drastically hindered or
improved with just small changes in the start loop. What I have
here is what testing has shown to be the best overall. Its interesting
to note that changing the clean threshold to start at a full half of
the ring, made a BIG difference in performance. I hope that this
will prove to be advantageous for most workloads.
MFC in a week.
This commit is contained in:
Jack F Vogel
parent
4c821a3978
commit
cf696f26c9
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=220375
@ -1,6 +1,6 @@
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/******************************************************************************
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Copyright (c) 2001-2010, Intel Corporation
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Copyright (c) 2001-2011, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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@ -99,7 +99,7 @@ int igb_display_debug_stats = 0;
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/*********************************************************************
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* Driver version:
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*********************************************************************/
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char igb_driver_version[] = "version - 2.1.7";
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char igb_driver_version[] = "version - 2.2.3";
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/*********************************************************************
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@ -262,6 +262,7 @@ static void igb_handle_link(void *context, int pending);
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static void igb_set_sysctl_value(struct adapter *, const char *,
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const char *, int *, int);
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static int igb_set_flowcntl(SYSCTL_HANDLER_ARGS);
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#ifdef DEVICE_POLLING
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static poll_handler_t igb_poll;
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@ -350,8 +351,8 @@ static int igb_fc_setting = e1000_fc_full;
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TUNABLE_INT("hw.igb.fc_setting", &igb_fc_setting);
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/* Energy Efficient Ethernet - default to off */
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static int igb_eee_setting = FALSE;
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TUNABLE_INT("hw.igb.ee_setting", &igb_eee_setting);
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static int igb_eee_disabled = TRUE;
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TUNABLE_INT("hw.igb.eee_disabled", &igb_eee_disabled);
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/*
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** DMA Coalescing, only for i350 - default to off,
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@ -445,6 +446,11 @@ igb_attach(device_t dev)
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OID_AUTO, "enable_aim", CTLTYPE_INT|CTLFLAG_RW,
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&igb_enable_aim, 1, "Interrupt Moderation");
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SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
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SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
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OID_AUTO, "flow_control", CTLTYPE_INT|CTLFLAG_RW,
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adapter, 0, igb_set_flowcntl, "I", "Flow Control");
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callout_init_mtx(&adapter->timer, &adapter->core_mtx, 0);
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/* Determine hardware and mac info */
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@ -471,11 +477,6 @@ igb_attach(device_t dev)
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"max number of rx packets to process", &adapter->rx_process_limit,
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igb_rx_process_limit);
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/* Sysctl for setting the interface flow control */
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igb_set_sysctl_value(adapter, "flow_control",
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"configure flow control",
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&adapter->fc_setting, igb_fc_setting);
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/*
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* Validate number of transmit and receive descriptors. It
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* must not exceed hardware maximum, and must be multiple
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@ -552,10 +553,10 @@ igb_attach(device_t dev)
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igb_set_sysctl_value(adapter, "dma_coalesce",
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"configure dma coalesce",
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&adapter->dma_coalesce, igb_dma_coalesce);
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igb_set_sysctl_value(adapter, "eee_control",
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igb_set_sysctl_value(adapter, "eee_disabled",
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"enable Energy Efficient Ethernet",
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&adapter->hw.dev_spec._82575.eee_disable,
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igb_eee_setting);
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igb_eee_disabled);
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e1000_set_eee_i350(&adapter->hw);
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}
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@ -822,11 +823,12 @@ igb_start_locked(struct tx_ring *txr, struct ifnet *ifp)
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if (!adapter->link_active)
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return;
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/* Call cleanup if number of TX descriptors low */
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if (txr->tx_avail <= IGB_TX_CLEANUP_THRESHOLD)
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igb_txeof(txr);
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while (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) {
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/* Cleanup if TX descriptors are low */
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if (txr->tx_avail <= IGB_TX_CLEANUP_THRESHOLD)
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igb_txeof(txr);
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if (txr->tx_avail <= IGB_TX_OP_THRESHOLD) {
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if (txr->tx_avail <= IGB_MAX_SCATTER) {
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ifp->if_drv_flags |= IFF_DRV_OACTIVE;
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break;
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}
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@ -932,13 +934,6 @@ igb_mq_start_locked(struct ifnet *ifp, struct tx_ring *txr, struct mbuf *m)
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/* Process the queue */
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while (next != NULL) {
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/* Call cleanup if number of TX descriptors low */
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if (txr->tx_avail <= IGB_TX_CLEANUP_THRESHOLD)
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igb_txeof(txr);
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if (txr->tx_avail <= IGB_TX_OP_THRESHOLD) {
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ifp->if_drv_flags |= IFF_DRV_OACTIVE;
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break;
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}
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if ((err = igb_xmit(txr, &next)) != 0) {
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if (next != NULL)
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err = drbr_enqueue(ifp, txr->br, next);
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@ -949,6 +944,12 @@ igb_mq_start_locked(struct ifnet *ifp, struct tx_ring *txr, struct mbuf *m)
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ETHER_BPF_MTAP(ifp, next);
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if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
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break;
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if (txr->tx_avail <= IGB_TX_CLEANUP_THRESHOLD)
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igb_txeof(txr);
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if (txr->tx_avail <= IGB_MAX_SCATTER) {
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ifp->if_drv_flags |= IFF_DRV_OACTIVE;
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break;
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}
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next = drbr_dequeue(ifp, txr->br);
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}
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if (enq > 0) {
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@ -1266,10 +1267,13 @@ igb_init_locked(struct adapter *adapter)
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else
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#endif /* DEVICE_POLLING */
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{
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igb_enable_intr(adapter);
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E1000_WRITE_REG(&adapter->hw, E1000_ICS, E1000_ICS_LSC);
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igb_enable_intr(adapter);
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E1000_WRITE_REG(&adapter->hw, E1000_ICS, E1000_ICS_LSC);
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}
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/* Set Energy Efficient Ethernet */
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e1000_set_eee_i350(&adapter->hw);
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/* Don't reset the phy next time init gets called */
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adapter->hw.phy.reset_disable = TRUE;
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}
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@ -1458,10 +1462,6 @@ igb_msix_que(void *arg)
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more_tx = igb_txeof(txr);
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IGB_TX_UNLOCK(txr);
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/* If RX ring is depleted do refresh first */
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if (rxr->next_to_check == rxr->next_to_refresh)
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igb_refresh_mbufs(rxr, rxr->next_to_check);
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more_rx = igb_rxeof(que, adapter->rx_process_limit, NULL);
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if (igb_enable_aim == FALSE)
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@ -2670,14 +2670,6 @@ igb_reset(struct adapter *adapter)
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fc->pause_time = IGB_FC_PAUSE_TIME;
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fc->send_xon = TRUE;
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/* Set Flow control, use the tunable location if sane */
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if ((igb_fc_setting >= 0) && (igb_fc_setting < 4))
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fc->requested_mode = adapter->fc_setting;
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else
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fc->requested_mode = e1000_fc_none;
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fc->current_mode = fc->requested_mode;
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/* Issue a global reset */
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e1000_reset_hw(hw);
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E1000_WRITE_REG(hw, E1000_WUC, 0);
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@ -2864,7 +2856,7 @@ igb_dma_malloc(struct adapter *adapter, bus_size_t size,
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}
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error = bus_dmamem_alloc(dma->dma_tag, (void**) &dma->dma_vaddr,
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BUS_DMA_NOWAIT, &dma->dma_map);
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BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &dma->dma_map);
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if (error) {
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device_printf(adapter->dev,
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"%s: bus_dmamem_alloc(%ju) failed: %d\n",
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@ -3631,19 +3623,17 @@ igb_txeof(struct tx_ring *txr)
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* If we have a minimum free, clear IFF_DRV_OACTIVE
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* to tell the stack that it is OK to send packets.
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*/
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if (txr->tx_avail > IGB_TX_OP_THRESHOLD)
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if (txr->tx_avail > IGB_TX_CLEANUP_THRESHOLD) {
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ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
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/* All clean, turn off the watchdog */
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if (txr->tx_avail == adapter->num_tx_desc) {
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txr->queue_status = IGB_QUEUE_IDLE;
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return (FALSE);
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}
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/* All clean, turn off the watchdog */
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if (txr->tx_avail == adapter->num_tx_desc) {
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txr->queue_status = IGB_QUEUE_IDLE;
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return (FALSE);
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}
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}
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return (TRUE);
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}
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/*********************************************************************
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*
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* Refresh mbuf buffers for RX descriptor rings
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@ -3830,13 +3820,11 @@ igb_allocate_receive_buffers(struct rx_ring *rxr)
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static void
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igb_free_receive_ring(struct rx_ring *rxr)
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{
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struct adapter *adapter;
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struct adapter *adapter = rxr->adapter;
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struct igb_rx_buf *rxbuf;
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int i;
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adapter = rxr->adapter;
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i = rxr->next_to_check;
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while (i != rxr->next_to_refresh) {
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for (int i = 0; i < adapter->num_rx_desc; i++) {
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rxbuf = &rxr->rx_buffers[i];
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if (rxbuf->m_head != NULL) {
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bus_dmamap_sync(rxr->htag, rxbuf->hmap,
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@ -3854,12 +3842,7 @@ igb_free_receive_ring(struct rx_ring *rxr)
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}
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rxbuf->m_head = NULL;
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rxbuf->m_pack = NULL;
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if (++i == adapter->num_rx_desc)
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i = 0;
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}
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rxr->next_to_check = 0;
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rxr->next_to_refresh = 0;
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}
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@ -3877,33 +3860,32 @@ igb_setup_receive_ring(struct rx_ring *rxr)
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struct igb_rx_buf *rxbuf;
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bus_dma_segment_t pseg[1], hseg[1];
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struct lro_ctrl *lro = &rxr->lro;
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int i, j, nsegs, error = 0;
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int rsize, nsegs, error = 0;
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adapter = rxr->adapter;
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dev = adapter->dev;
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ifp = adapter->ifp;
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/* Clear the ring contents */
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IGB_RX_LOCK(rxr);
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/* Invalidate all descriptors */
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for (i = 0; i < adapter->num_rx_desc; i++) {
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union e1000_adv_rx_desc* cur;
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cur = &rxr->rx_base[i];
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cur->wb.upper.status_error = 0;
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}
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rsize = roundup2(adapter->num_rx_desc *
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sizeof(union e1000_adv_rx_desc), IGB_DBA_ALIGN);
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bzero((void *)rxr->rx_base, rsize);
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/*
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** Free current RX buffer structures and their mbufs
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*/
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igb_free_receive_ring(rxr);
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/* Configure for header split? */
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if (igb_header_split)
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rxr->hdr_split = TRUE;
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/* Get our indices */
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i = j = rxr->next_to_refresh;
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if (++j == adapter->num_rx_desc)
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j = 0;
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/* Now replenish the ring mbufs */
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while (j != rxr->next_to_check) {
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for (int j = 0; j < adapter->num_rx_desc; ++j) {
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struct mbuf *mh, *mp;
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rxbuf = &rxr->rx_buffers[i];
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rxbuf = &rxr->rx_buffers[j];
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if (rxr->hdr_split == FALSE)
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goto skip_head;
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@ -3926,7 +3908,7 @@ igb_setup_receive_ring(struct rx_ring *rxr)
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bus_dmamap_sync(rxr->htag,
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rxbuf->hmap, BUS_DMASYNC_PREREAD);
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/* Update descriptor */
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rxr->rx_base[i].read.hdr_addr = htole64(hseg[0].ds_addr);
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rxr->rx_base[j].read.hdr_addr = htole64(hseg[0].ds_addr);
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skip_head:
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/* Now the payload cluster */
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@ -3947,16 +3929,12 @@ igb_setup_receive_ring(struct rx_ring *rxr)
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bus_dmamap_sync(rxr->ptag,
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rxbuf->pmap, BUS_DMASYNC_PREREAD);
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/* Update descriptor */
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rxr->rx_base[i].read.pkt_addr = htole64(pseg[0].ds_addr);
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/* Setup for next loop */
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i = j;
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if (++j == adapter->num_rx_desc)
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j = 0;
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rxr->rx_base[j].read.pkt_addr = htole64(pseg[0].ds_addr);
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}
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/* Setup our descriptor indices */
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rxr->next_to_refresh = i;
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rxr->next_to_check = 0;
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rxr->next_to_refresh = adapter->num_rx_desc - 1;
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rxr->lro_enabled = FALSE;
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rxr->rx_split_packets = 0;
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rxr->rx_bytes = 0;
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@ -3989,12 +3967,12 @@ igb_setup_receive_ring(struct rx_ring *rxr)
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return (0);
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fail:
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rxr->next_to_refresh = i;
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igb_free_receive_ring(rxr);
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IGB_RX_UNLOCK(rxr);
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return (error);
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}
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/*********************************************************************
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*
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* Initialize all receive rings.
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@ -4528,7 +4506,7 @@ igb_rxeof(struct igb_queue *que, int count, int *done)
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}
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/* Catch any remainders */
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if (processed != 0 || i == rxr->next_to_refresh)
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if (igb_rx_unrefreshed(rxr))
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igb_refresh_mbufs(rxr, i);
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rxr->next_to_check = i;
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@ -5552,3 +5530,38 @@ igb_set_sysctl_value(struct adapter *adapter, const char *name,
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OID_AUTO, name, CTLTYPE_INT|CTLFLAG_RW, limit, value, description);
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}
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/*
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** Set flow control using sysctl:
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** Flow control values:
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** 0 - off
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** 1 - rx pause
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** 2 - tx pause
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** 3 - full
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*/
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static int
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igb_set_flowcntl(SYSCTL_HANDLER_ARGS)
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{
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int error;
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struct adapter *adapter;
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error = sysctl_handle_int(oidp, &igb_fc_setting, 0, req);
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if (error)
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return (error);
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adapter = (struct adapter *) arg1;
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switch (igb_fc_setting) {
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case e1000_fc_rx_pause:
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case e1000_fc_tx_pause:
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case e1000_fc_full:
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adapter->hw.fc.requested_mode = igb_fc_setting;
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break;
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case e1000_fc_none:
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default:
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adapter->hw.fc.requested_mode = e1000_fc_none;
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}
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adapter->hw.fc.current_mode = adapter->hw.fc.requested_mode;
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e1000_force_mac_fc(&adapter->hw);
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return error;
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}
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@ -1,6 +1,6 @@
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/******************************************************************************
|
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|
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Copyright (c) 2001-2010, Intel Corporation
|
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Copyright (c) 2001-2011, Intel Corporation
|
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All rights reserved.
|
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|
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Redistribution and use in source and binary forms, with or without
|
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@ -132,10 +132,9 @@
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/*
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* This parameter controls when the driver calls the routine to reclaim
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* transmit descriptors.
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* transmit descriptors. Cleaning earlier seems a win.
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*/
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#define IGB_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8)
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#define IGB_TX_OP_THRESHOLD (adapter->num_tx_desc / 32)
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#define IGB_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 2)
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/*
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* This parameter controls whether or not autonegotation is enabled.
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@ -400,7 +399,6 @@ struct adapter {
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u16 link_speed;
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u16 link_duplex;
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u32 smartspeed;
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u32 fc_setting;
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u32 dma_coalesce;
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/* Interface queues */
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@ -483,6 +481,21 @@ struct igb_rx_buf {
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bus_dmamap_t pmap; /* bus_dma map for packet */
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};
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/*
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** Find the number of unrefreshed RX descriptors
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*/
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static inline u16
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igb_rx_unrefreshed(struct rx_ring *rxr)
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{
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struct adapter *adapter = rxr->adapter;
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if (rxr->next_to_check > rxr->next_to_refresh)
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return (rxr->next_to_check - rxr->next_to_refresh - 1);
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else
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return ((adapter->num_rx_desc + rxr->next_to_check) -
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rxr->next_to_refresh - 1);
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}
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#define IGB_CORE_LOCK_INIT(_sc, _name) \
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mtx_init(&(_sc)->core_mtx, _name, "IGB Core Lock", MTX_DEF)
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#define IGB_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->core_mtx)
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|
||||
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