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ipq4018: add qcom-gcc-ipq4018 and dependencies into the build
* add the extres stuff into the build, I'm going to end up leveraging all of it * include the qcom-gcc-ipq4018 driver which currently implements the hwreset side of the API. Reviewed by: andrew, manu, imp Differential Revision: https://reviews.freebsd.org/D32723
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@ -12,6 +12,15 @@ files "../qualcomm/std.ipq4018"
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device uart
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device uart_msm # Qualcomm MSM UART driver
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# EXT_RESOURCES pseudo devices
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options EXT_RESOURCES
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device clk
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device phy
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device hwreset
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device nvmem
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device regulator
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device syscon
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# Random
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device qcom_rnd
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@ -28,6 +37,9 @@ device mpcore_timer
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# PSCI - SMC calls, needed for qualcomm SCM
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device psci
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# Clock/Reset provider
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device qcom_gcc_ipq4018
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options FDT
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# Disable CP14 work in DDB as TZ won't let us by default
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82
sys/arm/qualcomm/qcom_gcc_ipq4018_clock.c
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82
sys/arm/qualcomm/qcom_gcc_ipq4018_clock.c
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@ -0,0 +1,82 @@
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/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2021, Adrian Chadd <adrian@FreeBSD.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/* Driver for Qualcomm IPQ4018 clock and reset device */
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/sglist.h>
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#include <sys/random.h>
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#include <sys/stdatomic.h>
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#include <sys/mutex.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/bus.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dt-bindings/clock/qcom,gcc-ipq4019.h>
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#include <arm/qualcomm/qcom_gcc_ipq4018_var.h>
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/*
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* Fixed frequency clock sources:
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*
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* P_XO - 48MHz
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* sleep-clk - is really 32KHz, although older DTS have it as 32.768KHz
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*/
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/*
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* PLL derived sources:
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*
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* P_FEPLL125 - 125MHz
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* P_FEPLL125DLY - 125MHz
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* P_FEPLL200 - 200MHz
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* P_FEPLL500 - 500MHz
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* P_FEPLLWCSS2G - TBD
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* P_FEPLLWCSS5G - TBD
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*
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* Then there are two DDR PLLs which are treated/configured slightly
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* differently:
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*
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* P_DDRPLLAPSS - TBD
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* P_DDRPLLSDCC - TBD
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*/
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/*
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* Interesting stuff in Linux whilst I reverse engineer + figure it out:
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* /sys/kernel/debug/clk
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*/
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@ -6,4 +6,5 @@ arm/qualcomm/qcom_cpu_kpssv2.c optional smp
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dev/qcom_rnd/qcom_rnd.c optional qcom_rnd
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arm/qualcomm/qcom_gcc_ipq4018.c optional qcom_gcc_ipq4018
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arm/qualcomm/qcom_gcc_ipq4018_reset.c optional qcom_gcc_ipq4018
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arm/qualcomm/qcom_gcc_ipq4018_clock.c optional qcom_gcc_ipq4018
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