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Code Issues Releases Activity

The VM system no longer uses setPQL2(). Remove it and its helpers.

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This commit is contained in:
Alan Cox 2008-05-23 04:03:54 +00:00
parent 238d4dad3f
commit d1fdd63483
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=179229
7 changed files with 0 additions and 372 deletions
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29
sys/amd64/amd64/identcpu.c
View File

@ -71,8 +71,6 @@ void panicifcpuunsupported(void);
static void print_AMD_info(void);
static void print_AMD_assoc(int i);
void setPQL2(int *const size, int *const ways);
static void setPQL2_AMD(int *const size, int *const ways);
int cpu_class;
char machine[] = "amd64";
@ -550,30 +548,3 @@ print_AMD_info(void)
print_AMD_l2_assoc((regs[2] >> 12) & 0x0f);
}
}
static void
setPQL2_AMD(int *const size, int *const ways)
{
if (cpu_exthigh >= 0x80000006) {
u_int regs[4];
do_cpuid(0x80000006, regs);
*size = regs[2] >> 16;
*ways = (regs[2] >> 12) & 0x0f;
switch (*ways) {
case 0: /* disabled/not present */
case 15: /* fully associative */
default: *ways = 1; break; /* reserved configuration */
case 4: *ways = 4; break;
case 6: *ways = 8; break;
case 8: *ways = 16; break;
}
}
}
void
setPQL2(int *const size, int *const ways)
{
if (strcmp(cpu_vendor, "AuthenticAMD") == 0)
setPQL2_AMD(size, ways);
}

8
sys/arm/arm/identcpu.c
View File

@ -356,14 +356,6 @@ static const char * const wtnames[] = {
"**unknown 15**",
};
void setPQL2(int *const size, int *const ways);
void
setPQL2(int *const size, int *const ways)
{
return;
}
extern int ctrl;
void

298
sys/i386/i386/identcpu.c
View File

@ -77,10 +77,6 @@ void panicifcpuunsupported(void);
static void identifycyrix(void);
static void init_exthigh(void);
void setPQL2(int *const size, int *const ways);
static void setPQL2_AMD(int *const size, int *const ways);
static void setPQL2_INTEL(int *const size, int *const ways);
static void get_INTEL_TLB(u_int data, int *const size, int *const ways);
static void print_AMD_info(void);
static void print_INTEL_info(void);
static void print_INTEL_TLB(u_int data);
@ -1462,300 +1458,6 @@ print_INTEL_TLB(u_int data)
}
}
static void
setPQL2_AMD(int *const size, int *const ways)
{
if (cpu_exthigh >= 0x80000006) {
u_int regs[4];
do_cpuid(0x80000006, regs);
*size = regs[2] >> 16;
*ways = (regs[2] >> 12) & 0x0f;
}
}
static void
setPQL2_INTEL(int *const size, int *const ways)
{
u_int rounds, regnum;
u_int regs[4];
u_int nwaycode;
if (cpu_high >= 2) {
rounds = 0;
do {
do_cpuid(0x2, regs);
if (rounds == 0 && (rounds = (regs[0] & 0xff)) == 0)
break; /* we have a buggy CPU */
for (regnum = 0; regnum <= 3; ++regnum) {
if (regs[regnum] & (1<<31))
continue;
if (regnum != 0)
get_INTEL_TLB(regs[regnum] & 0xff,
size, ways);
get_INTEL_TLB((regs[regnum] >> 8) & 0xff,
size, ways);
get_INTEL_TLB((regs[regnum] >> 16) & 0xff,
size, ways);
get_INTEL_TLB((regs[regnum] >> 24) & 0xff,
size, ways);
}
} while (--rounds > 0);
}
if (cpu_exthigh >= 0x80000006) {
do_cpuid(0x80000006, regs);
if (*size < ((regs[2] >> 16) & 0xffff)) {
*size = (regs[2] >> 16) & 0xffff;
nwaycode = (regs[2] >> 12) & 0x0f;
if (nwaycode >= 0x02 && nwaycode <= 0x08)
*ways = 1 << (nwaycode / 2);
else
*ways = 0;
}
}
}
static void
get_INTEL_TLB(u_int data, int *const size, int *const ways)
{
switch (data) {
default:
break;
case 0x22:
/* 3rd-level cache: 512 KB, 4-way set associative,
* sectored cache, 64 byte line size */
if (*size < 512) {
*size = 512;
*ways = 4;
}
break;
case 0x23:
/* 3rd-level cache: 1 MB, 8-way set associative,
* sectored cache, 64 byte line size */
if (*size < 1024) {
*size = 1024;
*ways = 8;
}
break;
case 0x25:
/* 3rd-level cache: 2 MB, 8-way set associative,
* sectored cache, 64 byte line size */
if (*size < 2048) {
*size = 2048;
*ways = 8;
}
break;
case 0x29:
/* 3rd-level cache: 4 MB, 8-way set associative,
* sectored cache, 64 byte line size */
if (*size < 4096) {
*size = 4096;
*ways = 8;
}
break;
case 0x39:
/* 2nd-level cache: 128 KB, 4-way set associative,
* sectored cache, 64 byte line size */
if (*size < 128) {
*size = 128;
*ways = 4;
}
break;
case 0x3b:
/* 2nd-level cache: 128 KB, 2-way set associative,
* sectored cache, 64 byte line size */
if (*size < 128) {
*size = 128;
*ways = 2;
}
break;
case 0x3c:
/* 2nd-level cache: 256 KB, 4-way set associative,
* sectored cache, 64 byte line size */
if (*size < 256) {
*size = 256;
*ways = 4;
}
break;
case 0x41:
/* 2nd-level cache: 128 KB, 4-way set associative,
* 32 byte line size */
if (*size < 128) {
*size = 128;
*ways = 4;
}
break;
case 0x42:
/* 2nd-level cache: 256 KB, 4-way set associative,
* 32 byte line size */
if (*size < 256) {
*size = 256;
*ways = 4;
}
break;
case 0x43:
/* 2nd-level cache: 512 KB, 4-way set associative,
* 32 byte line size */
if (*size < 512) {
*size = 512;
*ways = 4;
}
break;
case 0x44:
/* 2nd-level cache: 1 MB, 4-way set associative,
* 32 byte line size */
if (*size < 1024) {
*size = 1024;
*ways = 4;
}
break;
case 0x45:
/* 2nd-level cache: 2 MB, 4-way set associative,
* 32 byte line size */
if (*size < 2048) {
*size = 2048;
*ways = 4;
}
break;
case 0x46:
/* 3rd-level cache: 4 MB, 4-way set associative,
* 64 byte line size */
if (*size < 4096) {
*size = 4096;
*ways = 4;
}
break;
case 0x47:
/* 3rd-level cache: 8 MB, 8-way set associative,
* 64 byte line size */
if (*size < 8192) {
*size = 8192;
*ways = 8;
}
break;
case 0x78:
/* 2nd-level cache: 1 MB, 4-way set associative,
* 64-byte line size */
if (*size < 1024) {
*size = 1024;
*ways = 4;
}
break;
case 0x79:
/* 2nd-level cache: 128 KB, 8-way set associative,
* sectored cache, 64 byte line size */
if (*size < 128) {
*size = 128;
*ways = 8;
}
break;
case 0x7a:
/* 2nd-level cache: 256 KB, 8-way set associative,
* sectored cache, 64 byte line size */
if (*size < 256) {
*size = 256;
*ways = 8;
}
break;
case 0x7b:
/* 2nd-level cache: 512 KB, 8-way set associative,
* sectored cache, 64 byte line size */
if (*size < 512) {
*size = 512;
*ways = 8;
}
break;
case 0x7c:
/* 2nd-level cache: 1 MB, 8-way set associative,
* sectored cache, 64 byte line size */
if (*size < 1024) {
*size = 1024;
*ways = 8;
}
break;
case 0x7d:
/* 2nd-level cache: 2 MB, 8-way set associative,
* 64-byte line size */
if (*size < 2048) {
*size = 2048;
*ways = 8;
}
break;
case 0x7f:
/* 2nd-level cache: 512 KB, 2-way set associative,
* 64-byte line size */
if (*size < 512) {
*size = 512;
*ways = 2;
}
break;
case 0x82:
/* 2nd-level cache: 256 KB, 8-way set associative,
* 32 byte line size */
if (*size < 256) {
*size = 256;
*ways = 8;
}
break;
case 0x83:
/* 2nd-level cache: 512 KB, 8-way set associative,
* 32 byte line size */
if (*size < 512) {
*size = 512;
*ways = 8;
}
break;
case 0x84:
/* 2nd-level cache: 1 MB, 8-way set associative,
* 32 byte line size */
if (*size < 1024) {
*size = 1024;
*ways = 8;
}
break;
case 0x85:
/* 2nd-level cache: 2 MB, 8-way set associative,
* 32 byte line size */
if (*size < 2048) {
*size = 2048;
*ways = 8;
}
break;
case 0x86:
/* 2nd-level cache: 512 KB, 4-way set associative,
* 64 byte line size */
if (*size < 512) {
*size = 512;
*ways = 4;
}
break;
case 0x87:
/* 2nd-level cache: 1 MB, 8-way set associative,
* 64 byte line size */
if (*size < 1024) {
*size = 512;
*ways = 8;
}
break;
}
}
void
setPQL2(int *const size, int *const ways)
{
/* make sure the cpu_exthigh variable is initialized */
init_exthigh();
if (strcmp(cpu_vendor, "AuthenticAMD") == 0)
setPQL2_AMD(size, ways);
else if (strcmp(cpu_vendor, "GenuineIntel") == 0)
setPQL2_INTEL(size, ways);
}
static void
print_transmeta_info(void)
{

8
sys/ia64/ia64/machdep.c
View File

@ -162,14 +162,6 @@ struct kva_md_info kmi;
#define Mhz 1000000L
#define Ghz (1000L*Mhz)
void setPQL2(int *const size, int *const ways);
void
setPQL2(int *const size, int *const ways)
{
return;
}
static void
identifycpu(void)
{

8
sys/powerpc/aim/machdep.c
View File

@ -166,14 +166,6 @@ struct bat battable[16];
struct kva_md_info kmi;
void setPQL2(int *const size, int *const ways);
void
setPQL2(int *const size, int *const ways)
{
return;
}
static void
powerpc_ofw_shutdown(void *junk, int howto)
{

8
sys/powerpc/booke/machdep.c
View File

@ -186,14 +186,6 @@ void print_kernel_section_addr(void);
void dump_bootinfo(void);
void dump_kenv(void);
void e500_init(u_int32_t, u_int32_t, void *);
void setPQL2(int *const size, int *const ways);
void
setPQL2(int *const size, int *const ways)
{
return;
}
static void
cpu_e500_startup(void *dummy)

13
sys/sparc64/sparc64/identcpu.c
View File

@ -29,19 +29,6 @@ SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD,
int cpu_impl;
void setPQL2(int *const size, int *const ways);
void
setPQL2(int *const size, int *const ways)
{
#ifdef SUN4V
/* XXX hardcoding is lame */
*size = 3*1024;
*ways = 12;
#endif
return;
}
void
cpu_identify(u_long vers, u_int freq, u_int id)
{