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Code Issues Releases Activity

Support for the new DH89xxCC PCH chipset including:

Browse Source 
- SATA controller
      - Watchdog timer
      - SMBus controller
This commit is contained in:
Jack F Vogel 2011-01-31 18:41:52 +00:00
parent 8046c499ab
commit d5267ede37
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=218140
6 changed files with 9 additions and 0 deletions
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1
sys/dev/ahci/ahci.c
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@ -161,6 +161,7 @@ static struct {
{0x1c038086, 0x00, "Intel Cougar Point", 0},
{0x1c048086, 0x00, "Intel Cougar Point", 0},
{0x1c058086, 0x00, "Intel Cougar Point", 0},
{0x23238086, 0x00, "Intel DH89xxCC", 0},
{0x2361197b, 0x00, "JMicron JMB361", AHCI_Q_NOFORCE},
{0x2363197b, 0x00, "JMicron JMB363", AHCI_Q_NOFORCE},
{0x2365197b, 0x00, "JMicron JMB365", AHCI_Q_NOFORCE},

1
sys/dev/ata/ata-pci.h
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@ -229,6 +229,7 @@ struct ata_pci_controller {
#define ATA_I31244 0x32008086
#define ATA_ISCH 0x811a8086
#define ATA_DH89XXCC 0x23238086
#define ATA_ITE_ID 0x1283
#define ATA_IT8211F 0x82111283

1
sys/dev/ata/chipsets/ata-intel.c
View File

@ -178,6 +178,7 @@ ata_intel_probe(device_t dev)
{ ATA_CPT_S4, 0, INTEL_6CH2, 0, ATA_SA300, "Cougar Point" },
{ ATA_I31244, 0, 0, 2, ATA_SA150, "31244" },
{ ATA_ISCH, 0, 0, 1, ATA_UDMA5, "SCH" },
{ ATA_DH89XXCC, 0, INTEL_AHCI, 0, ATA_SA300, "DH89xxCC" },
{ 0, 0, 0, 0, 0, 0}};
if (pci_get_vendor(dev) != ATA_INTEL_ID)

4
sys/dev/ichsmb/ichsmb_pci.c
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@ -81,6 +81,7 @@ __FBSDID("$FreeBSD$");
#define ID_PCH 0x3b308086
#define ID_6300ESB 0x25a48086
#define ID_631xESB 0x269b8086
#define ID_DH89XXCC 0x23308086
#define ID_CPT 0x1c228086
#define PCIS_SERIALBUS_SMBUS_PROGIF 0x00
@ -175,6 +176,9 @@ ichsmb_pci_probe(device_t dev)
case ID_631xESB:
device_set_desc(dev, "Intel 631xESB/6321ESB (ESB2) SMBus controller");
break;
case ID_DH89XXCC:
device_set_desc(dev, "Intel DH89xxCC SMBus controller");
break;
case ID_CPT:
device_set_desc(dev, "Intel Cougar Point SMBus controller");
break;

1
sys/dev/ichwd/ichwd.c
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@ -157,6 +157,7 @@ static struct ichwd_device ichwd_devices[] = {
{ DEVICEID_CPT29, "Intel Cougar Point watchdog timer", 10 },
{ DEVICEID_CPT30, "Intel Cougar Point watchdog timer", 10 },
{ DEVICEID_CPT31, "Intel Cougar Point watchdog timer", 10 },
{ DEVICEID_DH89XXCC_LPC, "Intel DH89xxCC watchdog timer", 10 },
{ 0, NULL, 0 },
};

1
sys/dev/ichwd/ichwd.h
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@ -96,6 +96,7 @@ struct ichwd_softc {
#define DEVICEID_CPT29 0x1c5d
#define DEVICEID_CPT30 0x1c5e
#define DEVICEID_CPT31 0x1c5f
#define DEVICEID_DH89XXCC_LPC 0x2310
#define DEVICEID_82801AA 0x2410
#define DEVICEID_82801AB 0x2420
#define DEVICEID_82801BA 0x2440