mirror/freebsd
1
0
Fork 0
mirror of https://git.FreeBSD.org/src.git synced 2025-01-16 15:11:52 +00:00
Code Issues Releases Activity

MFp4 //depot/projects/usb 158981,159016,159024

Browse Source 
Sync support for ATMEGA DCI parts.

Submitted by:	Hans Petter Selasky
This commit is contained in:
Andrew Thompson 2009-03-11 04:58:21 +00:00
parent 1be5bf51d3
commit d59dbd0a3d
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=189677
3 changed files with 253 additions and 23 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

85
sys/dev/usb/controller/atmegadci.c
View File

@ -27,8 +27,9 @@ __FBSDID("$FreeBSD$");
*/
/*
* This file contains the driver for the ATMEGA series USB Device
* Controller
* This file contains the driver for the ATMEGA series USB OTG
* Controller. This driver currently only supports the DCI mode of the
* USB hardware.
*/
/*
@ -225,8 +226,6 @@ atmegadci_set_address(struct atmegadci_softc *sc, uint8_t addr)
{
DPRINTFN(5, "addr=%d\n", addr);
ATMEGA_WRITE_1(sc, ATMEGA_UDADDR, addr);
addr |= ATMEGA_UDADDR_ADDEN;
ATMEGA_WRITE_1(sc, ATMEGA_UDADDR, addr);
@ -295,6 +294,8 @@ atmegadci_setup_rx(struct atmegadci_td *td)
if ((req.bmRequestType == UT_WRITE_DEVICE) &&
(req.bRequest == UR_SET_ADDRESS)) {
sc->sc_dv_addr = req.wValue[0] & 0x7F;
/* must write address before ZLP */
ATMEGA_WRITE_1(sc, ATMEGA_UDADDR, sc->sc_dv_addr);
} else {
sc->sc_dv_addr = 0xFF;
}
@ -651,6 +652,8 @@ atmegadci_interrupt(struct atmegadci_softc *sc)
/* clear all set interrupts */
ATMEGA_WRITE_1(sc, ATMEGA_UDINT, ~status);
DPRINTFN(14, "UDINT=0x%02x\n", status);
/* check for any bus state change interrupts */
if (status & ATMEGA_UDINT_EORSTI) {
@ -722,6 +725,8 @@ atmegadci_interrupt(struct atmegadci_softc *sc)
if (status & ATMEGA_USBINT_VBUSTI) {
uint8_t temp;
DPRINTFN(5, "USBINT=0x%02x\n", status);
temp = ATMEGA_READ_1(sc, ATMEGA_USBSTA);
atmegadci_vbus_interrupt(sc, temp & ATMEGA_USBSTA_VBUS);
}
@ -733,7 +738,7 @@ atmegadci_interrupt(struct atmegadci_softc *sc)
if (status) {
DPRINTFN(5, "real endpoint interrupt 0x%02x\n", status);
DPRINTFN(5, "real endpoint interrupt UEINT=0x%02x\n", status);
atmegadci_interrupt_poll(sc);
}
@ -1085,7 +1090,7 @@ atmegadci_device_done(struct usb2_xfer *xfer, usb2_error_t error)
USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
DPRINTFN(2, "xfer=%p, pipe=%p, error=%d\n",
DPRINTFN(9, "xfer=%p, pipe=%p, error=%d\n",
xfer, xfer->pipe, error);
if (xfer->flags_int.usb2_mode == USB_MODE_DEVICE) {
@ -1163,15 +1168,7 @@ atmegadci_clear_stall_sub(struct atmegadci_softc *sc, uint8_t ep_no,
ATMEGA_UECONX_EPEN |
ATMEGA_UECONX_STALLRQC);
if (ep_type == UE_CONTROL) {
/* one bank, 64-bytes wMaxPacket */
ATMEGA_WRITE_1(sc, ATMEGA_UECFG0X,
ATMEGA_UECFG0X_EPTYPE0);
ATMEGA_WRITE_1(sc, ATMEGA_UECFG1X,
ATMEGA_UECFG1X_ALLOC |
ATMEGA_UECFG1X_EPBK0 |
ATMEGA_UECFG1X_EPSIZE(7));
} else {
do {
temp = 0;
if (ep_type == UE_BULK) {
temp |= ATMEGA_UECFG0X_EPTYPE2;
@ -1188,13 +1185,13 @@ atmegadci_clear_stall_sub(struct atmegadci_softc *sc, uint8_t ep_no,
ATMEGA_WRITE_1(sc, ATMEGA_UECFG1X,
ATMEGA_UECFG1X_ALLOC |
ATMEGA_UECFG1X_EPBK1 |
ATMEGA_UECFG1X_EPSIZE(7));
ATMEGA_UECFG1X_EPSIZE(3));
temp = ATMEGA_READ_1(sc, ATMEGA_UESTA0X);
if (!(temp & ATMEGA_UESTA0X_CFGOK)) {
DPRINTFN(0, "Chip rejected configuration\n");
}
}
} while (0);
}
static void
@ -1237,16 +1234,21 @@ atmegadci_init(struct atmegadci_softc *sc)
sc->sc_bus.methods = &atmegadci_bus_methods;
USB_BUS_LOCK(&sc->sc_bus);
#if 0
/* XXX TODO - currently done by boot strap */
/* enable USB PAD regulator */
ATMEGA_WRITE_1(sc, ATMEGA_UHWCON,
ATMEGA_UHWCON_UVREGE);
ATMEGA_UHWCON_UVREGE | ATMEGA_UHWCON_UIMOD);
#endif
/* turn on clocks */
(sc->sc_clocks_on) (&sc->sc_bus);
/* make sure device is re-enumerated */
ATMEGA_WRITE_1(sc, ATMEGA_UDCON, ATMEGA_UDCON_DETACH);
/* wait a little for things to stabilise */
usb2_pause_mtx(&sc->sc_bus.bus_mtx, hz / 1000);
usb2_pause_mtx(&sc->sc_bus.bus_mtx, hz / 20);
/* enable interrupts */
ATMEGA_WRITE_1(sc, ATMEGA_UDIEN,
@ -1261,7 +1263,7 @@ atmegadci_init(struct atmegadci_softc *sc)
ATMEGA_WRITE_1(sc, ATMEGA_UERST, 0);
/* disable all endpoints */
for (n = 1; n != ATMEGA_EP_MAX; n++) {
for (n = 0; n != ATMEGA_EP_MAX; n++) {
/* select endpoint */
ATMEGA_WRITE_1(sc, ATMEGA_UENUM, n);
@ -1277,6 +1279,11 @@ atmegadci_init(struct atmegadci_softc *sc)
atmegadci_clocks_off(sc);
/* read initial VBUS state */
n = ATMEGA_READ_1(sc, ATMEGA_USBSTA);
atmegadci_vbus_interrupt(sc, n & ATMEGA_USBSTA_VBUS);
USB_BUS_UNLOCK(&sc->sc_bus);
/* catch any lost interrupts */
@ -1688,6 +1695,7 @@ atmegadci_root_ctrl_done(struct usb2_xfer *xfer,
struct atmegadci_softc *sc = ATMEGA_BUS2SC(xfer->xroot->bus);
uint16_t value;
uint16_t index;
uint8_t temp;
USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
@ -1976,7 +1984,38 @@ atmegadci_root_ctrl_done(struct usb2_xfer *xfer,
atmegadci_clocks_off(sc);
break;
case UHF_C_PORT_CONNECTION:
/* clear connect change flag */
sc->sc_flags.change_connect = 0;
/* configure the control endpoint */
/* select endpoint number */
ATMEGA_WRITE_1(sc, ATMEGA_UENUM, 0);
/* set endpoint reset */
ATMEGA_WRITE_1(sc, ATMEGA_UERST, ATMEGA_UERST_MASK(0));
/* clear endpoint reset */
ATMEGA_WRITE_1(sc, ATMEGA_UERST, 0);
/* enable and stall endpoint */
ATMEGA_WRITE_1(sc, ATMEGA_UECONX,
ATMEGA_UECONX_EPEN |
ATMEGA_UECONX_STALLRQ);
/* one bank, 64-bytes wMaxPacket */
ATMEGA_WRITE_1(sc, ATMEGA_UECFG0X,
ATMEGA_UECFG0X_EPTYPE0);
ATMEGA_WRITE_1(sc, ATMEGA_UECFG1X,
ATMEGA_UECFG1X_ALLOC |
ATMEGA_UECFG1X_EPBK0 |
ATMEGA_UECFG1X_EPSIZE(3));
/* check valid config */
temp = ATMEGA_READ_1(sc, ATMEGA_UESTA0X);
if (!(temp & ATMEGA_UESTA0X_CFGOK)) {
DPRINTFN(0, "Chip rejected EP0 configuration\n");
}
break;
case UHF_C_PORT_SUSPEND:
sc->sc_flags.change_suspend = 0;
@ -2252,10 +2291,10 @@ atmegadci_pipe_init(struct usb2_device *udev, struct usb2_endpoint_descriptor *e
{
struct atmegadci_softc *sc = ATMEGA_BUS2SC(udev->bus);
DPRINTFN(2, "pipe=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
DPRINTFN(2, "pipe=%p, addr=%d, endpt=%d, mode=%d (%d,%d)\n",
pipe, udev->address,
edesc->bEndpointAddress, udev->flags.usb2_mode,
sc->sc_rt_addr);
sc->sc_rt_addr, udev->device_index);
if (udev->device_index == sc->sc_rt_addr) {

3
sys/dev/usb/controller/atmegadci.h
View File

@ -155,6 +155,9 @@
#define ATMEGA_UHWCON 0xD7
#define ATMEGA_UHWCON_UVREGE (1 << 0)
#define ATMEGA_UHWCON_UVCONE (1 << 4)
#define ATMEGA_UHWCON_UIDE (1 << 6)
#define ATMEGA_UHWCON_UIMOD (1 << 7)
#define ATMEGA_READ_1(sc, reg) \
bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, reg)

188
sys/dev/usb/controller/atmegadci_atmelarm.c
View File

@ -25,3 +25,191 @@ __FBSDID("$FreeBSD$");
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <dev/usb/usb_defs.h>
#include <dev/usb/usb.h>
#include <dev/usb/usb_core.h>
#include <dev/usb/usb_busdma.h>
#include <dev/usb/usb_process.h>
#include <dev/usb/usb_sw_transfer.h>
#include <dev/usb/usb_util.h>
#include <dev/usb/usb_controller.h>
#include <dev/usb/usb_bus.h>
#include <dev/usb/controller/atmegadci.h>
#include <sys/rman.h>
static device_probe_t atmegadci_probe;
static device_attach_t atmegadci_attach;
static device_detach_t atmegadci_detach;
static device_shutdown_t atmegadci_shutdown;
struct atmegadci_super_softc {
struct atmegadci_softc sc_otg; /* must be first */
};
static void
atmegadci_clocks_on(struct usb2_bus *bus)
{
/* TODO */
}
static void
atmegadci_clocks_off(struct usb2_bus *bus)
{
/* TODO */
}
static int
atmegadci_probe(device_t dev)
{
device_set_desc(dev, "ATMEL OTG integrated USB controller");
return (0);
}
static int
atmegadci_attach(device_t dev)
{
struct atmegadci_super_softc *sc = device_get_softc(dev);
int err;
int rid;
/* setup MUSB OTG USB controller interface softc */
sc->sc_otg.sc_clocks_on = &atmegadci_clocks_on;
sc->sc_otg.sc_clocks_off = &atmegadci_clocks_off;
/* initialise some bus fields */
sc->sc_otg.sc_bus.parent = dev;
sc->sc_otg.sc_bus.devices = sc->sc_otg.sc_devices;
sc->sc_otg.sc_bus.devices_max = ATMEGA_MAX_DEVICES;
/* get all DMA memory */
if (usb2_bus_mem_alloc_all(&sc->sc_otg.sc_bus,
USB_GET_DMA_TAG(dev), NULL)) {
return (ENOMEM);
}
rid = 0;
sc->sc_otg.sc_io_res =
bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
if (!(sc->sc_otg.sc_io_res)) {
err = ENOMEM;
goto error;
}
sc->sc_otg.sc_io_tag = rman_get_bustag(sc->sc_otg.sc_io_res);
sc->sc_otg.sc_io_hdl = rman_get_bushandle(sc->sc_otg.sc_io_res);
rid = 0;
sc->sc_otg.sc_irq_res =
bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
if (!(sc->sc_otg.sc_irq_res)) {
goto error;
}
sc->sc_otg.sc_bus.bdev = device_add_child(dev, "usbus", -1);
if (!(sc->sc_otg.sc_bus.bdev)) {
goto error;
}
device_set_ivars(sc->sc_otg.sc_bus.bdev, &sc->sc_otg.sc_bus);
err = bus_setup_intr(dev, sc->sc_otg.sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
NULL, (void *)atmegadci_interrupt, sc, &sc->sc_otg.sc_intr_hdl);
if (err) {
sc->sc_otg.sc_intr_hdl = NULL;
goto error;
}
err = atmegadci_init(&sc->sc_otg);
if (!err) {
err = device_probe_and_attach(sc->sc_otg.sc_bus.bdev);
}
if (err) {
goto error;
}
return (0);
error:
atmegadci_detach(dev);
return (ENXIO);
}
static int
atmegadci_detach(device_t dev)
{
struct atmegadci_super_softc *sc = device_get_softc(dev);
device_t bdev;
int err;
if (sc->sc_otg.sc_bus.bdev) {
bdev = sc->sc_otg.sc_bus.bdev;
device_detach(bdev);
device_delete_child(dev, bdev);
}
/* during module unload there are lots of children leftover */
device_delete_all_children(dev);
if (sc->sc_otg.sc_irq_res && sc->sc_otg.sc_intr_hdl) {
/*
* only call atmegadci_uninit() after atmegadci_init()
*/
atmegadci_uninit(&sc->sc_otg);
err = bus_teardown_intr(dev, sc->sc_otg.sc_irq_res,
sc->sc_otg.sc_intr_hdl);
sc->sc_otg.sc_intr_hdl = NULL;
}
/* free IRQ channel, if any */
if (sc->sc_otg.sc_irq_res) {
bus_release_resource(dev, SYS_RES_IRQ, 0,
sc->sc_otg.sc_irq_res);
sc->sc_otg.sc_irq_res = NULL;
}
/* free memory resource, if any */
if (sc->sc_otg.sc_io_res) {
bus_release_resource(dev, SYS_RES_MEMORY, 0,
sc->sc_otg.sc_io_res);
sc->sc_otg.sc_io_res = NULL;
}
usb2_bus_mem_free_all(&sc->sc_otg.sc_bus, NULL);
return (0);
}
static int
atmegadci_shutdown(device_t dev)
{
struct atmegadci_super_softc *sc = device_get_softc(dev);
int err;
err = bus_generic_shutdown(dev);
if (err)
return (err);
atmegadci_uninit(&sc->sc_otg);
return (0);
}
static device_method_t atmegadci_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, atmegadci_probe),
DEVMETHOD(device_attach, atmegadci_attach),
DEVMETHOD(device_detach, atmegadci_detach),
DEVMETHOD(device_shutdown, atmegadci_shutdown),
/* Bus interface */
DEVMETHOD(bus_print_child, bus_generic_print_child),
{0, 0}
};
static driver_t atmegadci_driver = {
"atmegadci",
atmegadci_methods,
sizeof(struct atmegadci_super_softc),
};
static devclass_t atmegadci_devclass;
DRIVER_MODULE(atmegadci, atmelarm, atmegadci_driver, atmegadci_devclass, 0, 0);
MODULE_DEPEND(atmegadci, usb, 1, 1, 1);