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Resurrect Skyeye support :
Add a new option, SKYEYE_WORKAROUNDS, which as the name suggests adds workarounds for things skyeye doesn't simulate. Specifically : - Use USART0 instead of DBGU as the console, make it not use DMA, and manually provoke an interrupt when we're done in the transmit function. - Skyeye maintains an internal counter for clock, but apparently there's no way to access it, so hack the timecounter code to return a value which is increased at every clock interrupts. This is gross, but I didn't find a better way to implement timecounters without hacking Skyeye to get the counter value. - Force the write-back of PTEs once we're done writing them, even if they are supposed to be write-through. I don't know why I have to do that.
This commit is contained in:
Olivier Houchard
parent
9fd9594daf
commit
d5d776c16b
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=158531
@ -314,6 +314,7 @@ struct cpu_devs at91rm9200_devs[] =
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AT91RM92_BASE + AT91RM92_EMAC_BASE, AT91RM92_EMAC_SIZE,
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AT91RM92_IRQ_EMAC
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},
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#ifndef SKYEYE_WORKAROUNDS
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{
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"uart", 0,
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AT91RM92_BASE + AT91RM92_DBGU_BASE, AT91RM92_DBGU_SIZE,
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@ -339,6 +340,13 @@ struct cpu_devs at91rm9200_devs[] =
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AT91RM92_BASE + AT91RM92_USART3_BASE, AT91RM92_USART_SIZE,
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AT91RM92_IRQ_USART3
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},
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#else
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{
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"uart", 0,
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AT91RM92_BASE + AT91RM92_USART0_BASE, AT91RM92_USART_SIZE,
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AT91RM92_IRQ_USART0
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},
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#endif
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{
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"at91_ssc", 0,
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AT91RM92_BASE + AT91RM92_SSC0_BASE, AT91RM92_SSC_SIZE,
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@ -72,7 +72,11 @@ static unsigned at91st_get_timecount(struct timecounter *tc);
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static struct timecounter at91st_timecounter = {
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at91st_get_timecount, /* get_timecount */
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NULL, /* no poll_pps */
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#ifdef SKYEYE_WORKAROUNDS
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0xffffffffu, /* counter_mask */
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#else
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0xfffffu, /* counter_mask */
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#endif
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32768, /* frequency */
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"AT91RM9200 timer", /* name */
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0 /* quality */
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@ -122,10 +126,18 @@ static devclass_t at91st_devclass;
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DRIVER_MODULE(at91_st, atmelarm, at91st_driver, at91st_devclass, 0, 0);
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#ifdef SKYEYE_WORKAROUNDS
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static unsigned long tot_count = 0;
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#endif
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static unsigned
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at91st_get_timecount(struct timecounter *tc)
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{
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#ifdef SKYEYE_WORKAROUNDS
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return (tot_count);
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#else
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return (st_crtr());
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#endif
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}
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static void
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@ -134,8 +146,12 @@ clock_intr(void *arg)
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struct trapframe *fp = arg;
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/* The interrupt is shared, so we have to make sure it's for us. */
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if (RD4(ST_SR) & ST_SR_PITS)
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if (RD4(ST_SR) & ST_SR_PITS) {
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#ifdef SKYEYE_WORKAROUNDS
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tot_count += 32768 / hz;
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#endif
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hardclock(TRAPF_USERMODE(fp), TRAPF_PC(fp));
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}
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}
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void
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@ -71,7 +71,7 @@ __FBSDID("$FreeBSD$");
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#include "miibus_if.h"
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#define ATE_MAX_TX_BUFFERS 2 /* We have ping-pong tx buffers */
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#define ATE_MAX_TX_BUFFERS 64 /* We have ping-pong tx buffers */
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#define ATE_MAX_RX_BUFFERS 64
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struct ate_softc
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@ -76,22 +76,20 @@ usart_at91rm92_probe(device_t dev)
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switch (device_get_unit(dev))
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{
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case 0:
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#ifdef SKYEYE_WORKAROUNDS
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device_set_desc(dev, "USART0");
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#else
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device_set_desc(dev, "DBGU");
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#ifndef USART0_CONSOLE
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#endif
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/*
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* Setting sc_sysdev makes this device a 'system device' and
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* indirectly makes it the system console.
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*/
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sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs);
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bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
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#endif
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break;
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case 1:
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device_set_desc(dev, "USART0");
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#ifdef USART0_CONSOLE
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sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs);
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bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
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#endif
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break;
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case 2:
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device_set_desc(dev, "USART1");
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@ -104,7 +102,7 @@ usart_at91rm92_probe(device_t dev)
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break;
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}
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sc->sc_class = &at91_usart_class;
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return (uart_bus_probe(dev, 0, 0, 0, 0));
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return (uart_bus_probe(dev, 0, 0, 0, device_get_unit(dev)));
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}
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@ -62,13 +62,11 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
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* XXX: Not pretty, but will work because we map VA == PA early
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* for the last 1MB of memory.
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*/
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#ifdef USART0_CONSOLE
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#ifdef SKYEYE_WORKAROUNDS
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di->bas.bsh = AT91RM92_BASE + AT91RM92_USART0_BASE;
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di->bas.chan = 1;
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di->baudrate = 38400;
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#else
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di->bas.bsh = AT91RM92_BASE + AT91RM92_SYS_BASE + DBGU;
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di->bas.chan = 0;
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di->baudrate = 115200;
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#endif
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di->bas.regshft = 0;
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@ -76,12 +74,10 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
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di->databits = 8;
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di->stopbits = 1;
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di->parity = UART_PARITY_NONE;
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uart_bus_space_io = &at91_bs_tag;
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uart_bus_space_mem = NULL;
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/* Check the environment for overrides */
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if (uart_getenv(devtype, di) == 0)
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return (0);
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uart_bus_space_io = &at91_bs_tag;
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uart_bus_space_mem = NULL;
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return (0);
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}
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@ -1,6 +1,6 @@
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/*-
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* Copyright (c) 2005 M. Warner Losh
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* Copyright (c) 2005 cognet
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* Copyright (c) 2005 Olivier Houchard
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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@ -322,6 +322,7 @@ errout:;
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return (err);
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}
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#ifndef SKYEYE_WORKAROUNDS
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static void
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at91_getaddr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
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{
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@ -329,22 +330,28 @@ at91_getaddr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
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return;
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*(bus_addr_t *)arg = segs[0].ds_addr;
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}
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#endif
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static int
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at91_usart_bus_transmit(struct uart_softc *sc)
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{
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#ifndef SKYEYE_WORKAROUNDS
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bus_addr_t addr;
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#endif
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struct at91_usart_softc *atsc;
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atsc = (struct at91_usart_softc *)sc;
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#ifndef SKYEYE_WORKAROUNDS
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if (bus_dmamap_load(atsc->dmatag, atsc->tx_map, sc->sc_txbuf,
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sc->sc_txdatasz, at91_getaddr, &addr, 0) != 0)
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return (EAGAIN);
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bus_dmamap_sync(atsc->dmatag, atsc->tx_map, BUS_DMASYNC_PREWRITE);
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#endif
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uart_lock(sc->sc_hwmtx);
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sc->sc_txbusy = 1;
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#ifndef SKYEYE_WORKAROUNDS
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/*
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* Setup the PDC to transfer the data and interrupt us when it
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* is done. We've already requested the interrupt.
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@ -353,7 +360,9 @@ at91_usart_bus_transmit(struct uart_softc *sc)
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WR4(&sc->sc_bas, PDC_TCR, sc->sc_txdatasz);
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WR4(&sc->sc_bas, PDC_PTCR, PDC_PTCR_TXTEN);
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uart_unlock(sc->sc_hwmtx);
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#ifdef USART0_CONSOLE
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#else
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for (int i = 0; i < sc->sc_txdatasz; i++)
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at91_usart_putc(&sc->sc_bas, sc->sc_txbuf[i]);
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/*
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* XXX: Gross hack : Skyeye doesn't raise an interrupt once the
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* transfer is done, so simulate it.
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@ -416,16 +425,7 @@ at91_usart_bus_ipend(struct uart_softc *sc)
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int ipend = 0;
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struct at91_usart_softc *atsc;
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atsc = (struct at91_usart_softc *)sc;
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#ifdef USART0_CONSOLE
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/*
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* XXX: We have to cheat for skyeye, as it will return 0xff for all
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* the devices it doesn't emulate.
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*/
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if (sc->sc_bas.chan != 1)
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return (0);
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#endif
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atsc = (struct at91_usart_softc *)sc;
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if (csr & USART_CSR_ENDTX) {
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bus_dmamap_sync(atsc->dmatag, atsc->tx_map,
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BUS_DMASYNC_POSTWRITE);
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@ -33,7 +33,6 @@ makeoptions CONF_CFLAGS=-mcpu=arm9
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options DDB
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options KDB
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options USART0_CONSOLE
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options SCHED_4BSD #4BSD scheduler
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options INET #InterNETworking
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@ -43,6 +42,7 @@ options SOFTUPDATES #Enable FFS soft updates support
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options UFS_ACL #Support for access control lists
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options UFS_DIRHASH #Improve performance on big directories
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options MD_ROOT #MD is a potential root device
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options MD_ROOT_SIZE=4096
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options ROOTDEVNAME=\"ufs:md0\"
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options NFSCLIENT #Network Filesystem Client
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options NFSSERVER #Network Filesystem Server
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@ -83,6 +83,7 @@ device uart
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device mem # Memory and kernel memory devices
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device md
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options SKYEYE_WORKAROUNDS
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options ARM32_NEW_VM_LAYOUT
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# Floppy drives
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@ -332,12 +332,17 @@ extern int pmap_needs_pte_sync;
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#endif /* ARM_NMMUS > 1 */
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#ifdef SKYEYE_WORKAROUNDS
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#define PMAP_NEEDS_PTE_SYNC 1
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#define PMAP_INCLUDE_PTE_SYNC
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#else
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#if (ARM_MMU_SA1 == 1) && (ARM_NMMUS == 1)
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#define PMAP_NEEDS_PTE_SYNC 1
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#define PMAP_INCLUDE_PTE_SYNC
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#elif (ARM_MMU_SA1 == 0)
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#define PMAP_NEEDS_PTE_SYNC 0
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#endif
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#endif
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/*
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* These macros return various bits based on kernel/user and protection.
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@ -9,9 +9,10 @@ CPU_SA1100 opt_global.h
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CPU_SA1110 opt_global.h
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CPU_ARM9 opt_global.h
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CPU_XSCALE_80321 opt_global.h
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PHYSADDR opt_global.h
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KERNPHYSADDR opt_global.h
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KERNVIRTADDR opt_global.h
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PHYSADDR opt_global.h
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SKYEYE_WORKAROUNDS opt_global.h
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STARTUP_PAGETABLE_ADDR opt_global.h
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XSCALE_CACHE_READ_WRITE_ALLOCATE opt_global.h
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XSACLE_DISABLE_CCNT opt_timer.h
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