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Patch #10 Performance - this changes the protocol offload
interface and code in the TX path,making it tighter and hopefully more efficient.
This commit is contained in:
Jack F Vogel
parent
df51baf38f
commit
d777904f05
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=243735
@ -47,7 +47,7 @@ int ixgbe_display_debug_stats = 0;
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/*********************************************************************
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* Driver version
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*********************************************************************/
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char ixgbe_driver_version[] = "2.5.0 - 9";
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char ixgbe_driver_version[] = "2.5.0 - 10";
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/*********************************************************************
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* PCI Device ID Table
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@ -165,8 +165,10 @@ static int ixgbe_dma_malloc(struct adapter *, bus_size_t,
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static void ixgbe_dma_free(struct adapter *, struct ixgbe_dma_alloc *);
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static void ixgbe_add_process_limit(struct adapter *, const char *,
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const char *, u16 *, u16);
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static bool ixgbe_tx_ctx_setup(struct tx_ring *, struct mbuf *);
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static bool ixgbe_tso_setup(struct tx_ring *, struct mbuf *, u32 *, u32 *);
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static int ixgbe_tx_ctx_setup(struct tx_ring *,
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struct mbuf *, u32 *, u32 *);
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static int ixgbe_tso_setup(struct tx_ring *,
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struct mbuf *, u32 *, u32 *);
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static void ixgbe_set_ivar(struct adapter *, u8, u8, s8);
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static void ixgbe_configure_ivars(struct adapter *);
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static u8 * ixgbe_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *);
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@ -1737,7 +1739,6 @@ ixgbe_xmit(struct tx_ring *txr, struct mbuf **m_headp)
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{
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struct adapter *adapter = txr->adapter;
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u32 olinfo_status = 0, cmd_type_len;
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u32 paylen = 0;
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int i, j, error, nsegs;
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int first, last = 0;
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bool remap = TRUE;
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@ -1814,16 +1815,12 @@ ixgbe_xmit(struct tx_ring *txr, struct mbuf **m_headp)
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** Set up the appropriate offload context
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** this will consume the first descriptor
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*/
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if (m_head->m_pkthdr.csum_flags & CSUM_TSO) {
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if (ixgbe_tso_setup(txr, m_head, &paylen, &olinfo_status)) {
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cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
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olinfo_status |= IXGBE_TXD_POPTS_TXSM << 8;
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olinfo_status |= paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
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++txr->tso_tx;
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} else
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return (ENXIO);
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} else if (ixgbe_tx_ctx_setup(txr, m_head))
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olinfo_status |= IXGBE_TXD_POPTS_TXSM << 8;
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error = ixgbe_tx_ctx_setup(txr, m_head, &cmd_type_len, &olinfo_status);
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if (__predict_false(error)) {
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if (error == ENOBUFS)
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*m_headp = NULL;
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return (error);
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}
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#ifdef IXGBE_FDIR
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/* Do the flow director magic */
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@ -1835,10 +1832,6 @@ ixgbe_xmit(struct tx_ring *txr, struct mbuf **m_headp)
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}
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}
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#endif
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/* Record payload length */
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if (paylen == 0)
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olinfo_status |= m_head->m_pkthdr.len <<
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IXGBE_ADVTXD_PAYLEN_SHIFT;
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i = txr->next_avail_desc;
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for (j = 0; j < nsegs; j++) {
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@ -3218,31 +3211,37 @@ ixgbe_free_transmit_buffers(struct tx_ring *txr)
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/*********************************************************************
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*
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* Advanced Context Descriptor setup for VLAN or CSUM
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* Advanced Context Descriptor setup for VLAN, CSUM or TSO
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*
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**********************************************************************/
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static bool
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ixgbe_tx_ctx_setup(struct tx_ring *txr, struct mbuf *mp)
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static int
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ixgbe_tx_ctx_setup(struct tx_ring *txr, struct mbuf *mp,
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u32 *cmd_type_len, u32 *olinfo_status)
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{
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struct ixgbe_adv_tx_context_desc *TXD;
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struct ixgbe_tx_buf *tx_buffer;
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u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
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struct ether_vlan_header *eh;
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struct ip *ip;
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struct ip6_hdr *ip6;
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int ehdrlen, ip_hlen = 0;
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u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
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int ehdrlen, ip_hlen = 0;
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u16 etype;
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u8 ipproto = 0;
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bool offload = TRUE;
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int ctxd = txr->next_avail_desc;
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u16 vtag = 0;
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int offload = TRUE;
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int ctxd = txr->next_avail_desc;
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u16 vtag = 0;
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/* First check if TSO is to be used */
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if (mp->m_pkthdr.csum_flags & CSUM_TSO)
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return (ixgbe_tso_setup(txr, mp, cmd_type_len, olinfo_status));
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if ((mp->m_pkthdr.csum_flags & CSUM_OFFLOAD) == 0)
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offload = FALSE;
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tx_buffer = &txr->tx_buffers[ctxd];
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/* Indicate the whole packet as payload when not doing TSO */
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*olinfo_status |= mp->m_pkthdr.len << IXGBE_ADVTXD_PAYLEN_SHIFT;
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/* Now ready a context descriptor */
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TXD = (struct ixgbe_adv_tx_context_desc *) &txr->tx_base[ctxd];
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/*
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@ -3253,8 +3252,8 @@ ixgbe_tx_ctx_setup(struct tx_ring *txr, struct mbuf *mp)
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if (mp->m_flags & M_VLANTAG) {
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vtag = htole16(mp->m_pkthdr.ether_vtag);
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vlan_macip_lens |= (vtag << IXGBE_ADVTXD_VLAN_SHIFT);
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} else if (offload == FALSE)
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return FALSE;
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} else if (offload == FALSE) /* ... no offload to do */
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return (0);
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/*
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* Determine where frame payload starts.
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@ -3317,22 +3316,22 @@ ixgbe_tx_ctx_setup(struct tx_ring *txr, struct mbuf *mp)
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break;
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}
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if (offload) /* For the TX descriptor setup */
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*olinfo_status |= IXGBE_TXD_POPTS_TXSM << 8;
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/* Now copy bits into descriptor */
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TXD->vlan_macip_lens |= htole32(vlan_macip_lens);
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TXD->type_tucmd_mlhl |= htole32(type_tucmd_mlhl);
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TXD->seqnum_seed = htole32(0);
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TXD->mss_l4len_idx = htole32(0);
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tx_buffer->m_head = NULL;
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tx_buffer->eop_index = -1;
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/* We've consumed the first desc, adjust counters */
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if (++ctxd == txr->num_desc)
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ctxd = 0;
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txr->next_avail_desc = ctxd;
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--txr->tx_avail;
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return (offload);
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return (0);
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}
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/**********************************************************************
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@ -3341,14 +3340,13 @@ ixgbe_tx_ctx_setup(struct tx_ring *txr, struct mbuf *mp)
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* adapters using advanced tx descriptors
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*
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**********************************************************************/
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static bool
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ixgbe_tso_setup(struct tx_ring *txr, struct mbuf *mp, u32 *paylen,
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u32 *olinfo_status)
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static int
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ixgbe_tso_setup(struct tx_ring *txr, struct mbuf *mp,
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u32 *cmd_type_len, u32 *olinfo_status)
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{
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struct ixgbe_adv_tx_context_desc *TXD;
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struct ixgbe_tx_buf *tx_buffer;
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u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
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u32 mss_l4len_idx = 0, len;
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u32 mss_l4len_idx = 0, paylen;
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u16 vtag = 0, eh_type;
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int ctxd, ehdrlen, ip_hlen, tcp_hlen;
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struct ether_vlan_header *eh;
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@ -3374,18 +3372,15 @@ ixgbe_tso_setup(struct tx_ring *txr, struct mbuf *mp, u32 *paylen,
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eh_type = eh->evl_encap_proto;
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}
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/* Ensure we have at least the IP+TCP header in the first mbuf. */
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len = ehdrlen + sizeof(struct tcphdr);
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switch (ntohs(eh_type)) {
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#ifdef INET6
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case ETHERTYPE_IPV6:
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if (mp->m_len < len + sizeof(struct ip6_hdr))
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return FALSE;
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ip6 = (struct ip6_hdr *)(mp->m_data + ehdrlen);
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/* XXX-BZ For now we do not pretend to support ext. hdrs. */
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if (ip6->ip6_nxt != IPPROTO_TCP)
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return FALSE;
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return (ENXIO);
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ip_hlen = sizeof(struct ip6_hdr);
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ip6 = (struct ip6_hdr *)(mp->m_data + ehdrlen);
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th = (struct tcphdr *)((caddr_t)ip6 + ip_hlen);
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th->th_sum = in6_cksum_pseudo(ip6, 0, IPPROTO_TCP, 0);
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type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV6;
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@ -3393,11 +3388,9 @@ ixgbe_tso_setup(struct tx_ring *txr, struct mbuf *mp, u32 *paylen,
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#endif
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#ifdef INET
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case ETHERTYPE_IP:
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if (mp->m_len < len + sizeof(struct ip))
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return FALSE;
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ip = (struct ip *)(mp->m_data + ehdrlen);
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if (ip->ip_p != IPPROTO_TCP)
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return FALSE;
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return (ENXIO);
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ip->ip_sum = 0;
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ip_hlen = ip->ip_hl << 2;
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th = (struct tcphdr *)((caddr_t)ip + ip_hlen);
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@ -3415,13 +3408,12 @@ ixgbe_tso_setup(struct tx_ring *txr, struct mbuf *mp, u32 *paylen,
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}
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ctxd = txr->next_avail_desc;
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tx_buffer = &txr->tx_buffers[ctxd];
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TXD = (struct ixgbe_adv_tx_context_desc *) &txr->tx_base[ctxd];
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tcp_hlen = th->th_off << 2;
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/* This is used in the transmit desc in encap */
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*paylen = mp->m_pkthdr.len - ehdrlen - ip_hlen - tcp_hlen;
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paylen = mp->m_pkthdr.len - ehdrlen - ip_hlen - tcp_hlen;
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/* VLAN MACLEN IPLEN */
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if (mp->m_flags & M_VLANTAG) {
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@ -3444,15 +3436,17 @@ ixgbe_tso_setup(struct tx_ring *txr, struct mbuf *mp, u32 *paylen,
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TXD->mss_l4len_idx = htole32(mss_l4len_idx);
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TXD->seqnum_seed = htole32(0);
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tx_buffer->m_head = NULL;
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tx_buffer->eop_index = -1;
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if (++ctxd == txr->num_desc)
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ctxd = 0;
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txr->tx_avail--;
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txr->next_avail_desc = ctxd;
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return TRUE;
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*cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
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*olinfo_status |= IXGBE_TXD_POPTS_TXSM << 8;
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*olinfo_status |= paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
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++txr->tso_tx;
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return (0);
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}
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#ifdef IXGBE_FDIR
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