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Remove stale comments about the issues with HS mode.
Remove a previous workaround to limit the minimum sdhci frequency that isn't needed anymore.
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parent
07c7a520f1
commit
d86f31b96b
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=278213
@ -67,19 +67,9 @@ __FBSDID("$FreeBSD$");
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#define dprintf(fmt, args...)
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#endif
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/*
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* Arasan HC seems to have problem with Data CRC on lower frequencies.
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* Use this tunable to cap initialization sequence frequency at higher
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* value. Default is standard 400kHz.
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* HS mode brings too many problems for most of cards, so disable HS mode
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* until a better fix comes up.
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* HS mode still can be enabled with the tunable.
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*/
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static int bcm2835_sdhci_min_freq = 400000;
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static int bcm2835_sdhci_hs = 1;
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static int bcm2835_sdhci_pio_mode = 0;
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TUNABLE_INT("hw.bcm2835.sdhci.min_freq", &bcm2835_sdhci_min_freq);
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TUNABLE_INT("hw.bcm2835.sdhci.hs", &bcm2835_sdhci_hs);
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TUNABLE_INT("hw.bcm2835.sdhci.pio_mode", &bcm2835_sdhci_pio_mode);
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@ -404,13 +394,6 @@ bcm_sdhci_write_multi_4(device_t dev, struct sdhci_slot *slot, bus_size_t off,
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bus_space_write_multi_4(sc->sc_bst, sc->sc_bsh, off, data, count);
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}
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static uint32_t
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bcm_sdhci_min_freq(device_t dev, struct sdhci_slot *slot)
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{
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return bcm2835_sdhci_min_freq;
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}
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static void
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bcm_sdhci_start_dma_seg(struct bcm_sdhci_softc *sc)
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{
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@ -663,7 +646,6 @@ static device_method_t bcm_sdhci_methods[] = {
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DEVMETHOD(mmcbr_acquire_host, sdhci_generic_acquire_host),
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DEVMETHOD(mmcbr_release_host, sdhci_generic_release_host),
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DEVMETHOD(sdhci_min_freq, bcm_sdhci_min_freq),
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/* Platform transfer methods */
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DEVMETHOD(sdhci_platform_will_handle, bcm_sdhci_will_handle_transfer),
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DEVMETHOD(sdhci_platform_start_transfer, bcm_sdhci_start_transfer),
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