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Add a microcode to implement receive bundling for 82551 chipsets with
a revision ID of 0x0f (D102 E-step). MFC after: 2 weeks Tested by: pav
This commit is contained in:
parent
163609768e
commit
de57160389
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=145368
@ -2622,6 +2622,7 @@ static uint32_t fxp_ucode_d101ma[] = D101M_B_RCVBUNDLE_UCODE;
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static uint32_t fxp_ucode_d101s[] = D101S_RCVBUNDLE_UCODE;
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static uint32_t fxp_ucode_d101s[] = D101S_RCVBUNDLE_UCODE;
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static uint32_t fxp_ucode_d102[] = D102_B_RCVBUNDLE_UCODE;
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static uint32_t fxp_ucode_d102[] = D102_B_RCVBUNDLE_UCODE;
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static uint32_t fxp_ucode_d102c[] = D102_C_RCVBUNDLE_UCODE;
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static uint32_t fxp_ucode_d102c[] = D102_C_RCVBUNDLE_UCODE;
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static uint32_t fxp_ucode_d102e[] = D102_E_RCVBUNDLE_UCODE;
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#define UCODE(x) x, sizeof(x)/sizeof(uint32_t)
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#define UCODE(x) x, sizeof(x)/sizeof(uint32_t)
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@ -2642,6 +2643,8 @@ struct ucode {
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D102_B_CPUSAVER_DWORD, D102_B_CPUSAVER_BUNDLE_MAX_DWORD },
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D102_B_CPUSAVER_DWORD, D102_B_CPUSAVER_BUNDLE_MAX_DWORD },
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{ FXP_REV_82550_C, UCODE(fxp_ucode_d102c),
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{ FXP_REV_82550_C, UCODE(fxp_ucode_d102c),
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D102_C_CPUSAVER_DWORD, D102_C_CPUSAVER_BUNDLE_MAX_DWORD },
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D102_C_CPUSAVER_DWORD, D102_C_CPUSAVER_BUNDLE_MAX_DWORD },
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{ FXP_REV_82551, UCODE(fxp_ucode_d102e),
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D102_E_CPUSAVER_DWORD, D102_E_CPUSAVER_BUNDLE_MAX_DWORD },
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{ 0, NULL, 0, 0, 0 }
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{ 0, NULL, 0, 0, 0 }
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};
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};
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@ -468,3 +468,4 @@ struct fxp_stats {
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#define FXP_REV_82559S_A 9 /* 82559S A stepping */
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#define FXP_REV_82559S_A 9 /* 82559S A stepping */
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#define FXP_REV_82550 12
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#define FXP_REV_82550 12
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#define FXP_REV_82550_C 13 /* 82550 C stepping */
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#define FXP_REV_82550_C 13 /* 82550 C stepping */
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#define FXP_REV_82551 15 /* 82551 */
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@ -40,7 +40,7 @@ Version: 3.28
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This file contains the loadable micro code arrays to implement receive bundling on the
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This file contains the loadable micro code arrays to implement receive bundling on the
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D101 A-step, D101 B-step, D101M (B-step only), D101S, D102 B-step,
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D101 A-step, D101 B-step, D101M (B-step only), D101S, D102 B-step,
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D102 B-step with TCO work around and D012 C-step.
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D102 B-step with TCO work around, D102 C-step and D102 E-step.
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Each controller has its own specific micro code array. The array for one controller
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Each controller has its own specific micro code array. The array for one controller
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is totally incompatible with any other controller, and if used will most likely
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is totally incompatible with any other controller, and if used will most likely
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@ -51,25 +51,6 @@ rcvbundl.h file given above).
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*/
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*/
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/* Size of loadable micro code image for each supported chip. */
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#ifndef D100_NUM_MICROCODE_DWORDS
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#define D100_NUM_MICROCODE_DWORDS 66
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#endif
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#ifndef D101_NUM_MICROCODE_DWORDS
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#define D101_NUM_MICROCODE_DWORDS 102
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#endif
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#ifndef D101M_NUM_MICROCODE_DWORDS
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#define D101M_NUM_MICROCODE_DWORDS 134
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#endif
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#ifndef D101S_NUM_MICROCODE_DWORDS
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#define D101S_NUM_MICROCODE_DWORDS 134
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#endif
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#ifndef D102_NUM_MICROCODE_DWORDS
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#define D102_NUM_MICROCODE_DWORDS 134
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#endif
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#ifndef D102_NUM_TCO_MICROCODE_DWORDS
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#define D102_NUM_TCO_MICROCODE_DWORDS 134
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#endif
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/*************************************************************************
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/*************************************************************************
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@ -1127,3 +1108,150 @@ rcvbundl.h file given above).
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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}
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}
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/********************************************************/
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/* Micro code for the D102 E-step */
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/********************************************************/
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/* Parameter values for the D102 E-step */
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#define D102_E_CPUSAVER_DWORD 42
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#define D102_E_CPUSAVER_BUNDLE_MAX_DWORD 54
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#define D102_E_CPUSAVER_MIN_SIZE_DWORD 46
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#define D102_E_RCVBUNDLE_UCODE \
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{\
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0x007D028F, \
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0x0E4204F9, \
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0x14ED0C85, \
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0x14FA14E9, \
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0x0EF70E36, \
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0x1FFF1FFF, \
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0x00E014B9, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00E014BD, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00E014D5, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00E014C1, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00E014C8, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00200600, \
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0x00E014EE, \
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0x00000000, \
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0x00000000, \
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0x0030FF80, \
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0x00940E46, \
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0x00038200, \
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0x00102000, \
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0x00E00E43, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00300006, \
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0x00E014FB, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00906E41, \
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0x00800E3C, \
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0x00E00E39, \
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0x00000000, \
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0x00906EFD, \
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0x00900EFD, \
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0x00E00EF8, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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0x00000000, \
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}
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