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Remove incomplete Yukon II support code which was added in if_sk.c, rev 1.123.
Yukon II users should use msk(4).
This commit is contained in:
parent
11180a85e1
commit
e16d3854ae
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=165197
@ -159,23 +159,6 @@ static struct sk_type sk_devs[] = {
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DEVICEID_SK_V2,
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"Marvell Gigabit Ethernet"
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},
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#ifdef not_yet
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{
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VENDORID_MARVELL,
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DEVICEID_MRVL_4360,
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"Marvell 88E8052 Gigabit Ethernet Controller"
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},
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{
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VENDORID_MARVELL,
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DEVICEID_MRVL_4361,
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"Marvell 88E8050 Gigabit Ethernet Controller"
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},
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{
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VENDORID_MARVELL,
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DEVICEID_MRVL_4362,
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"Marvell 88E8053 Gigabit Ethernet Controller"
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},
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#endif
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{
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VENDORID_MARVELL,
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DEVICEID_BELKIN_5005,
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@ -487,7 +470,6 @@ sk_miibus_readreg(dev, phy, reg)
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case SK_YUKON:
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case SK_YUKON_LITE:
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case SK_YUKON_LP:
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case SK_YUKON_EC:
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v = sk_marv_miibus_readreg(sc_if, phy, reg);
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break;
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default:
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@ -517,7 +499,6 @@ sk_miibus_writereg(dev, phy, reg, val)
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case SK_YUKON:
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case SK_YUKON_LITE:
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case SK_YUKON_LP:
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case SK_YUKON_EC:
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v = sk_marv_miibus_writereg(sc_if, phy, reg, val);
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break;
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default:
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@ -545,7 +526,6 @@ sk_miibus_statchg(dev)
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case SK_YUKON:
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case SK_YUKON_LITE:
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case SK_YUKON_LP:
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case SK_YUKON_EC:
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sk_marv_miibus_statchg(sc_if);
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break;
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}
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@ -769,7 +749,6 @@ sk_setmulti(sc_if)
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case SK_YUKON:
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case SK_YUKON_LITE:
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case SK_YUKON_LP:
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case SK_YUKON_EC:
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SK_YU_WRITE_2(sc_if, YUKON_MCAH1, 0);
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SK_YU_WRITE_2(sc_if, YUKON_MCAH2, 0);
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SK_YU_WRITE_2(sc_if, YUKON_MCAH3, 0);
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@ -811,7 +790,6 @@ sk_setmulti(sc_if)
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case SK_YUKON:
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case SK_YUKON_LITE:
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case SK_YUKON_LP:
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case SK_YUKON_EC:
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bcopy(LLADDR(
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(struct sockaddr_dl *)ifma->ifma_addr),
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maddr, ETHER_ADDR_LEN);
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@ -836,7 +814,6 @@ sk_setmulti(sc_if)
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case SK_YUKON:
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case SK_YUKON_LITE:
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case SK_YUKON_LP:
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case SK_YUKON_EC:
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SK_YU_WRITE_2(sc_if, YUKON_MCAH1, hashes[0] & 0xffff);
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SK_YU_WRITE_2(sc_if, YUKON_MCAH2, (hashes[0] >> 16) & 0xffff);
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SK_YU_WRITE_2(sc_if, YUKON_MCAH3, hashes[1] & 0xffff);
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@ -867,7 +844,6 @@ sk_setpromisc(sc_if)
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case SK_YUKON:
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case SK_YUKON_LITE:
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case SK_YUKON_LP:
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case SK_YUKON_EC:
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if (ifp->if_flags & IFF_PROMISC) {
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SK_YU_CLRBIT_2(sc_if, YUKON_RCR,
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YU_RCR_UFLEN | YU_RCR_MUFLEN);
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@ -1316,9 +1292,6 @@ sk_reset(sc)
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case SK_GENESIS:
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sc->sk_int_ticks = SK_IMTIMER_TICKS_GENESIS;
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break;
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case SK_YUKON_EC:
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sc->sk_int_ticks = SK_IMTIMER_TICKS_YUKON_EC;
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break;
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default:
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sc->sk_int_ticks = SK_IMTIMER_TICKS_YUKON;
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break;
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@ -1356,7 +1329,6 @@ sk_probe(dev)
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case SK_YUKON:
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case SK_YUKON_LITE:
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case SK_YUKON_LP:
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case SK_YUKON_EC:
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device_set_desc(dev, "Marvell Semiconductor, Inc. Yukon");
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break;
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}
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@ -1456,8 +1428,7 @@ sk_attach(dev)
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* Just to be contrary, Yukon2 appears to have separate memory
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* for each MAC.
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*/
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if (SK_IS_YUKON2(sc) ||
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sk_win_read_1(sc, SK_CONFIG) & SK_CONFIG_SINGLEMAC) {
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if (sk_win_read_1(sc, SK_CONFIG) & SK_CONFIG_SINGLEMAC) {
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u_int32_t chunk, val;
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chunk = sc->sk_ramsize / 2;
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@ -1545,7 +1516,6 @@ sk_attach(dev)
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case SK_YUKON:
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case SK_YUKON_LITE:
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case SK_YUKON_LP:
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case SK_YUKON_EC:
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sk_init_yukon(sc_if);
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break;
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}
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@ -1578,7 +1548,7 @@ skc_attach(dev)
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device_t dev;
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{
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struct sk_softc *sc;
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int error = 0, *port, sk_macs;
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int error = 0, *port;
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uint8_t skrs;
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const char *pname;
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char *revstr;
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@ -1703,9 +1673,6 @@ skc_attach(dev)
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goto vpdfailed;
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break;
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case DEVICEID_SK_V2:
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case DEVICEID_MRVL_4360:
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case DEVICEID_MRVL_4361:
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case DEVICEID_MRVL_4362:
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/* YUKON VPD PN might bear no resemblance to reality. */
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switch (sc->sk_type) {
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case SK_GENESIS:
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@ -1722,9 +1689,6 @@ skc_attach(dev)
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case SK_YUKON_LP:
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pname = "Marvell Yukon LP Gigabit Ethernet";
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break;
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case SK_YUKON_EC:
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pname = "Marvell Yukon-2 EC Gigabit Ethernet";
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break;
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default:
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pname = "Marvell Yukon (Unknown) Gigabit Ethernet";
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break;
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@ -1775,21 +1739,6 @@ skc_attach(dev)
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revstr = "";
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break;
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}
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} else if (sc->sk_type == SK_YUKON_EC) {
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switch (sc->sk_rev) {
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case SK_YUKON_EC_REV_A1:
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revstr = "A1";
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break;
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case SK_YUKON_EC_REV_A2:
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revstr = "A2";
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break;
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case SK_YUKON_EC_REV_A3:
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revstr = "A3";
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break;
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default:
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revstr = "";
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break;
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}
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} else {
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revstr = "";
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}
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@ -1821,23 +1770,7 @@ skc_attach(dev)
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*port = SK_PORT_A;
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device_set_ivars(sc->sk_devs[SK_PORT_A], port);
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sk_macs = 1;
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if (SK_IS_YUKON2(sc)) {
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u_int8_t hw;
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hw = sk_win_read_1(sc, SK_Y2_HWRES);
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if ((hw & SK_Y2_HWRES_LINK_MASK) == SK_Y2_HWRES_LINK_DUAL) {
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if ((sk_win_read_1(sc, SK_Y2_CLKGATE) &
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SK_Y2_CLKGATE_LINK2_INACTIVE) == 0)
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sk_macs++;
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}
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} else {
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if (!(sk_win_read_1(sc, SK_CONFIG) & SK_CONFIG_SINGLEMAC))
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sk_macs++;
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}
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if (sk_macs > 1) {
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if (!(sk_win_read_1(sc, SK_CONFIG) & SK_CONFIG_SINGLEMAC)) {
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sc->sk_devs[SK_PORT_B] = device_add_child(dev, "sk", -1);
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if (sc->sk_devs[SK_PORT_B] == NULL) {
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device_printf(dev, "failed to add child for PORT_B\n");
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@ -3743,7 +3676,6 @@ sk_init_locked(sc_if)
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case SK_YUKON:
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case SK_YUKON_LITE:
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case SK_YUKON_LP:
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case SK_YUKON_EC:
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sk_init_yukon(sc_if);
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break;
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}
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@ -3847,7 +3779,6 @@ sk_init_locked(sc_if)
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case SK_YUKON:
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case SK_YUKON_LITE:
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case SK_YUKON_LP:
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case SK_YUKON_EC:
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reg = SK_YU_READ_2(sc_if, YUKON_GPCR);
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reg |= YU_GPCR_TXEN | YU_GPCR_RXEN;
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#if 0
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@ -3869,7 +3800,6 @@ sk_init_locked(sc_if)
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case SK_YUKON:
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case SK_YUKON_LITE:
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case SK_YUKON_LP:
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case SK_YUKON_EC:
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callout_reset(&sc_if->sk_tick_ch, hz, sk_yukon_tick, sc_if);
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break;
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}
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@ -3943,7 +3873,6 @@ sk_stop(sc_if)
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case SK_YUKON:
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case SK_YUKON_LITE:
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case SK_YUKON_LP:
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case SK_YUKON_EC:
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SK_IF_WRITE_1(sc_if,0, SK_RXMF1_CTRL_TEST, SK_RFCTL_RESET_SET);
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SK_IF_WRITE_1(sc_if,0, SK_TXMF1_CTRL_TEST, SK_TFCTL_RESET_SET);
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break;
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@ -55,23 +55,13 @@
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#define SK_YUKON 0xB0
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#define SK_YUKON_LITE 0xB1
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#define SK_YUKON_LP 0xB2
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#define SK_YUKON_XL 0xB3
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#define SK_YUKON_EC_U 0xB4
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#define SK_YUKON_EC 0xB6
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#define SK_YUKON_FE 0xB7
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#define SK_YUKON_FAMILY(x) ((x) & 0xB0)
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#define SK_IS_YUKON2(sc) \
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((sc)->sk_type >= SK_YUKON_XL && (sc)->sk_type <= SK_YUKON_FE)
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/* Known revisions in SK_CONFIG. */
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#define SK_YUKON_LITE_REV_A0 0x0 /* invented, see test in skc_attach. */
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#define SK_YUKON_LITE_REV_A1 0x3
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#define SK_YUKON_LITE_REV_A3 0x7
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#define SK_YUKON_EC_REV_A1 0x0
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#define SK_YUKON_EC_REV_A2 0x1
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#define SK_YUKON_EC_REV_A3 0x2
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/*
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* SysKonnect PCI vendor ID
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*/
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@ -88,13 +78,6 @@
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#define DEVICEID_SK_V1 0x4300
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#define DEVICEID_SK_V2 0x4320
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/*
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* Marvell gigabit ethernet device IDs
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*/
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#define DEVICEID_MRVL_4360 0x4360
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#define DEVICEID_MRVL_4361 0x4361
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#define DEVICEID_MRVL_4362 0x4362
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/*
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* Belkin F5D5005
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*/
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@ -364,9 +347,7 @@
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#define SK_CHIPVER 0x011B
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#define SK_EPROM0 0x011C
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#define SK_EPROM1 0x011D /* yukon/genesis */
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#define SK_Y2_CLKGATE 0x011D /* yukon 2 */
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#define SK_EPROM2 0x011E /* yukon/genesis */
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#define SK_Y2_HWRES 0x011E /* yukon 2 */
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#define SK_EPROM3 0x011F
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#define SK_EP_ADDR 0x0120
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#define SK_EP_DATA 0x0124
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@ -400,7 +381,6 @@
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#define SK_IMTIMER_TICKS_GENESIS 53
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#define SK_IMTIMER_TICKS_YUKON 78
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#define SK_IMTIMER_TICKS_YUKON_EC 125
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#define SK_IM_USECS(x, t) ((x) * (t))
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#define SK_IM_MIN 10
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@ -472,13 +452,6 @@
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#define SK_GPIO_DIR8 0x01000000
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#define SK_GPIO_DIR9 0x02000000
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#define SK_Y2_CLKGATE_LINK2_INACTIVE 0x80 /* port 2 inactive */
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#define SK_Y2_HWRES_LINK_1 0x01
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#define SK_Y2_HWRES_LINK_2 0x02
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#define SK_Y2_HWRES_LINK_MASK (SK_Y2_HWRES_LINK_1 | SK_Y2_HWRES_LINK_2)
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#define SK_Y2_HWRES_LINK_DUAL (SK_Y2_HWRES_LINK_1 | SK_Y2_HWRES_LINK_2)
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/* Block 3 Ram interface and MAC arbiter registers */
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#define SK_RAMADDR 0x0180
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#define SK_RAMDATA0 0x0184
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