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Add a few more register definitions.
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=76526
@ -45,6 +45,7 @@
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#define FXP_CSR_FLASHCONTROL 12 /* flash control (2 bytes) */
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#define FXP_CSR_EEPROMCONTROL 14 /* eeprom control (2 bytes) */
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#define FXP_CSR_MDICONTROL 16 /* mdi control (4 bytes) */
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#define FXP_CSR_FLOWCONTROL 0x19 /* flow control (2 bytes) */
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/*
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* FOR REFERENCE ONLY, the old definition of FXP_CSR_SCB_RUSCUS:
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@ -71,6 +72,17 @@
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#define FXP_SCB_CUS_SUSPENDED 1
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#define FXP_SCB_CUS_ACTIVE 2
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#define FXP_SCB_INTR_DISABLE 0x01 /* Disable all interrupts */
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#define FXP_SCB_INTR_SWI 0x02 /* Generate SWI */
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#define FXP_SCB_INTMASK_FCP 0x04
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#define FXP_SCB_INTMASK_ER 0x08
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#define FXP_SCB_INTMASK_RNR 0x10
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#define FXP_SCB_INTMASK_CNA 0x20
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#define FXP_SCB_INTMASK_FR 0x40
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#define FXP_SCB_INTMASK_CXTNO 0x80
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#define FXP_SCB_STATACK_FCP 0x01 /* Flow Control Pause */
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#define FXP_SCB_STATACK_ER 0x02 /* Early Receive */
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#define FXP_SCB_STATACK_SWI 0x04
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#define FXP_SCB_STATACK_MDI 0x08
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#define FXP_SCB_STATACK_RNR 0x10
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