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- splhigh()/splx() -> critical_enter()/critical_exit()

- fix KV macro in t2_pci.c to include the sable_lynx_base variable
so that the T2 CSRs can be found on lynxes.   Current should be
bootable on lynxes now.
This commit is contained in:
Andrew Gallatin 2001-10-20 21:05:14 +00:00
parent 226d92f1b0
commit e47b20bee2
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=85263
2 changed files with 5 additions and 5 deletions

View File

@ -118,14 +118,14 @@ t2_set_hae_mem(void *arg, u_int32_t pa)
msb = pa & 0xf8000000;
pa -= msb;
msb >>= 27; /* t2 puts high bits in the bottom of the register */
s = splhigh();
s = critical_enter();
if (msb != t2_hae_mem[hose]) {
t2_hae_mem[hose] = msb;
t2_csr[hose]->hae0_1 = t2_hae_mem[hose];
alpha_mb();
t2_hae_mem[hose] = t2_csr[hose]->hae0_1;
}
splx(s);
critical_exit(s);
}
return pa;
}

View File

@ -44,7 +44,7 @@
#include "alphapci_if.h"
#include "pcib_if.h"
#define KV(pa) ALPHA_PHYS_TO_K0SEG(pa)
#define KV(pa) ALPHA_PHYS_TO_K0SEG((pa) + sable_lynx_base)
static devclass_t pcib_devclass;
@ -92,7 +92,7 @@ t2_pcib_maxslots(device_t dev)
#define T2_TYPE1_SETUP(b,s,old_hae3) if((b)) { \
do { \
(s) = splhigh(); \
(s) = critical_enter(); \
(old_hae3) = REGVAL(T2_HAE0_3); \
alpha_mb(); \
REGVAL(T2_HAE0_3) = (old_hae3) | (1<<30); \
@ -105,7 +105,7 @@ t2_pcib_maxslots(device_t dev)
alpha_mb(); \
REGVAL(T2_HAE0_3) = (old_hae3); \
alpha_mb(); \
splx((s)); \
critical_exit((s)); \
} while(0); \
}